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Showing papers on "Memristor published in 2021"


Journal ArticleDOI
TL;DR: The feasibility and advancement of implementing neural networks using memristors are discussed, the difficulties that need to be overcome at this stage are put forward, and their development prospects and challenges faced are also discussed.

135 citations


Journal ArticleDOI
Yanan Zhong1, Jianshi Tang1, Xinyi Li1, Bin Gao1, He Qian1, Huaqiang Wu1 
TL;DR: In this paper, a parallel dynamic memristor-based reservoir computing system was proposed by applying a controllable mask process, in which the critical parameters, including state richness, feedback strength and input scaling, can be tuned by changing the mask length and the range of input signal.
Abstract: Reservoir computing is a highly efficient network for processing temporal signals due to its low training cost compared to standard recurrent neural networks, and generating rich reservoir states is critical in the hardware implementation. In this work, we report a parallel dynamic memristor-based reservoir computing system by applying a controllable mask process, in which the critical parameters, including state richness, feedback strength and input scaling, can be tuned by changing the mask length and the range of input signal. Our system achieves a low word error rate of 0.4% in the spoken-digit recognition and low normalized root mean square error of 0.046 in the time-series prediction of the Henon map, which outperforms most existing hardware-based reservoir computing systems and also software-based one in the Henon map prediction task. Our work could pave the road towards high-efficiency memristor-based reservoir computing systems to handle more complex temporal tasks in the future.

126 citations


Journal ArticleDOI
TL;DR: A discrete memristor is presented and a general two-dimensional memristive map model is constructed by coupling the discrete Memristor with an existing discrete map to enhance the chaos complexity and its coupling maps can generate hyperchaos.
Abstract: Continuous memristor has been widely used in chaotic oscillating circuits and neuromorphic computing systems. However, discrete memristor and its coupling discrete map have not been noticed yet. This article presents a discrete memristor and constructs a general two-dimensional memristive map model by coupling the discrete memristor with an existing discrete map. The pinched hysteresis loops of the discrete memristor are demonstrated. Four examples of memristive discrete maps are provided and their coupling strength-relied and memristor initial-boosted complex dynamics are investigated using numerical measures. The evaluation results manifest that the discrete memristor can enhance the chaos complexity and its coupling maps can generate hyperchaos. Particularly, the hyperchaotic sequences can nondestructively be controlled by memristor initial state and the initial-controlled hyperchaos is robust, which is applicable to many chaos-based applications. Additionally, we develop a hardware platform to implement the memristive maps and acquire the four-channel hyperchaotic sequences. We also apply the memristive maps to the application of secure communication and the experiments show that the memristive maps display better performance than some existing discrete maps.

115 citations


Journal ArticleDOI
TL;DR: These findings provide an atomistic understanding of non-volatile switching and open a new direction in precision defect engineering, down to a single defect, towards achieving the smallest memristor for applications in ultra-dense memory, neuromorphic computing and radio-frequency communication systems.
Abstract: Non-volatile resistive switching, also known as memristor1 effect, where an electric field switches the resistance states of a two-terminal device, has emerged as an important concept in the development of high-density information storage, computing and reconfigurable systems2–9. The past decade has witnessed substantial advances in non-volatile resistive switching materials such as metal oxides and solid electrolytes. It was long believed that leakage currents would prevent the observation of this phenomenon for nanometre-thin insulating layers. However, the recent discovery of non-volatile resistive switching in two-dimensional monolayers of transition metal dichalcogenide10,11 and hexagonal boron nitride12 sandwich structures (also known as atomristors) has refuted this belief and added a new materials dimension owing to the benefits of size scaling10,13. Here we elucidate the origin of the switching mechanism in atomic sheets using monolayer MoS2 as a model system. Atomistic imaging and spectroscopy reveal that metal substitution into a sulfur vacancy results in a non-volatile change in the resistance, which is corroborated by computational studies of defect structures and electronic states. These findings provide an atomistic understanding of non-volatile switching and open a new direction in precision defect engineering, down to a single defect, towards achieving the smallest memristor for applications in ultra-dense memory, neuromorphic computing and radio-frequency communication systems2,3,11. A combination of atomistic imaging and spectroscopy reveals that metal substitution into a sulfur vacancy is the underlying mechanism for resistive switching in transition metal dichalcogenide monolayers.

105 citations


Journal ArticleDOI
TL;DR: In this article, the effect of white Gaussian noise superimposed on the sub-threshold sinusoidal driving signal is analyzed through the time series statistics of the resistive switching parameters, the spectral response to a periodic perturbation and the signal-to-noise ratio at the output of the nonlinear system.
Abstract: The stochastic resonance phenomenon has been studied experimentally and theoretically for a state-of-art metal-oxide memristive device based on yttria-stabilized zirconium dioxide and tantalum pentoxide, which exhibits bipolar filamentary resistive switching of anionic type The effect of white Gaussian noise superimposed on the sub-threshold sinusoidal driving signal is analyzed through the time series statistics of the resistive switching parameters, the spectral response to a periodic perturbation and the signal-to-noise ratio at the output of the nonlinear system The stabilized resistive switching and the increased memristance response are revealed in the observed regularities at an optimal noise intensity corresponding to the stochastic resonance phenomenon and interpreted using a stochastic memristor model taking into account an external noise source added to the control voltage The obtained results clearly show that noise and fluctuations can play a constructive role in nonlinear memristive systems far from equilibrium

94 citations


Journal ArticleDOI
TL;DR: The presented model is viable to better characterize the actual firing activities in biological neurons than the Rulkov model when biophysical memory effect is supplied and can be used to simulate the magnetic induction effects in such a discrete neuron model.
Abstract: The magnetic induction effects have been emulated by various continuous memristive models but they have not been successfully described by a discrete memristive model yet. To address this issue, this paper first constructs a discrete memristor and then presents a discrete memristive Rulkov (m-Rulkov) neuron model. The bifurcation routes of the m-Rulkov model are declared by detecting the eigenvalue loci. Using numerical measures, we investigate complex dynamics in the m-Rulkov model, including regime transition behaviors, transient chaotic bursting regimes, and hyperchaotic firing behaviors, all of which are closely relied on the memristor parameter. Consequently, the involvement of memristor can be used to simulate the magnetic induction effects in such a discrete neuron model. Besides, we elaborate a hardware platform for implementing the m-Rulkov model and acquire diverse spiking-bursting sequences. These results show that the presented model is viable to better characterize the actual firing activities in biological neurons than the Rulkov model when biophysical memory effect is supplied.

91 citations


Journal ArticleDOI
TL;DR: In this article, the authors focus on the discussions of synaptic devices based neuromorphic computing applications in artificial intelligence and discuss future applications in neuromorphic vision, sensor, human machine intelligence, topological and quantum computing.

89 citations


Journal ArticleDOI
TL;DR: This paper designs a circuit that requires only one memristor crossbar for each unit in the LSTM cell, and uses word2vector instead of one-hot encoding for the input data encoding and proves the effectiveness of the proposed MLSTM system on IMDB and SemEval datasets.
Abstract: This paper presents a complete solution for the hardware design of a memristor-based long short-term memory (MLSTM) network. Throughout the design process, we fully consider the external and internal structures of the long short-term memory (LSTM), both of which are efficiently implemented by memristor crossbars. In the specific design of the internal structure, the parameter sharing mechanism is used between the LSTM cells to minimize the hardware design scale. In particular, we designed a circuit that requires only one memristor crossbar for each unit in the LSTM cell. The activation function, including sigmoid and tanh (hyperbolic tangent function), involved in each unit is approximated by a piecewise function, which is designed with the corresponding hardware. To verify the effectiveness of the system we designed, we test it on IMDB and SemEval datasets. Considering the huge impact of the dimensions of the input data on the scale of the hardware design, we use word2vector instead of one-hot encoding for the input data encoding. With the parameter sharing mechanism, the transformed vectors are input in different periods, so only 65 memristive crossbars are needed in the entire system to complete the sentiment analysis of the input text. The experimental results verify the effectiveness of our proposed MLSTM system.

86 citations



Journal ArticleDOI
TL;DR: A higher dimensional chaotic map based on the discrete memristor is presented, and numerical simulations show that the discrete Memristor model can not only enlarge the hyperchaotic region of the original system, but also enhance the system complexity.
Abstract: Although memristor has been widely discussed in recent years, the topic of memristor in discrete domain is rarely mentioned. This paper presents a higher dimensional chaotic map based on the discrete memristor, and the dynamic behavior of memristor at different positions is investigated by chaotic attractor phase diagram, bifurcation diagram, system state analysis and complexity algorithm. Numerical simulations show that the discrete memristor model can not only enlarge the hyperchaotic region of the original system, but also enhance the system complexity. Furthermore, the change of memristor position in the system leads to different performance. These deserve further study and lay the foundation for the future applications of the discrete memristor.

85 citations


Journal ArticleDOI
TL;DR: A general DM model and its unified mapping model is reported, which demonstrates that all the four 2D DM maps can generate hyperchaos with coexisting bi-stable or memristor initial-boosted behavior, and their sequences have excellent performance indictors.
Abstract: Regarding as a basic circuit component with special nonlinearity, memristor has been widely applied in chaotic circuits and neuromorphic circuits. However, discrete memristor (DM) has not been received much attention, yet. To this end, this paper reports a general DM model and its unified mapping model. Using the general DM model, four representations of DMs are given and their pinched hysteresis loops are exhibited. Based on the unified DM mapping model, four two-dimensional (2D) DM maps are generated and their parameter-relied and initials-relied behaviors are explored using multiple numerical measures. The results demonstrate that all the four 2D DM maps can generate hyperchaos with coexisting bi-stable or memristor initial-boosted behavior, and their sequences have excellent performance indictors. A hardware device is constructed to implement these maps and the analog voltage signals are experimentally acquired. Moreover, pseudo-random number generators (PRNGs) are designed using these DM maps and the test results show that the generated pseudo-random numbers (PRNs) have high randomness.

Journal ArticleDOI
TL;DR: Solution-based metal oxide RRAM devices are emergent and promising non-volatile memories for future electronics, being now a reliable technology that offers many advantages for resistive random-access memory (RRAM) such as high versatility, large area uniformity, transparency, low-cost and a simple fabrication of two-terminal structures.
Abstract: Metal oxide resistive switching memories have been a crucial component for the requirements of the Internet of Things, which demands ultra-low power and high-density devices with new computing principles, exploiting low cost green products and technologies. Most of the reported resistive switching devices use conventional methods (physical and chemical vapor deposition), which are quite expensive due to their up-scale production. Solution-processing methods have been improved, being now a reliable technology that offers many advantages for resistive random-access memory (RRAM) such as high versatility, large area uniformity, transparency, low-cost and a simple fabrication of two-terminal structures. Solution-based metal oxide RRAM devices are emergent and promising non-volatile memories for future electronics. In this review, a brief history of non-volatile memories is highlighted as well as the present status of solution-based metal oxide resistive random-access memory (S-RRAM). Then, a focus on describing the solution synthesis parameters of S-RRAMs which induce a massive influence in the overall performance of these devices is discussed. Next, a precise analysis is performed on the metal oxide thin film and electrode interface and the recent advances on S-RRAM that will allow their large-area manufacturing. Finally, the figures of merit and the main challenges in S-RRAMs are discussed and future trends are proposed.

Journal ArticleDOI
TL;DR: Multimodal in‐sensor computing provides the potential to reduce the underlying circuitry complexity of the traditional neuromorphic visual system and contributes to the development of intelligence in device‐level implementations.


Journal ArticleDOI
TL;DR: For the first time, a variable-order hyperchaotic system for information security is proposed, which shows more complex characteristics and more degrees of freedom due to the existence of time-varying fractional derivatives and is an appropriate choice for data transmission and information security.
Abstract: In the present paper, for the first time, we propose a variable-order hyperchaotic system for information security. Firstly, we study the dynamical behaviors of a memristor oscillator through well-known numerical and analytical tools, such as the Lyapunov exponents, stability of equilibria, and bifurcation diagram. Then as an engineering application, a variable-order fractional version of the system is proposed for sound encryption. In comparison with integer and conventional constant fractional-order chaotic memristor oscillator, the proposed variable-order fractional system shows more complex characteristics and more degrees of freedom due to the existence of time-varying fractional derivatives. Thus, the proposed system is an appropriate choice for data transmission and information security. To illustrate the proper performance of the suggested system for encryption purposes, sound encryption is successfully performed, and its excellent results are demonstrated. The predictor-corrector method is utilized for numerical simulation. Then, a new type-2 fuzzy disturbance observer-based robust control is offered for synchronization of the variable-order hyperchaotic system. The stability and convergence of the disturbance estimator and closed-loop system are proven. Lastly, the synchronization results, which confirm the appropriate performance of the proposed method in the presence of the external disturbances, are demonstrated.


Journal ArticleDOI
01 Sep 2021
TL;DR: Crossbar architecture is introduced, the origin of sneak‐path current is reviewed, techniques to mitigate this issue from the angle of materials and circuits are discussed, and the applications of memristive crossbars in both machine learning and neuromorphic computing are surveyed.
Abstract: The emergence of memristors with potential applications in data storage and artificial intelligence has attracted wide attentions. Memristors are assembled in crossbar arrays with data bits encoded by the resistance of individual cells. Despite the proposed high density and excellent scalability, the sneak-path current causing cross interference impedes their practical applications. Therefore, developing novel architectures to mitigate sneak-path current and improve efficiency, reliability, and stability may benefit next-generation storage-class memory (SCM). Moreover, conventional digital computers face the von-Neumann bottleneck and the slowdown of transistors’ scaling, imposing a big challenge to hardware artificial intelligence. Memristive crossbar features colocation of memory and processing units, as well as superior scalability, making it a promising candidate for hardware accelerating machine learning and neuromorphic computing. Herein, first, crossbar architecture is introduced. Then, for storage, the origin of sneak-path current is reviewed and techniques to mitigate this issue from the angle of materials and circuits are discussed. Computing wise, the applications of memristive crossbars in both machine learning and neuromorphic computing are surveyed, focusing on the structure of unit cells, the network topology, and the learning types. Finally, a perspective on future engineering and applications of memristive crossbars is discussed.

Journal ArticleDOI
01 Jan 2021
TL;DR: This Report serves as a guide for the hardware implementation of NCS based on large‐scale CBAs and recommends for further performance optimization at the device, circuit, and algorithm levels are proposed.
Abstract: Brain‐inspired neuromorphic computing is a new paradigm that holds great potential to overcome the intrinsic energy and speed issues of traditional von Neumann based computing architecture. With the ability to perform vector‐matrix multiplications and flexible tunable conductance, the memristor crossbar array (CBA) structure is one of the most promising candidates to realize neural cognitive systems. The boom in the development of memristive synapses and neurons has propelled the developments of artificial neural networks (ANNs) to emulate the highly hierarchically organized network of human brain in the past decade. To achieve this, realizing large scale, high‐density memristive CBAs is a prerequisite to constructing complex ANNs. Herein, the stringent requirements in device performance and array parameters for hardware ANNs are analyzed, and the efforts in addressing the associated challenges are discussed. Recent progress on the experimental demonstration of neuromorphic computing systems (NCSs) is presented. Recommendations for further performance optimization at the device, circuit, and algorithm levels are proposed. This Report serves as a guide for the hardware implementation of NCS based on large‐scale CBAs.

Journal ArticleDOI
TL;DR: Kim et al. as discussed by the authors reported a 64'×'64' passive crossbar circuit with ~99% functional nonvolatile metal-oxide memristors and achieved <26% coefficient of variance in memristor switching voltages.
Abstract: The superior density of passive analog-grade memristive crossbar circuits enables storing large neural network models directly on specialized neuromorphic chips to avoid costly off-chip communication. To ensure efficient use of such circuits in neuromorphic systems, memristor variations must be substantially lower than those of active memory devices. Here we report a 64 × 64 passive crossbar circuit with ~99% functional nonvolatile metal-oxide memristors. The fabrication technology is based on a foundry-compatible process with etch-down patterning and a low-temperature budget. The achieved <26% coefficient of variance in memristor switching voltages is sufficient for programming a 4K-pixel gray-scale pattern with a <4% relative tuning error on average. Analog properties are also successfully verified via experimental demonstration of a 64 × 10 vector-by-matrix multiplication with an average 1% relative conductance import accuracy to model the MNIST image classification by ex-situ trained single-layer perceptron, and modeling of a large-scale multilayer perceptron classifier based on more advanced conductance tuning algorithm. The superior density of passive analog memristive devices can potentially enable efficient implementation of very large scale neural networks; however, device to device variability is currently too large to take advantage of this. Here, Kim et al demonstrate an impressive reduction in this variability, with a large passive memristive array.

Journal ArticleDOI
TL;DR: In this paper, a fractional-order multistable locally active memristor is proposed for the first time, which has infinitely many coexisting pinched hysteresis loops under different initial states and wide locally active regions.
Abstract: Fractional calculus is closer to reality and has the same memory characteristics as memristor. Therefore, a fractional-order multistable locally active memristor is proposed for the first time in this paper, which has infinitely many coexisting pinched hysteresis loops under different initial states and wide locally active regions. Through the theoretical and numerical analysis, it is found that the fractional-order memristor has stronger locally active and memory characteristics and wider nonvolatile ranges than the integer-order memristor. Furthermore, this fractional-order memristor is applied in a chaotic system. It is found that oscillations occur only within the locally active regions. This chaotic system not only has complex and rich nonlinear dynamics such as infinitely many discrete equilibrium points, multistability and anti-monotonicity but also produces two new phenomena that have not been found in other chaotic systems. The first one is transient transition: the behavior of local chaos and local period transition alternately occurring. The second is state jump: the behavior of local period-4 oscillation or local chaotic oscillation jumping to local period-2 oscillation. Finally, the circuit simulation of the fractional-order multistable locally active memristive chaotic system using PSIM is carried out to verify the validity of the numerical simulation results.

Journal ArticleDOI
TL;DR: Based on this inequality, a new criterion for finite-time synchronization of fractional order memristor-based neural networks (FMNNs) with time delay is derived.

Journal ArticleDOI
TL;DR: In this paper, a locally active memristor with coexisting two stable pinched hysteresis loops and two local activity regions is proposed, and its nonvolatile memory, as well as locally active characteristics, is validated by the power-off plot and DC V-I plot.
Abstract: Local activity is regarded as the origin of complexity. In this study, a locally active memristor with coexisting two stable pinched hysteresis loops and two local activity regions is proposed. Its nonvolatile memory, as well as locally active characteristics, is validated by the power-off plot and DC V–I plot. Based on two-dimensional Hindmarsh–Rose and two-dimensional Fitzhugh–Nagumo neurons, a simple neural network is constructed by connecting the two neurons with the locally active memristor. Coexisting multiple firing patterns under different initial conditions are investigated by considering the coupling strength as a unique controlled parameter. The results suggest that the system exhibits coexisting periodic and chaotic bursting firing patterns as well as coexisting two periodic firing patterns with different topologies. Furthermore, state switching without parameters is also explored. In particular, phase synchronization of the memristor synapse-coupled neurons is discussed, which implies that two nonidentical neurons gradually become phase synchronized with the increase in the coupling strength. In order to confirm the effectiveness of numerical simulations, circuit simulations are included.

Journal ArticleDOI
TL;DR: In this paper, an interesting second-order memristor-based map model is constructed to three systems based on Caputo fractional-order difference, and their dynamic behaviors are investigated by the volt-ampere curve, bifurcation diagram, maximum Lyapunov exponent, attractor phase diagram, complexity analysis and basin of attraction.
Abstract: The mathematical modeling of memristor in discrete-time domain is an attractive new issue, but there are still some problems to be explored. This paper studies an interesting second-order memristor-based map model, and the model is constructed to three systems based on Caputo fractional-order difference. Their dynamic behaviors are investigated by the volt–ampere curve, bifurcation diagram, maximum Lyapunov exponent, attractor phase diagram, complexity analysis and basin of attraction. Numerical simulation analysis shows that the fractional-order system exhibits quasi periodic, chaos, coexisting attractors and other complex behaviors, which demonstrates more abundant dynamic behaviors of the fractional-order form. It lays a good foundation for the future analysis or engineering application of the discrete memristor.

Journal ArticleDOI
TL;DR: This brief is devoted to exploring the global Mittag–Leffler (ML) synchronization problem of fractional-order memristor neural networks with leakage delay via a hybrid adaptive controller and derives the novel algebraic sufficient condition for the global ML synchronization of FOMNNs.
Abstract: This brief is devoted to exploring the global Mittag–Leffler (ML) synchronization problem of fractional-order memristor neural networks (FOMNNs) with leakage delay via a hybrid adaptive controller. By applying Fillipov’s theory and the Lyapunov functional method, the novel algebraic sufficient condition for the global ML synchronization of FOMNNs is derived. Finally, a simulation example is presented to show the practicability of our findings.

Journal ArticleDOI
TL;DR: In this article, a record high 90% production yield in nm-scale 2D conjugated polymer memristors with homogeneous resistive switching was achieved with miniaturization and low power potentials.
Abstract: Polymer memristors with light weight and mechanical flexibility are preeminent candidates for low-power edge computing paradigms. However, the structural inhomogeneity of most polymers usually leads to random resistive switching characteristics, which lowers the production yield and reliability of nanoscale devices. In this contribution, we report that by adopting the two-dimensional conjugation strategy, a record high 90% production yield of polymer memristors has been achieved with miniaturization and low power potentials. By constructing coplanar macromolecules with 2D conjugated thiophene derivatives to enhance the π–π stacking and crystallinity of the thin film, homogeneous switching takes place across the entire polymer layer, with fast responses in 32 ns, D2D variation down to 3.16% ~ 8.29%, production yield approaching 90%, and scalability into 100 nm scale with tiny power consumption of ~ 10−15 J/bit. The polymer memristor array is capable of acting as both the arithmetic-logic element and multiply-accumulate accelerator for neuromorphic computing tasks. Though polymer memristors are promising for low‐power flexible edge computing applications, realizing efficient nanometer‐scale arrays remains a challenge. Here, the authors report a record high 90% production yield in nm‐scale 2D conjugated polymer memristors with homogeneous resistive switching.

Journal ArticleDOI
TL;DR: A simulated memristor implementation of a convolutional neural network (CNN) using the method of ex-situ training to train CNN in Tensorflow and then downloading the trained parameters to the Simulink system by compiling the conductance value of Memristor to test the proposed simulation model.
Abstract: This article presents a new convolution algorithm: convolution kernel first operated (CKFO), which can solve the problem that the actual calculation is not reduced after pruning the weight of the convolution neural network. According to the convolution algorithm, this article proposes a simulated memristor implementation of a convolutional neural network (CNN). After that, we use the method of ex-situ training to train CNN in Tensorflow and then download the trained parameters to the Simulink system by compiling the conductance value of memristor to test the proposed simulation model. Finally, the effectiveness of the proposed model is verified. In addition, we prune the weights of CNN and retrain it, then adjust the simulation model according to the parameters after being pruned. We are surprised to find that the convolution layer designed according to the new convolution algorithm can apply the results of the pruned weight without any modification to the circuit, which is very cumbersome in other memristor-based CNN because the distribution of the pruned weight is irregular. The parameters are reduced by 75.24% and the number of multiplication operations in the convolution layer was reduced by 30.1%, while the accuracy is just reduced by 0.06%.

Journal ArticleDOI
Lei Yuan1, Shuzhi Liu1, Weilin Chen1, Fei Fan1, Gang Liu1 
TL;DR: In this article, the working mechanism, material design strategy, and device performance of organic memory and memristors are reviewed.
Abstract: Facing the exponential growth of data digital communications and the advent of artificial intelligence, there is an urgent need for information technologies with huge storage capacity and efficient computing processing. However, the traditional von Neumann architecture and silicon-based storage and computing technology will reach their limits and cannot meet the storage requirements of ultrasmall size, ultrahigh density, and memory computing. Considering these issues, organic material resistance switching memory and memristor devices have become promising candidates for high-density storage, logic computing, and neuromorphic computing because of their advantages of fast speed, high energy efficiency, nonvolatile storage, and low cost. In this article, the working mechanism, material design strategy, and device performance of organic memory and memristors are reviewed.

Journal ArticleDOI
TL;DR: This paper proposes a flexible low-dimensional memristor based on boron nitride (BN), which has ultralow-power non-volatile memory characteristic, reliable digital memcomputing capabilities, and integrated ultrafast neuromorphic computing capabilities in a single in situ computing system.
Abstract: The data processing efficiency of traditional computers is suffering from the intrinsic limitation of physically separated processing and memory units. Logic-in-memory and brain-inspired neuromorphic computing are promising in-memory computing paradigms for improving the computing efficiency and avoiding high power consumption caused by extra data movement. However, memristors that can conduct digital memcomputing and neuromorphic computing simultaneously are limited by the difference in the information form between digital data and analogue data. In order to solve this problem, this paper proposes a flexible low-dimensional memristor based on boron nitride (BN), which has ultralow-power non-volatile memory characteristic, reliable digital memcomputing capabilities, and integrated ultrafast neuromorphic computing capabilities in a single in situ computing system. The logic-in-memory basis, including FALSE, material implication (IMP), and NAND, are implemented successfully. The power consumption of the proposed memristor per synaptic event (198 fJ) can be as low as biology (fJ level) and the response time (1 μs) of the neuromorphic computing is four orders of magnitude shorter than that of the human brain (10 ms), paving the way for wearable ultrahigh efficient next-generation in-memory computing architectures.

Journal ArticleDOI
TL;DR: In this article, a memristor crossbar array with programmable conductance was proposed to overcome the energy consumption and speed limitations of neural networks when executing core computing tasks in image processing.
Abstract: Memristor crossbar with programmable conductance could overcome the energy consumption and speed limitations of neural networks when executing core computing tasks in image processing. However, the implementation of crossbar array (CBA) based on ultrathin 2D materials is hindered by challenges associated with large-scale material synthesis and device integration. Here, a memristor CBA is demonstrated using wafer-scale (2-inch) polycrystalline hafnium diselenide (HfSe2 ) grown by molecular beam epitaxy, and a metal-assisted van der Waals transfer technique. The memristor exhibits small switching voltage (0.6 V), low switching energy (0.82 pJ), and simultaneously achieves emulation of synaptic weight plasticity. Furthermore, the CBA enables artificial neural network with a high recognition accuracy of 93.34%. Hardware multiply-and-accumulate (MAC) operation with a narrow error distribution of 0.29% is also demonstrated, and a high power efficiency of greater than 8-trillion operations per second per Watt is achieved. Based on the MAC results, hardware convolution image processing can be performed using programmable kernels (i.e., soft, horizontal, and vertical edge enhancement), which constitutes a vital function for neural network hardware.

Journal ArticleDOI
20 Sep 2021-ACS Nano
TL;DR: In this article, the authors proposed a fully memristor-based artificial visual perception nervous system (AVPNS) which consists of a quantum-dot-based photoelectric memrisor and a nanosheet-based threshold-switching (TS) memrisors.
Abstract: The visual perception system is the most important system for human learning since it receives over 80% of the learning information from the outside world. With the exponential growth of artificial intelligence technology, there is a pressing need for high-energy and area-efficiency visual perception systems capable of processing efficiently the received natural information. Currently, memristors with their elaborate dynamics, excellent scalability, and information (e.g., visual, pressure, sound, etc.) perception ability exhibit tremendous potential for the application of visual perception. Here, we propose a fully memristor-based artificial visual perception nervous system (AVPNS) which consists of a quantum-dot-based photoelectric memristor and a nanosheet-based threshold-switching (TS) memristor. We use a photoelectric and a TS memristor to implement the synapse and leaky integrate-and-fire (LIF) neuron functions, respectively. With the proposed AVPNS we successfully demonstrate the biological image perception, integration and fire, as well as the biosensitization process. Furthermore, the self-regulation process of a speed meeting control system in driverless automobiles can be accurately and conceptually emulated by this system. Our work shows that the functions of the biological visual nervous system may be systematically emulated by a memristor-based hardware system, thus expanding the spectrum of memristor applications in artificial intelligence.