Topic
Memristor
About: Memristor is a research topic. Over the lifetime, 6014 publications have been published within this topic receiving 134936 citations.
Papers published on a yearly basis
Papers
More filters
TL;DR: In this article , a combinatorial screening approach was used to reveal improved performance and memory characteristics of memristive devices by using an Nb-Ta thin film library, with a total compositional spread ranging between 13 and 80 at.% Ta alloy.
1 citations
TL;DR: Wang et al. as mentioned in this paper proposed a method for obtaining highly robust memristor based binarized convolutional neural network, which can still achieve more than 96.75% recognition rate on MNIST dataset under the condition of 80% yield of the MEMristor array, and the recognition rate was 94.53% when the variation of memristance is 26%, and it is 94.66% when variation of the neuron output is 0.8.
Abstract: Abstract Recently, memristor based binarized convolutional neural network has been widely investigated owing to its strong processing capability, low power consumption and high computing efficiency.However, it has not been widely applied in the field of embedded neuromorphic computing for manufacturing technology of the memristor being not mature. With respect to this, we propose a method for obtaining highly robust memristor based binarized convolutional neural network. To demonstrate the performance of the method, a convolutional neural network architecture with two layers is used for simulation, and the simulation results show that binarized convolutional neural network can still achieve more than 96.75% recognition rate on MNIST dataset under the condition of 80% yield of the memristor array, and the recognition rate is 94.53% when the variation of memristance is 26%, and it is 94.66% when the variation of the neuron output is 0.8.
1 citations
TL;DR: In this article , the memory of conical channels in brain-inspired iontronic circuits was shown to arise from transient concentration polarization over the ionic diffusion time, and an analytic approximation for these dynamics was derived, which showed good agreement with full finite element calculations.
Abstract: Experiments have shown that the conductance of conical channels, filled with an aqueous electrolyte, can strongly depend on the history of the applied voltage. These channels hence have a memory and are promising elements in brain-inspired (iontronic) circuits. We show here that the memory of such channels stems from transient concentration polarization over the ionic diffusion time. We derive an analytic approximation for these dynamics which shows good agreement with full finite-element calculations. Using our analytic approximation, we propose an experimentally realisable Hodgkin-Huxley iontronic circuit where micrometer cones take on the role of sodium and potassium channels. Our proposed circuit exhibits key features of neuronal communication such as all-or-none action potentials upon a pulse stimulus and a spike train upon a sustained stimulus.
1 citations
07 Aug 2022
TL;DR: In this article , the authors present a comprehensive circuit simulation model for the hafnium-dioxide (HfO) based memristor device, which incorporates LRS/HRS variability and stochasticity into the resistance switching dynamics to help the circuit designer assess reliability.
Abstract: This paper presents a novel comprehensive circuit simulation model for the hafnium-dioxide (HfO 2 ) based memristor device. HfO 2 memristors exhibit stochasticity and variability in resistance values, both in Low Resistance State (LRS) and High Resistance State (HRS), limiting their usage and performance. Based on the experimental data, the LRS and HRS variability are also influenced by the current compliance and reset voltage of these devices. The proposed Verilog-A model incorporates LRS/HRS variability and stochasticity into the resistance switching dynamics to help the circuit designer assess reliability. The model is based on empirical data and verified by the experimental measurements of HfO 2 memristors fabricated in a 65 nm CMOS/memristor process manufactured by SUNY Polytechnic Institute. It also captures the temperature dependency of the device making it a more comprehensive model. Simulation results show excellent agreement with experimental measurements. The model also verifies the tunabilty of LRS and HRS through the compliance current and magnitude of reset voltage, respectively. The I-V characteristic along with ITIR circuit simulation results for the device followed by benchmarking circuit simulation for demonstrating convergence in Cadence Spectre are also presented.
1 citations
02 Mar 2022
TL;DR: In this paper , the authors present a memristive emulator designed using a switched capacitor (SC), that is, an analog component/block and a control part or block implemented using stochastic computing (SCo) and therefore fully digital.
Abstract: Due to the increased use of memristors and their many applications, the use of emulators has grown in parallel to avoid some of the difficulties presented by real devices, such as variability and reliability. In this paper, we present a memristive emulator designed using a switched capacitor (SC), that is, an analog component/block and a control part or block implemented using stochastic computing (SCo) and therefore fully digital. Our design is thus a mixed signal circuit. Memristor equations are implemented using stochastic computing to generate the control signals necessary to work with the controllable resistor implemented as a switched capacitor.
1 citations