MOSFET

About: MOSFET is a research topic. Over the lifetime, 24833 publications have been published within this topic receiving 400258 citations. The topic is also known as: metal–oxide–semiconductor field-effect transistor.

Device scaling limits of Si MOSFETs and their application dependencies

Abstract: This paper presents the current state of understanding of the factors that limit the continued scaling of Si complementary metal-oxide-semiconductor (CMOS) technology and provides an analysis of the ways in which application-related considerations enter into the determination of these limits. The physical origins of these limits are primarily in the tunneling currents, which leak through the various barriers in a MOS field-effect transistor (MOSFET) when it becomes very small, and in the thermally generated subthreshold currents. The dependence of these leakages on MOSFET geometry and structure is discussed along with design criteria for minimizing short-channel effects and other issues related to scaling. Scaling limits due to these leakage currents arise from application constraints related to power consumption and circuit functionality. We describe how these constraints work out for some of the most important application classes: dynamic random access memory (DRAM), static random access memory (SRAM), low-power portable devices, and moderate and high-performance CMOS logic. As a summary, we provide a table of our estimates of the scaling limits for various applications and device types. The end result is that there is no single end point for scaling, but that instead there are many end points, each optimally adapted to its particular applications.

Low-Voltage Tunnel Transistors for Beyond CMOS Logic

Abstract: Steep subthreshold swing transistors based on interband tunneling are examined toward extending the performance of electronics systems. In particular, this review introduces and summarizes progress in the development of the tunnel field-effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges. The promise of the TFET is in its ability to provide higher drive current than the MOSFET as supply voltages approach 0.1 V.

1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS

Abstract: 1-V power supply high-speed low-power digital circuit technology with 0.5-/spl mu/m multithreshold-voltage CMOS (MTCMOS) is proposed. This technology features both low-threshold voltage and high-threshold voltage MOSFET's in a single LSI. The low-threshold voltage MOSFET's enhance speed performance at a low supply voltage of 1 V or less, while the high-threshold voltage MOSFET's suppress the stand-by leakage current during the sleep period. This technology has brought about logic gate characteristics of a 1.7-ns propagation delay time and 0.3-/spl mu/W/MHz/gate power dissipation with a standard load. In addition, an MTCMOS standard cell library has been developed so that conventional CAD tools can be used to lay out low-voltage LSI's. To demonstrate MTCMOS's effectiveness, a PLL LSI based on standard cells was designed as a carrying vehicle. 18-MHz operation at 1 V was achieved using a 0.5-/spl mu/m CMOS process. >

Comparison of 6H-SiC, 3C-SiC, and Si for power devices

Abstract: The drift region properties of 6H- and 3C-SiC-based Schottky rectifiers and power MOSFETs that result in breakdown voltages from 50 to 5000 V are defined. Using these values, the output characteristics of the devices are calculated and compared with those of Si devices. It is found that due to very low drift region resistance, 5000-V SiC Schottky rectifiers and power MOSFETs can deliver on-state current density of 100 A/cm/sup 2/ at room temperature with a forward drop of only 3.85 and 2.95 V, respectively. Both devices are expected to have excellent switching characteristics and ruggedness due to the absence of minority-carrier injection. A thermal analysis shows that 5000-V, 6H-, and 3C-SiC MOSFETs and Schottky rectifiers would be approximately 20 and 18 times smaller than corresponding Si devices, and that operation at higher temperatures and at higher breakdown voltages than conventional Si devices is possible. Also, a significant reduction in the die size is expected. >

Scaling the Si MOSFET: from bulk to SOI to bulk

Abstract: Scaling the Si MOSFET is reconsidered. Requirements on subthreshold leakage control force conventional scaling to use high doping as the device dimension penetrates into the deep-submicrometer regime, leading to an undesirably large junction capacitance and degraded mobility. By studying the scaling of fully depleted SOI devices, the important concept of controlling horizontal leakage through vertical structures is highlighted. Several structural variations of conventional SOI structures are discussed in terms of a natural length scale to guide the design. The concept of vertical doping engineering can also be realized in bulk Si to obtain good subthreshold characteristics without large junction capacitance or heavy channel doping. >