Showing papers on "Nanoelectronics published in 2003"

Ballistic carbon nanotube field-effect transistors

Abstract: A common feature of the single-walled carbon-nanotube field-effect transistors fabricated to date has been the presence of a Schottky barrier at the nanotube–metal junctions1,2,3. These energy barriers severely limit transistor conductance in the ‘ON’ state, and reduce the current delivery capability—a key determinant of device performance. Here we show that contacting semiconducting single-walled nanotubes by palladium, a noble metal with high work function and good wetting interactions with nanotubes, greatly reduces or eliminates the barriers for transport through the valence band of nanotubes. In situ modification of the electrode work function by hydrogen is carried out to shed light on the nature of the contacts. With Pd contacts, the ‘ON’ states of semiconducting nanotubes can behave like ohmically contacted ballistic metallic tubes, exhibiting room-temperature conductance near the ballistic transport limit of 4e2/h (refs 4–6), high current-carrying capability (∼25 µA per tube), and Fabry–Perot interferences5 at low temperatures. Under high voltage operation, the current saturation appears to be set by backscattering of the charge carriers by optical phonons. High-performance ballistic nanotube field-effect transistors with zero or slightly negative Schottky barriers are thus realized.

High Performance Silicon Nanowire Field Effect Transistors

Abstract: Silicon nanowires can be prepared with single-crystal structures, diameters as small as several nanometers and controllable hole and electron doping, and thus represent powerful building blocks for nanoelectronics devices such as field effect transistors. To explore the potential limits of silicon nanowire transistors, we have examined the influence of source-drain contact thermal annealing and surface passivation on key transistor properties. Thermal annealing and passivation of oxide defects using chemical modification were found to increase the average transconductance from 45 to 800 nS and average mobility from 30 to 560 cm 2 /V‚s with peak values of 2000 nS and 1350 cm 2 /V‚s, respectively. The comparison of these results and other key parameters with state-of-the-art planar silicon devices shows substantial advantages for silicon nanowires. The uses of nanowires as building blocks for future nanoelectronics are discussed.

Rotational actuators based on carbon nanotubes

Abstract: Nanostructures are of great interest not only for their basic scientific richness, but also because they have the potential to revolutionize critical technologies. The miniaturization of electronic devices over the past century has profoundly affected human communication, computation, manufacturing and transportation systems. True molecular-scale electronic devices are now emerging that set the stage for future integrated nanoelectronics. Recently, there have been dramatic parallel advances in the miniaturization of mechanical and electromechanical devices. Commercial microelectromechanical systems now reach the submillimetre to micrometre size scale, and there is intense interest in the creation of next-generation synthetic nanometre-scale electromechanical systems. We report on the construction and successful operation of a fully synthetic nanoscale electromechanical actuator incorporating a rotatable metal plate, with a multi-walled carbon nanotube serving as the key motion-enabling element.

Hysteresis caused by water molecules in carbon nanotube field-effect transistors

Abstract: Carbon nanotube field-effect transistors commonly comprise nanotubes lying on SiO2 surfaces exposed to the ambient environment. It is shown here that the transistors exhibit hysteresis in their electrical characteristics because of charge trapping by water molecules around the nanotubes, including SiO2 surface-bound water proximal to the nanotubes. Hysteresis persists for the transistors in vacuum since the SiO2-bound water does not completely desorb in vacuum at room temperature, a known phenomenon in SiO2 surface chemistry. Heating under dry conditions significantly removes water and reduces hysteresis in the transistors. Nearly hysteresis-free transistors are obtainable by passivating the devices with polymers that hydrogen bond with silanol groups on SiO2 (e.g., with poly(methyl methacrylate) (PMMA)). However, nanotube humidity sensors could be explored with suitable water-sensitive coatings. The results may have implications to field-effect transistors made from other chemically derived materials.

Ultrahigh-Density Nanowire Lattices and Circuits

Abstract: We describe a general method for producing ultrahigh-density arrays of aligned metal and semiconductor nanowires and nanowire circuits. The technique is based on translating thin film growth thickness control into planar wire arrays. Nanowires were fabricated with diameters and pitches (center-to-center distances) as small as 8 nanometers and 16 nanometers, respectively. The nanowires have high aspect ratios (up to 106), and the process can be carried out multiple times to produce simple circuits of crossed nanowires with a nanowire junction density in excess of 1011 per square centimeter. The nanowires can also be used in nanomechanical devices; a high-frequency nanomechanical resonator is demonstrated.

Science and Technology of the Twenty-First Century: Synthesis, Properties, and Applications of Carbon Nanotubes

Abstract: ▪ Abstract This account reviews the discovery, synthesis, properties, and the latest research advances of carbon nanotubes developed over the past 12 years. Because of their remarkable electronic and mechanical properties, carbon nanotubes are unique and exciting. The field has been developed rapidly, and the number of publications per year is increasing almost exponentially. Various technological applications are likely to arise using nanotubes for fabrication of flat panel displays, gas storage devices, toxic gas sensors, Li+ batteries, robust and lightweight composites, conducting paints, electronic nanodevices, etc. Further experimental and theoretical research is still necessary so that novel technologies will become a reality in the early twenty-first century.

Large-scale hierarchical organization of nanowire arrays for integrated nanosystems

Abstract: The assembly of nanowires and nanotubes into arrays patterned on multiple length scales is critical to the realization of integrated electronic and photonic nanotechnologies. A general and efficient solution-based method for controlling organization and hierarchy of nanowire structures over large areas has been developed. Nanowires were aligned with controlled nanometer to micrometer scale pitch using the Langmuir−Blodgett technique and transferred to planar substrates in a layer-by-layer process to form parallel and crossed nanowire structures. The parallel and crossed nanowire structures were efficiently patterned into repeating arrays of controlled dimensions and pitch using photolithography to yield hierarchical structures with order defined from the nanometer through centimeter length scales. In addition, electrical transport studies show that reliable electrical contacts can be made to the hierarchical nanowire arrays prepared by this method. This solution-based process offers a flexible pathway for...

Carbon nanotube electronics

Abstract: We evaluate the potential of carbon nanotubes (CNTs) as the basis for a new nanoelectronic technology. After briefly reviewing the electronic structure and transport properties of CNTs, we discuss the fabrication of CNT field-effect transistors (CNTFETs) formed from individual single-walled nanotubes (SWCNTs), SWCNT bundles, or multiwalled (MW) CNTs. The performance characteristics of the CNTFETs are discussed and compared to those of corresponding silicon devices. We show that CNTFETs are very competitive with state-of-the-art conventional devices. We also discuss the switching mechanism of CNTFETs and show that it involves the modulation by the gate field of Schottky barriers at the metal-CNT junctions. This switching mechanism can account for the observed subthreshold and vertical scaling behavior of CNTFETs, as well as their sensitivity to atmospheric oxygen. The potential for integration of CNT devices is demonstrated by fabricating a logic gate along a single nanotube molecule. Finally, we discuss our efforts to grow CNTs locally and selectively, and a method is presented for growing oriented SWCNTs without the involvement of a metal catalyst.

DNA-Templated Carbon Nanotube Field-Effect Transistor

Abstract: The combination of their electronic properties and dimensions makes carbon nanotubes ideal building blocks for molecular electronics. However, the advancement of carbon nanotube-based electronics requires assembly strategies that allow their precise localization and interconnection. Using a scheme based on recognition between molecular building blocks, we report the realization of a self-assembled carbon nanotube field-effect transistor operating at room temperature. A DNA scaffold molecule provides the address for precise localization of a semiconducting single-wall carbon nanotube as well as the template for the extended metallic wires contacting it.

Theory of ballistic nanotransistors

Abstract: Numerical simulations are used to guide the development of a simple analytical theory for ballistic field-effect transistors. When two-dimensional (2-D) electrostatic effects are small (and when the insulator capacitance is much less than the semiconductor (quantum) capacitance), the model reduces to Natori's theory of the ballistic MOSFET. The model also treats 2-D electrostatics and the quantum capacitance limit where the semiconductor quantum capacitance is much less than the insulator capacitance. This new model provides insights into the performance of MOSFETs near the scaling limit and a unified framework for assessing and comparing a variety of novel transistors.

Nanoscale molecular-switch crossbar circuits

Abstract: Molecular electronics offer an alternative pathway to construct nanoscale circuits in which the critical dimension is naturally associated with molecular sizes. We describe the fabrication and testing of nanoscale molecular-electronic circuits that comprise a molecular monolayer of [2]rotaxanes sandwiched between metal nanowires to form an 8 × 8 crossbar within a 1 µm 2 area. The resistance at each cross point of the crossbar can be switched reversibly. By using each cross point as an active memory cell, crossbar circuits were operated as rewritable, nonvolatile memory with a density of 6. 4G bits cm −2 .B ys etting the resistances at specific cross points, two 4 × 4s ubarrays of the crossbar were configured to be a nanoscale demultiplexer and multiplexer that were used to read memory bits in a third subarray.

Array-based architecture for FET-based, nanoscale electronics

Abstract: Advances in our basic scientific understanding at the molecular and atomic level place us on the verge of engineering designer structures with key features at the single nanometer scale. This offers us the opportunity to design computing systems at what may be the ultimate limits on device size. At this scale, we are faced with new challenges and a new cost structure which motivates different computing architectures than we found efficient and appropriate in conventional very large scale integration (VLSI). We sketch a basic architecture for nanoscale electronics based on carbon nanotubes, silicon nanowires, and nano-scale FETs. This architecture can provide universal logic functionality with all logic and signal restoration operating at the nanoscale. The key properties of this architecture are its minimalism, defect tolerance, and compatibility with emerging bottom-up nanoscale fabrication techniques. The architecture further supports micro-to-nanoscale interfacing for communication with conventional integrated circuits and bootstrap loading.

Electron beam lithography in nanoscale fabrication: recent development

Abstract: Miniaturization is the central theme in modern fabrication technology. Many of the components used in modern products are getting smaller and smaller. In this paper, the recent development of the electron beam lithography technique is reviewed with an emphasis on fabricating devices at the nanometer scale. Because of its very short wavelength and reasonable energy density characteristics, e-beam lithography has the ability to fabricate patterns having nanometer feature sizes. As a result, many nanoscale devices have been successfully fabricated by this technique. Following an introduction of this technique, recent developments in processing, tooling, resist, and pattern controlling are separately examined and discussed. Examples of nanodevices made by several different e-beam lithographic schemes are given, to illustrate the versatility and advancement of the e-beam lithography technique. Finally, future trends in this technique are discussed.

An RF circuit model for carbon nanotubes

Abstract: We develop an RF circuit model for single walled carbon nanotubes for both dc and capacitively contacted geometries. By modeling the nanotube as a nanotransmission line with distributed kinetic and magnetic inductance as well as distributed quantum and electrostatic capacitance, we calculate the complex, frequency dependent impedance for a variety of measurement geometries. Exciting voltage waves on the nanotransmission line is equivalent to directly exciting the yet-to-be observed one dimensional plasmons, the low energy excitation of a Luttinger liquid.

Flexible Nanotube Electronics

Abstract: Nanotube network transistors have been transferred to polymer supports. The polymer-supported networks can be bent through at least 60° angles without changing their electronic properties. They ope...

High-Performance Nanowire Electronics and Photonics on Glass and Plastic Substrates

Abstract: The merger of nanoscale building blocks with flexible and/or low cost substrates could enable the development of high-performance electronic and photonic devices with the potential to impact a broad spectrum of applications. Here we demonstrate that high-quality, single-crystal nanowires can be assembled onto inexpensive glass and flexible plastic substrates to create basic transistor and light-emitting diode devices. In our approach, the high-temperature synthesis of single-crystal nanowires is separated from ambient-temperature solution-based assembly to enable the fabrication of single-crystal-like devices on virtually any substrate. Silicon nanowire field-effect transistors were assembled on glass and plastic substrates and display device parameters rivaling those of single-crystal silicon and exceeding those of state-of-the-art amorphous silicon and organic transistors currently used for flexible electronics on plastic substrates. Nanowire transistor devices have been configured as low-threshold logi...

Metal silicides in CMOS technology : Past, present, and future trends

Abstract: Metal silicides have played an indispensable role in the rapid developments of microelectronics since PtSi was first used to improve the rectifying characteristics of diodes in early 1960s. This wo ...

Photonic Crystals Based on Periodic Arrays of Aligned Carbon Nanotubes

Abstract: We demonstrate here that large area periodic arrays of well-aligned carbon nanotubes can be fabricated inexpensively on Ni dots made by the process of self-assembly nanosphere lithography. These periodic arrays appear colorful due to their efficient reflection and diffraction of visible light. In addition, due to their honeycomb lattice structure, these arrays can act as photonic band gap crystals in the visible frequency range. In this report, we present the initial exploration of the optical properties of such arrays. Here we show that these potential 2D photonic band gap crystal arrays might find very important applications in optoelectronics.

Covalent Coupling of Quantum Dots to Multiwalled Carbon Nanotubes for Electronic Device Applications

Abstract: We report the controlled synthesis of multiwalled carbon nanotube−quantum dot (CNT-QD) heterojunctions using the ethylene carbodiimide coupling procedure (EDC). Thiol-stabilized ZnS-capped CdSe quantum dots containing amine terminal groups (QD−NH2) were conjugated with acid-treated multiwalled carbon nanotubes (MWCNT) ranging from 400 nm to 4 μm in length. Scanning and transmission electron microscopy were used to characterize the conjugation process.

Synthesis and characterization of faceted hexagonal aluminum nitride nanotubes.

Abstract: The synthesis of the faceted single-crystalline h-AlN nanotubes with the length of a few micrometers and diameters from 30 to 80 nm is first reported. This provides an ideal substrate for the construction of GaN-based nanoheterostructures in future nanoelectronics. The experimental results suggest the further extensive experimental and theoretical studies on the promising nonlayered nanotubular structures.

Assembly of nanodevices with carbon nanotubes through nanorobotic manipulations

Abstract: Properties and potential applications of carbon nanotubes are summarized by emphasizing the aspects of nanoelectronics and nanoelectromechanical systems (NEMS). The main technologies for the assembly of nanodevices through nanomanipulations with scanning probe microscopes and nanorobotic manipulators are overviewed, focusing on that of nanotubes. Key techniques for nanoassembly include the preparation of nano building blocks and property characterization of them, the positioning of the building blocks with nanometer-scale resolution, and the connection of them. Nanorobotic manipulations, which are characterized by multiple degrees of freedom (DOFs) with both position and orientation control, independently actuated multiprobes, and a real-time observation system, are one of the most promising technologies for assembling complex nanodevices in three-dimensional space. With a nano laboratory, a prototype nanomanufacturing system based on a 16-DOF nanorobotic manipulation system, the assembly of nanodevices with multiwalled carbon nanotubes are presented. Nanotube-based building blocks are prepared by directly picking up, in situ property characterization, destructive fabrication, and shape modifications. Kinds of nanotube junctions, the fundamental elements for both nanoelectronics and NEMS, are constructed by positioning the building blocks together under the real-time observation with a field-emission scanning electron microscope, connecting them with naturally existing van der Waals forces, electron-beam-induced deposition, or mechanochemical bonding.

Nanoscale molecular-switch devices fabricated by imprint lithography

Abstract: Nanoscale molecular-electronic devices comprising a single molecular monolayer of bistable [2]rotaxanes sandwiched between two 40-nm metal electrodes were fabricated using imprint lithography. Bistable current–voltage characteristics with high on–off ratios and reversible switching properties were observed. Such devices may function as basic elements for future ultradense electronic circuitry.

Molecular electronics: from devices and interconnect to circuits and architecture

Abstract: As the dominating CMOS technology is fast approaching a "brick wall," new opportunities arise for competing solutions. Nanoelectronics has achieved several breakthroughs lately and promises to overcome many of the limitations intrinsic to current semiconductor approaches. Most of the results in this area reported until now focus on devices and interconnect; this work goes several steps further and presents issues related to circuits and architecture. Based on proposed nanoscale interconnect and device structures, we explore the design space available to the nanoelectronic circuit designer and system architect.

Nanoelectronics and Information Technology: Advanced Electronic Materials and Novel Devices

Abstract: From the Publisher: Providing an introduction to electronic materials and device concepts for the major areas of current and future information technology, the value of this book lies in its focus on the underlying principles. Illustrated by contemporary examples, these basic principles will hold, despite the rapid developments in this field, especially emphasizing nanoelectronics. There is hardly any field where the links between basic science and application are tighter than in nanoelectronics & information technology. As an example, the design of resonant tunneling transistors, single electron devices or molecular electronic structures is simply inconceivable without delving deep into quantum mechanics. This textbook is primarily aimed at students of physics, electrical engineering and information technology, as well as material science in their 3rd year and higher. It is equally of interest to professionals wanting a broader overview of this hot topic.

Extremely scaled silicon nano-CMOS devices

Abstract: Silicon-based CMOS technology can be scaled well into the nanometer regime. High-performance, planar, ultrathin-body devices fabricated on silicon-on-insulator substrates have been demonstrated down to 15-nm gate lengths. We have also introduced the FinFET, a double-gate device structure that is relatively simple to fabricate and can be scaled to gate lengths below 10 nm. In this paper, some of the key elements of these technologies are described, including sublithographic patterning, the effects of crystal orientation and roughness on carrier mobility, gate work function engineering, circuit performance, and sensitivity to process-induced variations.

Beyond Moore's Law: the interconnect era

Abstract: Reversing early limitations on Moore's low, interconnectors have replaced transistors as the main determinants of chip performance. This "tyranny of interconnectors" will only escalate in the future, and thus the nanoelectronics that follow silicon must be interconnect-centric. This new technology will likely use "transistors" that approach, if not surpass, the 0.1 ps latency of 10 nm generation silicon transistors. Consequently, if we optimistically assume that the interconnects of this post-Moore's Law nanotechnology will be superconductive, their latency will exceed that of the transistors for interconnect lengths greater than 30 /spl mu/m, while long, on-chip interconnect lengths will be 1,000 times greater at 30 mm. Consequently, mainstream electronics will have an interconnect era beyond Moore's law.

Stochastic assembly of sublithographic nanoscale interfaces

Abstract: We describe a technique for addressing individual nanoscale wires with microscale control wires without using lithographic-scale processing to define nanoscale dimensions. Such a scheme is necessary to exploit sublithographic nanoscale storage and computational devices. Our technique uses modulation doping to address individual nanowires and self-assembly to organize them into nanoscale-pitch decoder arrays. We show that if coded nanowires are chosen at random from a sufficiently large population, we can ensure that a large fraction of the selected nanowires have unique addresses. For example, we show that N lines can be uniquely addressed over 99% of the time using no more than /spl lceil/2.2log/sub 2/(N)/spl rceil/+11 address wires. We further show a hybrid decoder scheme that only needs to address N=O(W/sub litho-pitch//W/sub nano-pitch/) wires at a time through this stochastic scheme; as a result, the number of unique codes required for the nanowires does not grow with decoder size. We give an O(N/sup 2/) procedure to discover the addresses which are present. We also demonstrate schemes that tolerate the misalignment of nanowires which can occur during the self-assembly process.

CMOS/nano co-design for crossbar-based molecular electronic systems

Abstract: Future electronic systems will need to adopt novel nanoelectronic solutions to keep pace with Moore's Law Crossbar-based molecular electronics are among the most promising of nanotechnologies However, circuits similar to the conventional mainstream electronics of today will have a presence in future complex systems for some time This paper presents a circuit paradigm where silicon and molecular electronics are integrated We discuss methods for realizing memory and logic using nanoscale crossbars as well as for interfacing the crossbars to CMOS circuitry Using custom nanoscale device models, we perform circuit simulation and analysis of the crossbar circuits and the peripheral CMOS circuitry Finally, we present a design methodology to accompany the CMOS/nano paradigm