Showing papers on "Nanoelectronics published in 2006"

Ge/Si nanowire heterostructures as high-performance field-effect transistors

Abstract: Field-effect transistors (FETs) based on semi-conductor nanowires could one day replace standard silicon MOSFETs in miniature electronic circuits. MOSFETs, or metal-oxide semiconductor field-effect transistors, are a type of transistor used for high-speed switching and in a computer's integrated circuits. A specially designed nanowire with a germanium shell and silicon core has shown promise as a nanometre-scale field-effect transistor: it has a near-perfect channel for electronic conduction. Now, in transistor configuration, this germanium/silicon nanowire is shown to have properties including high conductance and short switching time delay that are better than state-of-the-art silicon MOSFETs. In a transistor configuration, a new germanium/silicon nanowire has characteristics such as conductance, on-current and switching time delay that are better than those of state-of-the-art silicon metal-oxide-semiconductor field-effect transitors. Semiconducting carbon nanotubes1,2 and nanowires3 are potential alternatives to planar metal-oxide-semiconductor field-effect transistors (MOSFETs)4 owing, for example, to their unique electronic structure and reduced carrier scattering caused by one-dimensional quantum confinement effects1,5. Studies have demonstrated long carrier mean free paths at room temperature in both carbon nanotubes1,6 and Ge/Si core/shell nanowires7. In the case of carbon nanotube FETs, devices have been fabricated that work close to the ballistic limit8. Applications of high-performance carbon nanotube FETs have been hindered, however, by difficulties in producing uniform semiconducting nanotubes, a factor not limiting nanowires, which have been prepared with reproducible electronic properties in high yield as required for large-scale integrated systems3,9,10. Yet whether nanowire field-effect transistors (NWFETs) can indeed outperform their planar counterparts is still unclear4. Here we report studies on Ge/Si core/shell nanowire heterostructures configured as FETs using high-κ dielectrics in a top-gate geometry. The clean one-dimensional hole-gas in the Ge/Si nanowire heterostructures7 and enhanced gate coupling with high-κ dielectrics give high-performance FETs values of the scaled transconductance (3.3 mS µm-1) and on-current (2.1 mA µm-1) that are three to four times greater than state-of-the-art MOSFETs and are the highest obtained on NWFETs. Furthermore, comparison of the intrinsic switching delay, τ = CV/I, which represents a key metric for device applications4,11, shows that the performance of Ge/Si NWFETs is comparable to similar length carbon nanotube FETs and substantially exceeds the length-dependent scaling of planar silicon MOSFETs.

Silicon Vertically Integrated Nanowire Field Effect Transistors

Abstract: Silicon nanowires have received considerable attention as transistor components because they represent a facile route toward sub-100-nm single-crystalline Si features. Herein we demonstrate the direct vertical integration of Si nanowire arrays into surrounding gate field effect transistors without the need for postgrowth nanowire assembly processes. The device fabrication allows Si nanowire channel diameters to be readily reduced to the 5-nm regime. These first-generation vertically integrated nanowire field effect transistors (VINFETs) exhibit electronic properties that are comparable to other horizontal nanowire field effect transistors (FETs) and may, with further optimization, compete with advanced solid-state nanoelectronic devices.

Towards molecular electronics with large-area molecular junctions

Abstract: The use of molecular electronics is a much-discussed alternative to conventional silicon devices: the prospect of such tiny components has obvious implications for miniaturization. One approach is to replace the conventional semiconductor with a single molecular layer that self-organizes between two electrodes. Molecular tunnel junctions have been made in such systems, but they tend to be hard to reproduce, unstable and limited to small diameters. Now Akkerman et al. have developed a relatively simple way of producing stable, reproducible molecular junctions with large areas from self-assembled monolayers of alkanethiols. The process is compatible with standard integrated circuit technologies and could offer a cheap way forward in the quest for practical molecular electronics. A relatively simple method to fabricate stable, reproducible molecular junctions with large areas from self-assembled monolayers of alkanethiols has been developed — this approach could offer a cheap and promising way forward for molecular electronics. Electronic transport through single molecules has been studied extensively by academic1,2,3,4,5,6,7,8 and industrial9,10 research groups. Discrete tunnel junctions, or molecular diodes, have been reported using scanning probes11,12, break junctions13,14, metallic crossbars6 and nanopores8,15. For technological applications, molecular tunnel junctions must be reliable, stable and reproducible. The conductance per molecule, however, typically varies by many orders of magnitude5. Self-assembled monolayers (SAMs) may offer a promising route to the fabrication of reliable devices, and charge transport through SAMs of alkanethiols within nanopores is well understood, with non-resonant tunnelling dominating the transport mechanism8. Unfortunately, electrical shorts in SAMs are often formed upon vapour deposition of the top electrode16,17,18, which limits the diameter of the nanopore diodes to about 45 nm. Here we demonstrate a method to manufacture molecular junctions with diameters up to 100 µm with high yields (> 95 per cent). The junctions show excellent stability and reproducibility, and the conductance per unit area is similar to that obtained for benchmark nanopore diodes. Our technique involves processing the molecular junctions in the holes of a lithographically patterned photoresist, and then inserting a conducting polymer interlayer between the SAM and the metal top electrode. This simple approach is potentially low-cost and could pave the way for practical molecular electronics.

An integrated logic circuit assembled on a single carbon nanotube.

Abstract: Single-walled carbon nanotubes (SWCNTs) have been shown to exhibit excellent electrical properties, such as ballistic transport over several hundred nanometers at room temperature. Field-effect transistors (FETs) made from individual tubes show dc performance specifications rivaling those of state-of-the-art silicon devices. An important next step is the fabrication of integrated circuits on SWCNTs to study the high-frequency ac capabilities of SWCNTs. We built a five-stage ring oscillator that comprises, in total, 12 FETs side by side along the length of an individual carbon nanotube. A complementary metal-oxide semiconductor‐type architecture was achieved by adjusting the gate work functions of the individual p-type and n-type FETs used.

Quasi-one-dimensional metal oxide materials—Synthesis, properties and applications

Abstract: Recent advances in the field of nanotechnology have led to the synthesis and characterization of an assortment of quasi-one-dimensional (Q1D) structures, such as nanowires, nanoneedles, nanobelts and nanotubes. These fascinating materials exhibit novel physical properties owing to their unique geometry with high aspect ratio. They are the potential building blocks for a wide range of nanoscale electronics, optoelectronics, magnetoelectronics, and sensing devices. Many techniques have been developed to grow these nanostructures with various compositions. Parallel to the success with group IV and groups III–V compounds semiconductor nanostructures, semiconducting metal oxide materials with typically wide band gaps are attracting increasing attention. This article provides a comprehensive review of the state-of-the-art research activities that focus on the Q1D metal oxide systems and their physical property characterizations. It begins with the synthetic mechanisms and methods that have been exploited to form these structures. A range of remarkable characteristics are then presented, organized into sections covering a number of metal oxides, such as ZnO, In2O3, SnO2 ,G a 2O3, and TiO2, etc., describing their electrical, optical, magnetic, mechanical and chemical sensing properties. These studies constitute the basis for developing versatile applications based on metal oxide Q1D systems, and the current progress in device development will be highlighted. # 2006 Elsevier B.V. All rights reserved.

Digital memory device based on tobacco mosaic virus conjugated with nanoparticles

Abstract: Nanostructured viruses are attractive for use as templates for ordering quantum dots to make self-assembled building blocks for next-generation electronic devices. So far, only a few types of electronic devices have been fabricated from biomolecules due to the lack of charge transport through biomolecular junctions. Here, we show a novel electronic memory effect by incorporating platinum nanoparticles into tobacco mosaic virus. The memory effect is based on conductance switching, which leads to the occurrence of bistable states with an on/off ratio larger than three orders of magnitude. The mechanism of this process is attributed to charge trapping in the nanoparticles for data storage and a tunnelling process in the high conductance state. Such hybrid bio-inorganic nanostructures show promise for applications in future nanoelectronics.

Inorganic nanotubes: a novel platform for nanofluidics.

Abstract: Templating approaches are being developed for the synthesis of inorganic nanotubes, a novel platform for nanofluidics. Single crystalline semiconductor GaN nanotubes have been synthesized using an epitaxial casting method. The partial thermal oxidation of silicon nanowires leads to the synthesis of silica nanotubes. The dimension of these nanotubes can be precisely controlled during the templating process. These inorganic nanotubes can be integrated into metal-oxide solution field effect transistors (MOSolFETs), which exhibit rapid field effect modulation of ionic conductance. These nanofluidic devices have been further demonstrated to be useful for single-molecule sensing, as single DNA molecules can be readily detected either by charge effect or by geometry effect. These inorganic nanotubes will have great implications in subfemtoliter analytical technology and large-scale nanofluidic integration.

Nanoscale Thermal Transport and Microrefrigerators on a Chip

Abstract: In this paper we review recent advances in nanoscale thermal and thermoelectric transport with an emphasis on the impact on integrated circuit (IC) thermal management. We will first review thermal conductivity of low-dimensional solids. Experimental results have shown that phonon surface and interface scattering can lower thermal conductivity of silicon thin films and nanowires in the sub-100-nm range by a factor of two to five. Carbon nanotubes are promising candidates as thermal vias and thermal interface materials due to their inherently high thermal conductivities of thousands of W/mK and high mechanical strength. We then concentrate on the fundamental interaction between heat and electricity, i.e., thermoelectric effects, and how nanostructures are used to modify this interaction. We will review recent experimental and theoretical results on superlattice and quantum dot thermoelectrics as well as solid-state thermionic thin-film devices with embedded metallic nanoparticles. Heat and current spreading in the three-dimensional electrode configuration, allow removal of high-power hot spots in IC chips. Several III-V and silicon heterostructure integrated thermionic (HIT) microcoolers have been fabricated and characterized. They have achieved cooling up to 7 degC at 100 degC ambient temperature with devices on the order of 50 mum in diameter. The cooling power density was also characterized using integrated thin-film heaters; values ranging from 100 to 680 W/cm2 were measured. Response time on the order of 20-40 ms has been demonstrated. Calculations show that with an improvement in material properties, hot spots tens of micrometers in diameter with heat fluxes in excess of 1000 W/cm2 could be cooled down by 20 degC-30 degC. Finally we will review some of the more exotic techniques such as thermotunneling and analyze their potential application to chip cooling

Real-time observation of nonlinear coherent phonon dynamics in single-walled carbon nanotubes

Abstract: Single-walled carbon nanotubes (SWNTs) are π-conjugated, quasi-one-dimensional structures consisting of rolled-up graphene sheets that, depending on their chirality, behave as semiconductors or metals1; owing to their unique properties, they enable groundbreaking applications in mechanics, nanoelectronics and photonics2,3. In semiconducting SWNTs, medium-sized excitons (3–5 nm) with large binding energy and oscillator strength are the fundamental excitations4,5,6,7,8; exciton wavefunction localization and one-dimensionality give rise to a strong electron–phonon coupling9,10,11, the study of which is crucial for the understanding of their electronic and optical properties. Here we report on the use of resonant sub-10-fs visible pulses12 to generate and detect, in the time domain, coherent phonons in SWNT ensembles. We observe vibrational wavepackets for the radial breathing mode (RBM) and the G mode, and in particular their anharmonic coupling, resulting in a frequency modulation of the G mode by the RBM. Quantum-chemical modelling13 shows that this effect is due to a corrugation of the SWNT surface on photoexcitation, leading to a coupling between longitudinal and radial vibrations.

Microwave thin-film transistors using Si nanomembranes on flexible polymer substrate

Abstract: Large-feature-size single-crystal Si thin-film transistors (TFTs) with fT of 1.9GHz and fmax of 3.1GHz were demonstrated on flexible polymer substrate. In this letter, the authors detail the fabrication process that enables TFTs, made on low-temperature flexible substrates, to operate at microwave frequencies under low bias voltages. The outstanding electrical performance results measured from these devices, such as high electron mobility, high current drive capability, and high frequency response characteristics, and the simple process procedures for producing these devices on flexible substrate make flexible electronics highly promising for power-efficient large-area radio-frequency and microwave applications.

A reconfigurable architecture for hybrid CMOS/Nanodevice circuits

Abstract: This report describes a preliminary evaluation of performance of a cell-FPGA-like architecture for future hybrid "CMOL" circuits. Such circuits will combine a semiconduc-tor-transistor (CMOS) stack and a two-level nanowire crossbar with molecular-scale two-terminal nanodevices (program-mable diodes) formed at each crosspoint. Our cell-based architecture is based on a uniform CMOL fabric of "tiles". Each tile consists of 12 four-transistor basic cells and one (four times larger) latch cell. Due to high density of nanodevices, which may be used for both logic and routing functions, CMOL FPGA may be reconfigured around defective nanodevices to provide high defect tolerance. Using a semi-custom set of design automation tools we have evaluated CMOL FPGA performance for the Toronto 20 benchmark set, so far without optimization of several parameters including the power supply voltage and nanowire pitch. The results show that even without such optimization, CMOL FPGA circuits may provide a density advantage of more than two orders of magnitude over the traditional CMOS FPGA with the same CMOS design rules, at comparable time delay, acceptable power consumption and potentially high defect tolerance.

TaSi2 nanowires: A potential field emitter and interconnect.

Abstract: TaSi2 nanowires have been synthesized on a Si substrate by annealing NiSi2 films at 950 degrees C in an ambient containing Ta vapor. The nanowires could be grown up to 13 microm in length. Field-emission measurements show that the turn-on field is low at 4-4.5 V/microm and the threshold field is down to 6 V/microm with the field enhancement factor as high as 1800. The metallic TaSi2 nanowires exhibit excellent electrical properties with a remarkable high failure current density of 3 x 10(8) A cm(-2). In addition, effects of annealing temperatures and capability of metal silicide mediation layer on the growth of nanowires are addressed. This simple approach promises future applications in nanoelectronics and nano-optoelectronics.

A Three-Dimensional Simulation Study of the Performance of Carbon Nanotube Field-Effect Transistors With Doped Reservoirs and Realistic Geometry

Abstract: This paper simulates the expected device performance and scaling perspectives of carbon nanotube (CNT) field-effect transistors with doped source and drain extensions. The simulations are based on the self-consistent solution of the three-dimensional Poisson-Schroumldinger equation with open boundary conditions, within the nonequilibrium Green's function formalism, where arbitrary gate geometry and device architecture can be considered. The investigation of short channel effects for different gate configurations and geometry parameters shows that double-gate devices offer quasi-ideal subthreshold slope and drain-induced barrier lowering without extremely thin gate dielectrics. Exploration of devices with parallel CNTs shows that on currents per unit width can be significantly larger than the silicon counterpart, while high-frequency performance is very promising

Nanoscale MOSFETS: Physics, Simulation and Design

Abstract: This thesis discusses device physics, modeling and design issues of nanoscale transistors at the quantum level. The principle topics addressed in this report are 1) an implementation of appropriate physics and methodology in device modeling, 2) development of a new TCAD (technology computer aided design) tool for quantum level device simulation, 3) examination and assessment of new features of carrier transport in nano-scale transistors, and 4) exploration of device design issues near the ultimate scaling limit with the help of the developed tools. We concentrate on the technical issues by investigating a double-gate structure, which has been widely accepted as the ideal device structure for ultimate CMOS scaling. We focus on quantum effects and non-equilibrium, near-ballistic transport in extremely scaled transistors (in contrast to quasi-equilibrium, scattering-dominant transport in long channel devices), where a non-equilibrium Green’s function formalism (NEGF) has been used to deal with the quantum transport problem.

Nanotechnology: Role in emerging nanoelectronics

Abstract: Future miniaturized devices, beyond the Moore’s law era of silicon, are expected to rely on new, ingenious methods to implement spatially controlled and highly functional nanoscale components synthesized by inexpensive chemistry. Chip technology based on self-assembly would enhance performance and packing density by orders of magnitude, deliver rich on-chip functionality, and operate at molecular level. Low-dimensional semiconductor nanostructues and organic molecules, which offer unique possibilities such as extremely low power dissipation, quantum effects, surface sensitivity and low synthesis cost, could be the building blocks for next-generation electronics. In this paper we discuss the potential successors of the silicon CMOS technology at the end of the ITRS Roadmap (in ∼15 years). The disruptive technologies, rooted in nanoscale science, would aid in the continued advancement of integrated circuit technology – not necessarily through straightforward transistor geometry scaling – in several mainstream applications such as computing and data storage.

Carbon nanotube electronics

Abstract: The potentials of carbon nanotubes as building blocks for future electronics are explored. They are found to perform favorably in terms of ON state current density as compared to the conventional Si technology, owing to their superb electron transport properties and compatibility with high-K gate dielectrics.

A New Method to Synthesize Complicated Multibranched Carbon Nanotubes with Controlled Architecture and Composition

Abstract: Here we develop a simple method by using flow fluctuation to synthesize arrays of multibranched carbon nanotubes (CNTs) that are far more complex than those previously reported. The architectures and compositions can be well controlled, thus avoiding any template or additive. A branching mechanism of fluctuation-promoted coalescence of catalyst particles is proposed. This finding will provide a hopeful approach to the goal of CNT-based integrated circuits and be valuable for applying branched junctions in nanoelectronics and producing branched junctions of other materials.

Metallic Single-Crystal CoSi Nanowires via Chemical Vapor Deposition of Single-Source Precursor

Abstract: We report the synthesis, structural characterization, and electrical transport properties of free-standing single-crystal CoSi nanowires synthesized via a single-source precursor route. Nanowires with diameters of 10−150 nm and lengths of greater than 10 μm were synthesized through the chemical vapor deposition of Co(SiCl3)(CO)4 onto silicon substrates that were covered with 1−2 nm thick SiO2. Transmission electron microscopy confirms the single-crystal structure of the cubic CoSi. X-ray absorption and emission spectroscopy confirm the chemical identity and show the expected metallic nature of CoSi, which is further verified by room-temperature and low-temperature electrical transport measurements of nanowire devices. The average resistivity of CoSi nanowires is found to be about 510 μΩ cm. Our general and rational nanowire synthesis approach will lead to a broad class of silicide nanowires, including those metallic materials that serve as high-quality building blocks for nanoelectronics and magnetic semi...

Giant enhancement of the carrier mobility in silicon nanowires with diamond coating.

Abstract: We show theoretically that the low-field carrier mobility in silicon nanowires can be greatly enhanced by embedding the nanowires within a hard material such as diamond. The electron mobility in the cylindrical silicon nanowires with 4-nm diameter, which are coated with diamond, is 2 orders of magnitude higher at 10 K and a factor of 2 higher at room temperature than the mobility in a free-standing silicon nanowire. The importance of this result for the downscaled architectures and possible silicon-carbon nanoelectronic devices is augmented by an extra benefit of diamond, a superior heat conductor, for thermal management.

Self-assembled nanowires on semiconductor surfaces

Abstract: A number of different families of nanowires which self-assemble on semiconductor surfaces have been identified in recent years. They are particularly interesting from the standpoint of nanoelectronics, which seeks non-lithographic ways of creating interconnects at the nm scale (though possibly for carrying signal rather than current), as well as from the standpoint of traditional materials science and surface science. We survey these families and consider their physical and electronic structure, as well as their formation and reactivity. Particular attention is paid to rare earth nanowires and the Bi nanoline, both of which self-assemble on Si(001).

Optimized fabrication and electrical analysis of silver nanowires templated on DNA molecules

Abstract: We report on the electrical conductivity measurement of silver nanowires templated on native λ-bacteriophage and synthetic double-stranded DNA molecules. After an electroless chemical deposition, the metallized DNA wires have a diameter down to 15nm and are among the thinnest metallic nanowires available to date. Two-terminal I-V measurements demonstrating various conduction behaviors are presented. DNA templated functional nanowires may, in the near future, be targeted to connect at specific locations on larger-scale circuits and represent a potential breakthrough in the self-assembly of nanometer-scale structures for electronics layout.

Integrating nanowires with substrates using directed assembly and nanoscale soldering

Abstract: This paper describes a new methodology for integrating nanowires with micropatterned substrates using directed assembly and nanoscale soldering. Nanowires containing ferromagnetic nickel segments were fabricated by electrodeposition in nanoporous membranes. The nanowires were released by dissolution of the membrane and subsequently aligned relative to micropatterned substrates using magnetic field-directed assembly. After assembly, the wires were permanently bonded to the substrates using solder reflow to form low-resistance electrical contacts. This is the first demonstration of the use of nanoscale solder reflow to form low-resistance electrical interconnects between nanowires and substrates, and we demonstrated the utility of the strategy by fabricating a nanowire-based functional analog integrator.

Carbon ad-dimer defects in carbon nanotubes.

Abstract: The adsorption of carbon dimers on carbon nanotubes leads to a rich spectrum of structures and electronic structure modifications. Barriers for the formation of carbon dimer induced defects are calculated and found to be considerably lower than those for the Stone-Wales defect. The electronic states introduced by the ad-dimers depend on defect structure and tube type and size. Multiple carbon ad-dimers provide a route to structural engineering of patterned tubes that may be of interest for nanoelectronics.

Demonstration of a silicon-based quantum cellular automata cell

Abstract: We report on the demonstration of a silicon-based quantum cellular automata (QCA) unit cell incorporating two pairs of metallically doped (n+) phosphorus-implanted nanoscale dots, separated from source and drain reservoirs by nominally undoped tunnel barriers. Metallic cell control gates, together with Al–AlOx single electron transistors for noninvasive cell-state readout, are located on the device surface and capacitively coupled to the buried QCA cell. Operation at subkelvin temperatures was demonstrated by switching of a single electron between output dots, induced by a driven single electron transfer in the input dots. The stability limits of the QCA cell operation were also determined.

Switchable assembly of ultra narrow CdS nanowires and nanorods.

Abstract: We report on a simple route for the production of uniform and ultra narrow wurtzite CdS nanowires and nanorods. The nanorods are medium friendly (can exist in organic and aqueous phase) thus making them flexibly suitable for various applications. The centimeter range switchable ordering of the nanowires/rods into 3D microstrings by application of low magnitude DC electric field simply via two graphite electrodes is demonstrated. More sophisticated electrodes can be used for the same system to achieve more complex and fine patterns that can find potential use in nanoelectronics. The aligned microstrings (also wires/rods) show strong polarization dependence along their long axes. The polarized emission with respect to the unique c-axis makes the system suitable for orientation sensitive devices.

One-dimensional Germanium Nanowires for Future Electronics

Abstract: Field- and quantum-effect nanoelectronic devices built on one-dimensional (1-D) chemically synthesized nanostructures are likely among those immediate “successors” of the contemporary top–down silicon CMOS technology for future computing, preserving the spirit of Moore’s Law in the post-CMOS era. The nanotechnology-embedded chip technology would emerge in the foreseeable future. However, there exists a large gap between scientific research and semiconductor electronics. Many of the critical issues need to be addressed before nanotechnology becomes truly impacting. Application-driven nanotechnology research becomes more and more important. In this article, with 1-D germanium nanowire as an example, we discuss research efforts at NASA Ames Center for Nanotechnology in directing nanomaterial synthesis and device integration towards implementation in the next-generation miniaturized and intelligent chip systems. The technology goals include (i) low-temperature, low-defect, high-yield Ge nanowire synthesis, (ii) self-assembly of Ge nanowires-on-insulator (GeNOI), (iii) non-contaminating metal catalysts, and (iv) Ge quantum-wire synthesis. The potential applications of 1-D Ge nanowires are very low power, high performance logic FETs that deeply extend CMOS scaling into nanometer regime and extremely low power, fast speed, room-temperature-operating quantum-wire computing.

High‐Density Arrays of Germanium Nanowire Photoresistors

Abstract: Here we present for the first time a study of the photoresistive properties and dynamics of ordered, high-density arrays of germanium nanowire photoresistors. Germanium is a wellknown semiconducting material with an indirect bandgap, Eg, of approximately 0.66 eV (temperature T = 300 K) and has been widely used for the fabrication of photodetectors, radiation detectors, charged particle and photon tracking devices, far-infrared photoresistors, and numerous other devices. During the last few years there has also been increasing interest in the use of nanostructures (quantum dots and wires) of both germanium and silicon as materials for potential applications in sensors, nanophotonics, and nanoelectronics. However, in order to successfully integrate onedimensional semiconductors into useful devices, ordered architectures of aligned nanowires are required. Using templates such as anodized aluminium oxide (AAO) or mesoporous materials as hosts for nanowires offers a viable method for forming high-density arrays of ordered, crystalline nanowires. Significantly, AAO membranes with ordered and highly oriented pore structures have recently been synthesized on silicon substrates, which is very promising for the integration of such materials into current complementary metal oxide semiconductor technologies. At University College Cork we have developed supercritical-fluid-inclusion phase methods for forming semiconductor and metal/ semiconductor core/shell nanowires and nanotubes within the pores of mesoporous matrices and AAO membranes. Supercritical-fluid-inclusion methods are ideal solvents for forming high-density arrays of nanowires within AAO templates as they do not suffer from the inherent problem of pore blocking associated with other methods, such as electrodeposition and incipient wetness techniques. The electrical conductivity and photoluminescence properties of semiconductor nanowire arrays have been investigated by several research groups. However, photoconductivity measurements on ordered semiconducting nanowire arrays have not yet been performed. An investigation into the photoconductivity of ordered arrays of nanowires is important in order to fully understand their potential in future photodetection devices, for example, as photoresistors or photodiodes. In this paper, we report the photoconductive properties of germanium nanowire photoresistors with mean diameters of 50 and 100 nm, incorporated within the pores of AAO membranes. A comparative study of the photoresistive properties of germanium nanowire photoresistor arrays with different optically transparent electrodes, namely ultrathin gold films and tin-doped indium tin oxide (ITO) layers, is described in this paper. ITO is a well known n-type semiconductor widely used in the fabrication of transparent electrodes in various optoelectronic devices. To our knowledge, this study is the first analysis of photoconductivity in ordered semiconducting nanowire arrays. Germanium nanowires, with mean diameters of 50 and 100 nm were synthesized in the pores of AAO membranes. The electrical and structural properties of these Ge nanowire arrays has previously been reported (see Supporting Information). Figure 1a shows a current-distribution map of the encapsulated nanowires, with a mean diameter of 100 nm, obtained using conductive atomic force microscopy (C-AFM). Practically all of the Ge nanowires incorporated within the AAO membranes demonstrated similar electrical conductivC O M M U N IC A TI O N S