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Showing papers on "Negative impedance converter published in 1995"


Journal ArticleDOI
TL;DR: In this paper, it was shown that in many situations flow impedance depends upon the geometry of the transmission line upstream of the point of interest, and models of impedance transitions and voltage adders using flow impedance were developed.
Abstract: In modern pulsed power systems the electric field stresses at metal surfaces in vacuum transmission lines are so high that negative surfaces are space‐charge‐limited electron emitters. These electrons do not cause unacceptable losses because magnetic fields due to system currents result in net motion parallel to the electrodes. It has been known for several years that a parameter known as flow impedance is useful for describing these flows. Flow impedance is a measure of the separation between the anode and the mean position of the electron cloud, and it will be shown in this paper that in many situations flow impedance depends upon the geometry of the transmission line upstream of the point of interest. It can be remarkably independent of other considerations such as line currents and voltage. For this reason flow impedance is a valuable design parameter. Models of impedance transitions and voltage adders using flow impedance will be developed. Results of these models will be compared to two‐dimensional, time‐dependent, particle‐in‐cell simulations.

88 citations


Journal ArticleDOI
TL;DR: In this paper, the stability of the middle branch of the double-barrier resonanttunneling diode in a circuit with effectively negative capacitance and negative resistance is derived in a simple way.
Abstract: Electronic devices exhibiting bistability in the current‐voltage characteristics are considered from a unified viewpoint. We obtain simple relations for the stability of the different branches in the current‐voltage characteristics. Criteria for oscillatory instabilities are discussed, and special conclusions for elements with S‐ or Z‐shaped characteristics are drawn. The stabilization of the middle branch of the double‐barrier resonant‐tunneling diode in a circuit with effectively negative capacitance and negative resistance is derived in a simple way.

67 citations


Patent
17 Feb 1995
TL;DR: In this article, a power supply circuit arrangement for electrical equipment, such as a loudspeaker with an integral power amplifier, which can be switched between an operational mode and a standby mode in response to a detected on/off signal, provides a desirable isolation of the main supply voltage from the detector.
Abstract: A power supply circuit arrangement for electrical equipment, such as a loudspeaker with an integral power amplifier, which can be switched between an operational mode and a standby mode in response to a detected on/off signal, provides a desirable isolation of the main supply voltage from the detector. The arrangement comprises a transformer, having a primary winding and a secondary winding, and a switched impedance device between the transformer and the power supply input. The switched impedance device is switchable between high and low impedance states in response to the detected on/off signal. A control circuit for detecting the on/off signal and switching the variable impedance states is connected in common with a main circuit of the equipment to the secondary winding of the transformer, so that their respective supply voltages are both switched, in common, by switching of the impedance device. The control circuit and variable impedance device isolate the detector from the power supply. In the operational mode, the variable impedance is switched to its low impedance and the common voltage supplied to the main circuit and the control circuit is sufficient to operate both of them. In the standby mode, the variable impedance is high and the common voltage is inadequate for normal operation of the main circuit but adequate for normal operation of the control circuit.

64 citations


Patent
01 Mar 1995
TL;DR: In this article, a switch mode power converter (10) is described, which includes a switching cell (12) that transforms an input voltage at input port (22) to an output voltage at output port (24).
Abstract: A switch mode power converter (10) is provided. Converter (10) includes a switching cell (12) that transforms an input voltage at input port (22) to an output voltage at output port (24). Switching cell (12) is controlled by a fixed-period, variable on-time control signal from summing comparator (14). The period of the control signal is set by a driving circuit (20). The on time is set by first and second feedback circuits (16) and (18). First feedback circuit (16) provides a fast transient response. Second feedback circuit (18) provides an stable dc steady-state operating point.

62 citations


Patent
20 Mar 1995
TL;DR: In this article, a weighted discrete fourier transform is applied to the digitized current and voltage waveforms of a motor to obtain negative sequence voltage and current phasors, which are then used to determine the existence of a turn fault.
Abstract: Motor current and voltage waveforms are measured and converted to digitized current and voltage waveforms. A weighted discrete fourier transform is applied to the digitized current and voltage waveforms to obtain negative sequence current and voltage phasors; and the negative sequence current and voltage phasors are used to determine the existence of a turn fault. The use of the negative sequence current and voltage phasors can be performed by employing one of several techniques. In a first embodiment, an apparent negative sequence impedance is estimated by dividing the negative sequence voltage phasor by the negative sequence current phasor for comparison with a threshold negative sequence impedance. In a second, related embodiment, a current differential is estimated by dividing the negative sequence voltage phasor by a characteristic negative sequence impedance and subtracting the result from the negative sequence current phasor for comparison with a threshold current differential. In a third, related embodiment, a voltage differential is estimated by multiplying the negative sequence current phasor by a characteristic negative sequence impedance and subtracting the result from the negative sequence voltage phasor for comparison with a threshold voltage differential. In either of the second or third embodiments, the characteristic negative sequence impedance can be obtained by inserting a calibration device into one phase of the motor.

55 citations


PatentDOI
TL;DR: In this article, a negative capacitance shunt circuit is provided in which a voltage-controlled voltage-source continuously simulates a negative capacitor that is substantially equal in magnitude but opposite in phase to the capacitance of the piezoelectric material.
Abstract: Boring bar vibration damping is improved by a novel use of the electromechanical properties of the piezoelectric actuator material. A negative capacitance shunt circuit is provided in which a voltage-controlled voltage-source continuously simulates a negative capacitance that is substantially equal in magnitude but opposite in phase to the capacitance of the piezoelectric material. The negative capacitance is shunted across the piezoelectric device, effectively compensating for the capacitance of the device across a broad frequency band. The voltages generated in the piezoelectric element in response to mechanical deformation induced by broadband vibrations of the structure during damping operations, may then be completely resistively dissipated, thereby enhancing the mechanical damping.

52 citations


Patent
04 Aug 1995
TL;DR: In this paper, a signal conditioning circuit using switched impedances was proposed to provide an output voltage proportional to the differential voltage between the sensor output voltage and the sensor ground when an impedance between the signal conditioning circuits input terminals is low relative to the detection impedance.
Abstract: A signal conditioning apparatus useful in applications, such as automotive applications, having a signal conditioning circuit capable of conditioning a sensor input signal and providing an output useful, for example, to a fuel-air mixture control system. The signal conditioning circuit employs an amplifier with a feedback impedance, NMOS and PMOS transistors, an input impedance, a detection impedance, input terminals coupled to a sensor. The sensor, such as an oxygen sensor, has a sensor output referenced to sensor ground and input terminals coupled to a power supply and power supply ground. The signal conditioning circuit utilizes switched impedances to provide an output voltage proportional to the differential voltage between the sensor output voltage and the sensor ground when an impedance between the signal conditioning circuit input terminals is low relative to the detection impedance. Otherwise the signal conditioning circuit utilizing switched impedances provides an output voltage proportional to the power supply voltage. The signal conditioning circuit samples the sensor differential voltage and the power supply voltage at a frequency derived from a clock generator. The signal conditioning circuit controls the NMOS transistors coupled to the sensor with a negative bias voltage derived from a single power supply, thus allowing operation when the sensor ground and power supply ground are at different potentials. Additionally, fabricating the signal conditioning circuit impedances as capacitors using linear complementary metal oxide semiconductor technology produces very accurate gain and input impedance characteristics.

51 citations


Journal ArticleDOI
08 Oct 1995
TL;DR: In this paper, a three-phase DC-to-DC series-parallel resonant converter is proposed and its operating modes for a 180/spl deg/ wide gating pulse scheme are explained.
Abstract: A three-phase DC-to-DC series-parallel resonant converter is proposed and its operating modes for a 180/spl deg/ wide gating pulse scheme are explained. A detailed analysis of the converter using a constant current model and the Fourier series approach is presented. Based on the analysis, design curves are obtained and a design example of a 1-kW converter is given. SPICE simulation results for the designed converter and experimental results for a 500-W converter are presented to verify the performance of the proposed converter for varying load conditions. The converter operates in lagging power factor (PF) mode for the entire load range and requires a narrow variation in switching frequency, to adequately regulate the output power.

44 citations


Journal ArticleDOI
TL;DR: In this paper, a linear and direct method of determining the frequency dependent impedance of a 12-pulse HVDC power converter is presented, including the effect of the firing angle control system, the commutation period, and the variability of the commuted period.
Abstract: A linear and direct method of determining the frequency dependent impedance of a 12 pulse HVDC power converter is presented. Terms are developed for both the DC and AC side impedances of the power converter, including the effect of the firing angle control system, the commutation period, and the variability of the commutation period. The impedance predictions are verified by dynamic simulation. >

41 citations


Patent
17 Mar 1995
TL;DR: In this article, a line isolation monitor (LIM) is used to estimate the maximum hazard current of an ungrounded polyphase power distribution system by injecting a continuous sine wave measurement current into a ground terminal to generate a measurement voltage across the fault impedance.
Abstract: A line isolation monitor (LIM) indicates the maximum hazard current of an ungrounded polyphase power distribution system. The LIM is microcontroller based and continuously monitors a fault impedance for the distribution system. The fault impedance is determined by the LIM by injecting a continuous sine wave measurement current into a ground terminal to generate a measurement voltage across the fault impedance. Using the measurement voltage and current, the LIM calculates the fault impedance and, using this impedance, calculates the hazard current based on the maximum line to ground voltage of the ungrounded system. The LIM has means for self-calibration and self-testing while on-line and during a power-up sequence to verify that components in the measurement circuitry are within specified tolerances.

34 citations


Journal ArticleDOI
TL;DR: In this paper, a high-frequency dc-to-dc converter with two switches is presented, which is suitable for application in the kilowatt range and has zero-voltage turn-on and snubbed turn-off at reduced current.
Abstract: A new high-frequency dc to dc converter, suitable for application in the kilowatt range, is presented. The topology is based on a half bridge series resonant converter, i.e., having only two switches. Resonance occurs only for a part of each switching cycle, and a discrete energy pulse is transferred to the load every half cycle, rendering a variable frequency controller for controlling the output power. The converter features zero-voltage turn-on, and snubbed turn-off at reduced current for the switching devices, and zero current commutation of the rectifier diodes, making it suitable for IGBT switches operating at a switching frequency higher than 20 kHz. The efficiency of the converter is very high under full load and low load conditions, while the dynamic output voltage range is two times larger than that of the conventional half bridge Series Resonant Converter.

Patent
31 Jul 1995
TL;DR: In this paper, a condensed power supply circuit for powering a gas discharge lamp with bi-directional current reduces duty cycle by increasing dead time, where a series half bridge converter, a boost converter, resistor-capacitor delay circuit associated with a gate to control dead time and a snubber capacitance for facilitating zero voltage switching to fill the entire dead time.
Abstract: A condensed power supply circuit for powering a gas discharge lamp with bi-directional current reduces duty cycle by increasing dead time. The circuit comprises an arrangement for supplying d.c. power from an a.c. voltage, a series half bridge converter, a boost converter, a resistor-capacitor delay circuit associated with a gate to control dead time, and a snubber capacitance for facilitating zero voltage switching to fill the entire dead time. The series half-bridge converter alternately impresses a d.c. bus voltage from a bus conductor across a load circuit first with one polarity and then with an opposite polarity. The series half-bridge converter includes a first switch, a second switch, and a switching control circuit for alternately switching on the first and second switches. The boost converter comprises a boost capacitor, a boost inductor, and means for periodically connecting a load end of the boost inductor through a low impedance path to the ground conductor, thereby charging the boost inductor. The present invention reduces duty cycle via an increase in dead time. The resistor-capacitor delay circuit, associated with a gate, is used to control dead time. The snubber capacitance, which facilitates zero voltage switching to fill the entire dead time range, has a value set by the resistor-capacitor delay circuit.

Journal ArticleDOI
TL;DR: In this paper, the function control law for a buck converter is derived to achieve zero voltage regulation of the output voltage, and a new method to retrieve the low frequency component of the inductor voltage is proposed and analyzed.
Abstract: The function control law for a buck converter is derived to achieve zero voltage regulation of the output voltage. A new method to retrieve the low frequency component of the inductor voltage is proposed and analyzed. The stability of the closed loop system using a proportional and differential controller is analyzed. The effect of the supply voltage and load current disturbance is also studied. The analysis, computer simulation by PSPICE and experimental results illustrate that excellent performance can be achieved by the function control law. >

Patent
26 May 1995
TL;DR: In this paper, a power monitoring instrument and associated voltage and current pods for coupling to voltage probes and current clamps incorporate unique safety features to minimize operator exposure to high-voltage, and measurements are performed noninvasively without disconnecting elements of the power system.
Abstract: A power monitoring instrument evaluates and displays the source impedance, load impedance, and distribution system impedance of an alternating current power system using voltage and current measurements taken at a source and load of the power system. The power monitoring instrument and associated voltage and current pods for coupling to voltage probes and current clamps incorporate unique safety features to minimize operator exposure to high-voltage. The measurements are performed noninvasively without disconnecting elements of the power system. Evaluation of impedances takes advantage of incidental variations in the load characteristics.

Patent
23 Feb 1995
TL;DR: In this article, an impedance measurement system including a series circuit having a reference impedance leg and a measurement leg, the measurement leg including first and second spaced apart electrodes defining a region for receiving a sample of material to be tested, was described.
Abstract: An impedance measurement system including a series circuit having a reference impedance leg and a measurement leg, the measurement leg including first and second spaced apart electrodes defining a region for receiving a sample of material to be tested; an oscillator circuit connected in parallel with the series circuit and providing a reference voltage and a signal voltage proportioned to the impedance of the measurement leg; and a detector circuit producing an output voltage proportional to changes between the reference voltage and the signal voltage.

Journal ArticleDOI
TL;DR: In this paper, a real-time control method of a series resonant high-frequency linked DC-AC converter employing quasi-zero current switching (quasi-ZCS) and a feedback control method for sinusoidal output voltage was proposed.
Abstract: This paper proposes a real-time control method of a series resonant high-frequency linked DC-AC converter employing quasi-zero current switching (quasi-ZCS) and a feedback control method for sinusoidal output voltage. An approximate analysis of the converter is performed, and then simplified equations and an equivalent circuit similar to the conventional PWM inverters/inverters are obtained. A real-time feedback control of the converter is realized using the equivalent circuit without detecting HF link current. The usefulness of the proposed control algorithm is confirmed by experimental results. >

Journal ArticleDOI
01 Sep 1995
TL;DR: In this paper, a novel method of voltage distortion compensation and a novel power circuit for a power converter filter are proposed, which does not require calculation of an active current or voltage component and in this way a delay in compensator response is avoided.
Abstract: A novel method of voltage distortion compensation and a novel power circuit for a power converter filter are proposed. The new method does not require calculation of an active current or voltage component and in this way a delay in compensator response is avoided. This approach is verified by measurements in a low-power model.

Patent
17 Mar 1995
TL;DR: In this article, the authors proposed a voltage generation circuit to prevent an insufficient charge in a circuit required for liquid crystal display, to make a drive voltage reach a target level in the precharge period and to prolong a stable operation period related to a liquid crystal driving device.
Abstract: PURPOSE: To prevent an insufficient charge in a circuit required for liquid crystal display, to make a drive voltage reach a target level in the precharge period and to prolong a stable operation period related to a liquid crystal driving device. CONSTITUTION: This device is provided with a voltage generation circuit 100 generating positive or negative drive voltage required for the liquid crystal display and a positive or negative precharge voltage obtained by adding an auxiliary voltage to the drive voltage, and a voltage output circuit 200 outputting the voltage obtained by synthesizing the positive precharge voltage from the circuit 100 with the positive drive voltage and the voltage obtained by synthesizing the negative precharge voltage from the circuit 100 with the negative drive voltage according to a precharge control signal PC required for the liquid crystal display and a line inversion signal LC.

Journal ArticleDOI
Raj Senani1
TL;DR: In this paper, the authors present a configuration for realising a floating generalised negative impedance converter/inverter (GNIC/GNII) which employs no more than a single OMA along with a minimum of three passive components.
Abstract: In contrast to the previously known circuits which require two to four op-amps, current conveyors (CC) or operational mirrored amplifiers (OMAs) to realise a floating negative impedance converter, the Letter presents a configuration for realising a floating generalised negative impedance converter/inverter (GNIC/GNII) which employs no more than a single OMA along with a minimum of three passive components (without requiring any passive-component-matching). An application example is demonstrated. The workability of the proposed structures has been confirmed by SPICE simulations.

Journal ArticleDOI
TL;DR: In this article, a class-E DC-to-DC converter with half-wave controlled current rectifier is proposed, whose output voltage is controlled by the conduction angle of the rectifier switch at constant switching frequency.
Abstract: A class-E DC-to-DC converter with half-wave controlled current rectifier is proposed. Its output voltage is controlled by the conduction angle of the rectifier switch at constant switching frequency. Zero voltage switching for all the switches can be maintained from full load to no load. Its steady state characteristics are analyzed and the effects of the circuit parameters are studied. Some extensions of the proposed converter are also discussed. The analysis is verified by PSPICE simulation and an experimental prototype. >

Patent
08 Nov 1995
TL;DR: In this paper, a CMOS output buffer circuit includes negative feedback means for significantly reducing voltage oscillation, which reduces the rate of change of the transient charging/discharging currents.
Abstract: A CMOS output buffer circuit includes negative feedback means for significantly reducing voltage oscillation. The buffer circuit is comprised of a pull-up transistor (P1), a pull-down transistor (N1), a first reference voltage generator circuit (44), a second reference voltage generator circuit (54), a first negative feedback circuit (48), and a second negative feedback circuit (58). First and second negative feedback circuits are coupled between the internal power supply potential/ground potential nodes and the gates of the pull-up/pull-down driver transistors so as to reduce the rate of change of the transient charging/discharging currents, respectively.

Journal ArticleDOI
TL;DR: In this paper, a new formulation was proposed regarding power network imbalance, where a random vector of imbalance was defined having two dimensions, and the probability distribution of negative phase sequence voltage was calculated and used to derive a probability distribution for current harmonics generated by a six pulse power converter.
Abstract: A new formulation is proposed regarding power network imbalance. From symmetrical component theory, a random vector of imbalance is defined having two dimensions. The probability distribution of negative phase sequence voltage is calculated and used to derive a probability distribution for current harmonics generated by a six pulse power converter. Three applications of the theory are considered, the first concerns the validation of the model and the characterisation of imbalance observed on two networks, the second concerns the interaction between voltage imbalance and harmonic current generated by a power converter and the third application concerns the overheating of an induction motor subject to a random negative phase sequence voltage. The analytical nature of the model forms a compromise between simplicity of utilisation and the representation of complex phenomena. >

Patent
02 Mar 1995
TL;DR: In this paper, a voltage driver providing a voltage signal into a current driver was shown to increase the rise time and the current into the load until the resistance of the load is substantially that of the current driver input resistance reduced by a factor of N. The factor N is the maximum current capability of the output of the driver related to the input current generated by the voltage signal from the driver.
Abstract: A current rise in fall time limited voltage follow is shown having a voltage driver providing a voltage signal into a current driver. The output of the current driver is a load varying in resistance, for example, as the number or combination of devices connected to the load vary. The maximum current into the load and the maximum rise time of the current into the load is limited at the output of the current driver to a maximum by the input impedance of the current driver. The rise time and the current into the load may increase until the resistance of the load is substantially that of the current driver input resistance reduced by a factor of N. The factor N is the maximum current capability of the output of the current driver related to the current driver input current generated by the voltage signal from the voltage driver. The current into the load and the maximum rise time of the load will increase until the load resistance R is less than the input impedance of the current driver divided by the current multiple N at the output of the current driver related to the current at the input of the current driver.

Journal ArticleDOI
TL;DR: This article presents a method for synthesizing a negative capacitance in MMIC technology, and argues that, in most cases, this one port will be physically realizable, and provides numerical results for the synthesis which supports this idea.
Abstract: This article presents a method for synthesizing a negative capacitance in MMIC technology, and extends our earlier work (S. E. Sussman-Fort, Int. J. MIMICAE, Vol. 4, No. 2, April 1994, pp. 130-139) involving the realization of MMIC negative resistance. As before, we employ a classical negative impedance converter (NIC) that has been terminated in an RLC one port specially designed to compensate for the parasitics of the active and passive elements. We argue that, in most cases, this one port will be physically realizable, and we provide numerical results for the synthesis which supports this idea. The procedure is demonstrated in computer simulation for a four-transistor MMIC network which achieves a virtually pure capacitance of -5 pF over 1.5-2.5 GHz. Such NIC-based negative capacitance (and resistance) has potential application in the design of microwave gyrators and active filters. © 1995 John Wiley & Sons, Inc.

Patent
Yukio Yasuda1
10 Aug 1995
TL;DR: In this paper, a circuit for detecting misfiring in an IC engine has an ion current sensor (9a) which establishes a positive voltage at a sparking plug and detects a negatively polarised ion current during the combustion.
Abstract: A circuit for detecting misfiring in an IC engine has an ion current sensor (9a) which establishes a positive voltage at a sparking plug and detects a negatively polarised ion current during the combustion. There is a current/voltage converter (9b) which converts a negative ion current into a positive voltage. The sensor has a condenser (5) charged up by an external source to a positive voltage, a voltage limiting circuit (4) for the condenser and a diode (6) between the condenser and earth. The converter has a second diode (17) and an operational amplifier (18) with low input impedance, whose inverting input is connected between the condenser and the first diode, and whose non-inverting input is earthed.

Patent
19 Jun 1995
TL;DR: In this article, a negative word line voltage regulation circuit was proposed to regulate a negative-word line voltage to be supplied to word lines of the memory device during an electrical erasure of a memory device.
Abstract: A negative word line voltage regulation circuit integratable in an electrically erasable semiconductor memory device. The circuit regulates a negative word line voltage to be supplied to word lines of the memory device during an electrical erasure of the memory device. The circuit includes an operational amplifier with a first input coupled to a reference voltage, a second input coupled to the negative word line voltage, and an output controlling a voltage regulation branch connected between an external power supply and the negative word line voltage, to provide a regulation current for regulating the negative word line voltage. The output of the operational amplifier also controls a voltage sensing branch, connected between the external power supply and the negative word line voltage, to provide a sensing signal coupled to the second input of the operational amplifier.

Patent
19 May 1995
TL;DR: In this article, a device for measurement of electrical energy having current and voltage sensors, a multiplexing circuit 8 and an analogue-to-digital converter 11 is described, where a microprocessor is used to control the multiplexed circuit in order to supply the voltage signals alternately to the converter and calculating the electrical energy at a moment in time using two values of the voltage situated around a current sample and using three samples of the current.
Abstract: A device for measurement of electrical energy having current and voltage sensors 1, 2, a multiplexing circuit 8 and an analogue to digital converter 11. A microprocessor 9 controls the multiplexing circuit in order to supply the current and voltage signals alternately to the converter 11, the microprocessor 9 calculating the electrical energy at a moment in time using two values of the voltage situated around a current sample and using three samples of the current. By these means the time delay between samples of the voltage and current can be corrected.

Patent
30 Aug 1995
TL;DR: In this article, the power input ports of two bridge power converters are connected in a series totem-pole fashion with the minus power input port of the top bridge connected to the plus power inputport of the bottom bridge.
Abstract: A linear audio amplifier includes a push-pull pair of vacuum tubes operating in a linear amplification mode coupled through a pair of dc-dc switching power converters to an external load impedance. Each power converter includes a transformer with one or more secondary windings that drive rectifier circuits, and the resultant dc voltage sources are loaded by their respective tubes. The power input ports of two bridge power converters are connected in a series totem-pole fashion with the minus power input port of the top bridge connected to the plus power input port of the bottom bridge. A center-tapped fixed voltage source is connected across the two-bridge pair such that the positive voltage is connected to the plus power input port of the top bridge, and the negative voltage is connected to the minus power input port of the bottom bridge. One side of an external load impedance is connected through a noise filter to the junction point of the two bridges, and the other side of the external load is connected to the center tap of the fixed voltage source. The output power ports of each converter drive the primaries of their respective converter transformers. The effective turns ratio between primary and secondary windings of these converter transformers determine the voltage/current step-up/step-down relationships between the tubes and the external load impedance.

Journal ArticleDOI
TL;DR: In this article, a phase-controlled full-bridge parallel resonant converter (PCPRC) with an input-inductor rectifier was designed and tested and the measured efficiency was 92% at full load.
Abstract: A fixed-frequency phase-controlled full-bridge parallel resonant converter (PCPRC) that consists of a phase-controlled parallel resonant inverter (PCPRI) and an input-inductor rectifier is analyzed. The input impedances of the resonant circuits represent inductive loads for both switching legs at f/f/sub 0/>1.24 and therefore zero-voltage-switching turn-on can be achieved for all the transistors. The fundamental frequency approximation is used to derive expressions for the voltage transfer function and the efficiency of the PCPRI. The behavior and performance characteristics of the PCPRI are then studied. Three types of input-inductor rectifiers are considered and a design procedure is developed. A 30 W PCPRC is designed and tested. The theoretical calculations were in good agreement with experimental results. The converter exhibits an excellent efficiency. The measured efficiency was 92% at full load. The converter is capable of regulating the DC output voltage from full load to no load and over a wide line voltage range. >

Patent
09 Mar 1995
TL;DR: In this article, a voltage generator includes a fuel cell 1, a d.c. converter 2 and a storage battery 3, which is connected to the fuel cell terminals, and the output terminals of the converter are coupled in parallel with those of the battery 3 to the voltage generator output terminals.
Abstract: A voltage generator includes a fuel cell 1, a d.c. converter 2 and a storage battery 3. The input terminals of the converter 2 are connected to the fuel cell terminals, and the output terminals of the converter are coupled in parallel with those of the battery 3 to the voltage generator output terminals. A control means 5b of the converter 2 controls the maximum value of the current through the converter 2, according to the voltage measured at the terminals of the fuel cell 1, in order to keep this voltage in the vicinity of a preset reference value. Normally, the fuel cell supplies all of the current required by a load 4, with the battery 3 acting as 2 buffer. The fuel cell 1 is disconnected if its voltage remains below a minimum value, or if the voltage of battery 3 is too high or too low.