Showing papers on "Negative impedance converter published in 2017"

Sustained Sub-60 mV/decade switching via the negative capacitance effect in MoS2 transistors

Abstract: It has been shown that a ferroelectric material integrated into the gate stack of a transistor can create an effective negative capacitance (NC) that allows the device to overcome “Boltzmann tyranny”. While this switching below the thermal limit has been observed with Si-based NC field-effect transistors (NC-FETs), the adaptation to 2D materials would enable a device that is scalable in operating voltage as well as size. In this work, we demonstrate sustained sub-60 mV/dec switching, with a minimum subthreshold swing (SS) of 6.07 mV/dec (average of 8.03 mV/dec over 4 orders of magnitude in drain current), by incorporating hafnium zirconium oxide (HfZrO2 or HZO) ferroelectric into the gate stack of a MoS2 2D-FET. By first fabricating and characterizing metal–ferroelectric–metal capacitors, the MoS2 is able to be transferred directly on top and characterized with both a standard and a negative capacitance gate stack. The 2D NC-FET exhibited marked enhancement in low-voltage switching behavior compared to th...

Steep-slope Hysteresis-free Negative Capacitance MoS2 Transistors

Abstract: The so-called Boltzmann Tyranny defines the fundamental thermionic limit of the subthreshold slope (SS) of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV/dec at room temperature and, therefore, precludes the lowering of the supply voltage and the overall power consumption. Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this fundamental barrier. Meanwhile, two-dimensional (2D) semiconductors, such as atomically thin transition metal dichalcogenides (TMDs) due to their low dielectric constant, and ease of integration in a junctionless transistor topology, offer enhanced electrostatic control of the channel. Here, we combine these two advantages and demonstrate for the first time a molybdenum disulfide (MoS2) 2D steep slope transistor with a ferroelectric hafnium zirconium oxide layer (HZO) in the gate dielectric stack. This device exhibits excellent performance in both on- and off-states, with maximum drain current of 510 {\mu}A/{\mu}m, sub-thermionic subthreshold slope and is essentially hysteresis-free. Negative differential resistance (NDR) was observed at room temperature in the MoS2 negative capacitance field-effect-transistors (NC-FETs) as the result of negative capacitance due to the negative drain-induced-barrier-lowering (DIBL). High on-current induced self-heating effect was also observed and studied.

Robust Vector Control of a Very Weak-Grid-Connected Voltage-Source Converter Considering the Phase-Locked Loop Dynamics

Abstract: Conventional vector-controlled voltage-source converters (VSC) suffer from stability and performance problems when integrated into very weak ac grids (high-impedance grids). This is attributed to the increased coupling between the converter and grid dynamics, via the phase-locked loop (PLL), at the very weak-grid condition. In the current literature, the impact of the PLL is usually ignored when the converter controllers are designed. While this approach can be accepted under stiff grid conditions, it yields unmodeled dynamics that destabilize the converter under weak-grid conditions and high-power injection levels. To overcome this limitation, this paper presents a robust vector-controlled VSC that facilitates full converter power injection at weak and very weak-grid conditions (i.e., when the short-circuit capacity ratio is one). To realize the controller, first, a detailed dynamic model for the ac-bus voltage dynamics, including the PLL dynamics, is developed and validated in this paper. Second, the model is used to optimally design a robust ac-bus voltage controller to stabilize the dynamics under operating point variation and grid impedance uncertainty. Because the developed model includes the PLL dynamics, the developed controller inherently stabilizes the negative impact of the PLL on the converter stability. A theoretical analysis and comparative simulation and experimental results are provided to show the effectiveness of the proposed controller.

Input-Parallel Output-Series DC-DC Boost Converter With a Wide Input Voltage Range, For Fuel Cell Vehicles

Abstract: An input-parallel, output-series dc–dc Boost converter with a wide input voltage range is proposed in this paper. An interleaved structure is adopted in the input side of this converter to reduce input current ripple. Two capacitors are connected in series on the output side to achieve a high voltage gain. The operating principles and steady-state characteristics of the converter are presented and analyzed in this paper. A 400 V/1.6 kW prototype has been created which demonstrates that a wide range of voltage gain can be achieved by this converter and it is shown that the maximum efficiency of the converter is 96.62% and minimum efficiency is 94.14%. The experimental results validate the feasibility of the proposed topology and its suitability for fuel cell vehicles.

Inductive Loop in the Impedance Response of Perovskite Solar Cells Explained by Surface Polarization Model.

Abstract: The analysis of perovskite solar cells by impedance spectroscopy has provided a rich variety of behaviors that demand adequate interpretation. Two main features have been reported: First, different impedance spectral arcs vary in combination; second, inductive loops and negative capacitance characteristics appear as an intrinsic property of the current configuration of perovskite solar cells. Here we adopt a previously developed surface polarization model based on the assumption of large electric and ionic charge accumulation at the external contact interface. Just from the equations of the model, the impedance spectroscopy response is calculated and explains the mentioned general features. The inductance element in the equivalent circuit is the result of the delay of the surface voltage and depends on the kinetic relaxation time. The model is therefore able to quantitatively describe exotic features of the perovskite solar cell and provides insight into the operation mechanisms of the device.

Subthreshold swing improvement in MoS2 transistors by the negative-capacitance effect in a ferroelectric Al-doped-HfO2/HfO2 gate dielectric stack.

Abstract: Obtaining a subthreshold swing (SS) below the thermionic limit of 60 mV dec−1 by exploiting the negative-capacitance (NC) effect in ferroelectric (FE) materials is a novel effective technique to allow the reduction of the supply voltage and power consumption in field effect transistors (FETs). At the same time, two-dimensional layered semiconductors, such as molybdenum disulfide (MoS2), have been shown to be promising candidates to replace silicon MOSFETs in sub-5 nm-channel technology nodes. In this paper, we demonstrate NC MoS2 FETs by incorporating a ferroelectric Al-doped HfO2 (Al : HfO2), a technologically compatible material, in the FET gate stack. Al : HfO2 thin films were deposited on Si wafers by atomic layer deposition. Voltage amplification up to 1.25 times was observed in a FE bilayer stack of Al : HfO2/HfO2 with a Ni metallic intermediate layer. The minimum SS (SSmin) of the NC-MoS2 FET built on the FE bilayer improved to 57 mV dec−1 at room temperature, compared with SSmin = 67 mV dec−1 for the MoS2 FET with only HfO2 as a gate dielectric.

New Integrated Multilevel Converter for Switched Reluctance Motor Drives in Plug-in Hybrid Electric Vehicles With Flexible Energy Conversion

Abstract: This paper presents an integrated multilevel converter of switched reluctance motors (SRMs) fed by a modular front-end circuit for plug-in hybrid electric vehicle (PHEV) applications. Several operating modes can be achieved by changing the on-off states of the switches in the front-end circuit. In generator driving mode, the battery bank is employed to elevate the phase voltage for fast excitation and demagnetization. In battery driving mode, the converter is reconfigured as a four-level converter, and the capacitor is used as an additional charge capacitor to produce multilevel voltage outputs, which enhances the torque capability. The operating modes of the proposed drive are explained and the phase current and voltage are analyzed in details. The battery charging is naturally achieved by the demagnetization current in motoring mode and by the regenerative current in braking mode. Moreover, the battery can be charged by the external AC source or generator through the proposed converter when the vehicle is in standstill condition. The SRM-based PHEV can operate at different speeds by coordinating the power flow between the generator and battery. Simulation in MATLAB/Simulink and experiments on a three-phase 12/8 SRM confirm the effectiveness of the proposed converter topology.

High-efficiency high-power-density 48/1V sigma converter voltage regulator module

Abstract: A high efficiency and high power density sigma converter for 48/1V voltage regulator module (VRM) is proposed in this paper. The Sigma converter is a quasi-parallel converter that uses a high efficiency unregulated converter to deliver most power to the load with small power flowing through buck converter responsible for regulating the output voltage. The unregulated isolated converter is LLC converter designed with matrix transformer structure integrating 4 transformers in one core structure with integrating the Synchronous Rectifiers (SRs) with the winding to minimize the termination losses of the transformer so a high efficiency can be achieved. The buck converter is designed with discrete GaN devices and PCB winding inductor to regulate the output voltage. The designed Sigma converter is 48/1V-80A achieving a power density of 420W/in3 and maximum efficiency of 93.4%.

A High-Efficiency Hybrid Resonant Converter With Wide-Input Regulation for Photovoltaic Applications

Abstract: A microconverter serves as a front-end dc–dc stage of a microinverter to convert the power from a photovoltaic module to a dc bus. These front-end microconverters require isolation, high-boost ratio, wide-input voltage regulation, and high efficiency. This paper introduces an isolated resonant converter with hybrid modes of operation to achieve wide-input regulation while still maintaining high efficiency. The proposed converter is designed as a series resonant converter with nominal-input voltage and operates under two additional modes: a boost converter with low-input voltage and a buck converter with high-input voltage. Unlike conventional resonant converters, this converter operates at discontinues conduction mode with a fixed frequency, simplifying the design and control. In addition, this converter can achieve zero-voltage switching (ZVS) and/or zero-current switching (ZCS) of the primary-side MOSFETs, ZVS and/or ZCS of the secondary-side MOSFETs, and ZCS of output diodes under all operating conditions. Experimental results using a 300-W prototype achieve a peak efficiency of 98.1% and a California Energy Commission efficiency of 97.6% including all auxiliary and control power at nominal-input voltage.

Compact Model for Ferroelectric Negative Capacitance Transistor With MFIS Structure

Abstract: We present a physics-based compact model for a ferroelectric negative capacitance FET (NCFET) with a metal–ferroelectric–insulator–semiconductor (MFIS) structure. The model is computationally efficient, and it accurately calculates the gate charge density as a function of the applied voltages. For the first time, an explicit expression for the channel current in bulk NCFET is also deduced taking into account the spatial variation of ferroelectric polarization in the longitudinal direction. Using current continuity condition in the channel, we find that different regions of the ferroelectric may operate in a positive or a negative capacitance state depending on the external biases. The model captures the impact of ferroelectric thickness scaling and variation in the ferroelectric material parameters, and has been validated against the implicit approach involving full numerical computations as well as experimental data. We also compare the device characteristics of the MFIS structure with those of the metal–ferroelectric–metal–insulator–semiconductor structure.

A Frequency Adaptive Phase Shift Modulation Control Based LLC Series Resonant Converter for Wide Input Voltage Applications

Abstract: This paper presents an isolated LLC series resonant DC/DC converter with novel frequency adaptive phase shift modulation control, which suitable for wide input voltage (200–400 V) applications. The proposed topology integrates two half-bridge in series on the primary side to reduce the switching stress to half of the input voltage. Unlike the conventional converter, this control strategy increases the voltage gain range with zero-voltage-switching (ZVS) to all switches under all operating voltage and load variations. Adaptive frequency control is used to secure ZVS in the primary bridge with regards to load change. To do so, the voltage gain becomes independent of the loaded quality factor. In addition, the phase shift control is used to regulate the output voltage as constant under all possible inputs. The control of these two variables also significantly minimizes the circulating current, especially from the low-voltage side, which increases the efficiency as compared to a conventional converter. Experimental results of a 1-Kw prototype converter with 200–400-V input and 48-V output are presented to verify all theoretical analysis and characteristics.

Two-dimensional negative capacitance transistor with polyvinylidene fluoride-based ferroelectric polymer gating

Abstract: Conventional field-effect transistors (FETs) are not expected to satisfy the requirements of future large integrated nanoelectronic circuits because of these circuits’ ultra-high power dissipation and because the conventional FETs cannot overcome the subthreshold swing (SS) limit of 60 mV/decade. In this work, the ordinary oxide of the FET is replaced only by a ferroelectric (Fe) polymer, poly(vinylidene difluoride-trifluoroethylene) (P(VDF-TrFE)). Additionally, we employ a two-dimensional (2D) semiconductor, such as MoS2 and MoSe2, as the channel. This 2D Fe-FET achieves an ultralow SS of 24.2 mV/dec over four orders of magnitude in drain current at room temperature; this sub-60 mV/dec switching is derived from the Fe negative capacitance (NC) effect during the polarization of ferroelectric domain switching. Such 2D NC-FETs, realized by integrating of 2D semiconductors and organic ferroelectrics, provide a new approach to satisfy the requirements of next-generation low-energy-consumption integrated nanoelectronic circuits as well as the requirements of future flexible electronics. Replacing the conventional oxide with a ferroelectric polymer in 2D MoS2 field-effect transistors allows sub-60 mV/dec operation. A team led by Jianlu Wang at the Chinese Academy of Sciences fabricated a negative capacitance field-effect transistor based on a metal-ferroelectric-semiconductor structure, with a 2D semiconductor (MoS2 or MoSe2) as the channel. Notably, when the oxide commonly used in field-effect transistors was replaced by a ferroelectric poly(vinylidene difluoride-trifluoroethylene) polymer, the resulting device achieved a subthreshold slope of 24.2 mV/dec at a drain voltage of 0.1 V, at room temperature. Further reduction of the polymer thickness to 50 nm resulted in a 51.2 mV/dec subthreshold slope. These results show promise for overcoming the 60 mV/decade subthreshold slope limit which plagues conventional transistors.

Analysis of Drain-Induced Barrier Rising in Short-Channel Negative-Capacitance FETs and Its Applications

Abstract: We investigate the performance of hysteresis-free short-channel negative-capacitance FETs (NCFETs) by combining quantum-mechanical calculations with the Landau–Khalatnikov equation. When the subthreshold swing (SS) becomes smaller than 60 mV/dec, a negative value of drain-induced barrier lowering is obtained. This behavior, drain-induced barrier rising (DIBR), causes negative differential resistance in the output characteristics of the NCFETs. We also examine the performance of an inverter composed of hysteresis-free NCFETs to assess the effects of DIBR at the circuit level. Contrary to our expectation, although hysteresis-free NCFETs are used, hysteresis behavior is observed in the transfer properties of the inverter. Furthermore, it is expected that the NCFET inverter with hysteresis behavior can be used as a Schmitt trigger inverter.

A Novel Interleaved Nonisolated Ultrahigh-Step-Up DC–DC Converter With ZVS Performance

Abstract: This paper presents an interleaved nonisolated dc–dc converter with high-voltage gain and zero-voltage switching (ZVS) performance. Both coupled inductor and voltage multiplier cell techniques are used to increase the voltage gain. The ZVS circuit is composed of an active clamp which is in series with the output filter capacitors. This will give rise to further extension of the voltage gain. Applying the interleaving technique at the input of the converter, the ripple of the input current is reduced. Due to the leakage inductances of coupled inductors, the diodes are turned-off under zero-current switching condition. Hence, the reverse current recovery problem is alleviated. The steady-state analysis of the proposed converter is also presented. Finally, a 900-V to 415-W laboratory prototype is implemented to validate the performance of the proposed converter.

Improving the Light-Load Regulation Capability of LLC Series Resonant Converter Using Impedance Analysis

Abstract: Generally, an LLC series resonant converter ( LLC SRC) is an attractive topology for applications, which require wide input variation and high conversion efficiency because of its wide gain capability and soft-switching capability. However, there is a regulation problem in which the output voltage increases as the load current decreases. In this paper, Bode plot and impedance asymptote analysis were conducted to obtain an intuitive sense of the regulation characteristic of LLC SRC under the light-load condition. Moreover, to improve the regulation capability, a new resonant tank with an additional capacitor is proposed. Its design guidelines were determined by Bode plot and impedance asymptote analysis. Therefore, the proposed LLC SRC achieves very light load regulation, while it maintains the advantages of typical LLC SRCs.

Adaptive Voltage Control for Bidirectional Converter in Flicker-Free Electrolytic Capacitor-Less AC–DC LED Driver

Abstract: In this paper, an electrolytic capacitor-less ac–dc light-emitting diode (LED) driver, consisting of a power factor correction (PFC) converter and a buck/boost bidirectional converter, is investigated. The buck/boost bidirectional converter is connected in parallel with the output of the PFC converter and serves to absorb the second harmonic current in the PFC output current, leaving only a dc component to drive the LEDs. This paper proposes an adaptive voltage control scheme for the storage capacitor in the buck/boost bidirectional converter to make the storage capacitor voltage adaptively decrease as the load becomes lighter. Hence, the power losses of the buck/boost bidirectional converter could be reduced at light load. Experimental results are provided to verify the effectiveness of the proposed control scheme.

Impact of Parasitic Capacitance and Ferroelectric Parameters on Negative Capacitance FinFET Characteristics

Abstract: In this letter, we present a compact model and analyze the impact of key parameters on negative capacitance FinFET (NC-FinFET) device operation. The developed model solves FinFET device electrostatics and Landau–Khalatnikov equations self-consistently. An experimental NC-FinFET device is accurately modeled and the experimentally calibrated parameters are used to analyze the NC-FinFETs device performance and its dependence on several key parameters.

Evaluation of Negative Capacitance Ferroelectric MOSFET for Analog Circuit Applications

Abstract: Negative capacitance ferroelectric (FE) field-effect transistor (FeFET) is promising to address the issue of the increasing power density in digital circuit by realizing sub-60 mV/decade subthreshold swing. This inspires us to evaluate its applications in analog circuit. In this paper, the evaluation is performed based on the equivalent circuit model and through device- and circuit-level benchmarking against MOSFET counterpart. It is found that the selection of FE thickness is important to balance current amplification and saturated output characteristics. As compared with MOSFET, FeFET exhibits a larger current, transconductance, and current-to-transconductance generation efficiency. Its output resistance is smaller in the linear region and larger in the saturation region. It also has less variation in threshold voltage with temperature. When implementing FeFETs into various analog circuit applications, we find that a node capacitor could be discharged within shorter time to increase circuit speed; A better analog switch consisting of complementary FeFETs exhibits a lower and more linear on-resistance; Differential amplifier provides larger voltage amplification to small input signal; Current mirror transfers a more precise output current to the reference one.

A Simple Model of Negative Capacitance FET With Electrostatic Short Channel Effects

Abstract: A simple model of negative capacitance (NC) MOSFETs is presented. The model treats 2-D electrostatic effects, and the ballistic to diffusive transport regimes. It shows quantitative agreement with numerical device simulations based on a self-consistent solution of the Poisson equation and quantum transport equation based on nonequilibrium Green’s function formalism, for an NC MOSFET structure without an internal floating gate. The model can accurately describe the reverse drain-induced barrier lowering (DIBL) and negative output differential conductance (NDC) effects as the NC FETs scale down. With approximations valid at low power supply voltages, it is shown that the improvement of the subthreshold swing (SS) due to electrostatic short channel effects results in a linear increase of the reverse DIBL and NDC. For a modified NC MOSFET structure with an ultrathin quantum metallic layer contacted to the source, the SS, however, can be improved considerably with the reverse DIBL and NDC approximately unchanged.

Deleterious Effect of Negative Capacitance on the Performance of Halide Perovskite Solar Cells

Abstract: Negative capacitance in photovoltaic devices has been observed and reported in several cases, but its origin, at low or intermediate frequencies, is under debate. Here we unambiguously demonstrate a direct correlation between the observation of this capacitance and a corresponding decrease in performance of a halide perovskite (HaP; CsPbBr3)-based device, expressed as reduction of open-circuit voltage and fill factor. We have prepared highly stable CsPbBr3 HaPs that do not exhibit any degradation over the duration of the impedance spectroscopy measurements, ruling out degradation as the origin of the observed phenomena. Reconstruction of current–voltage curves from the impedance spectroscopy provided further evidence of the deleterious role of negative capacitance on photoconversion performance.

Multilevel modular switched-capacitor resonant converter with voltage regulation

Abstract: This paper presents a novel modular multilevel switched-capacitor based resonant converter (MMSCRC) to achieve dc-dc power conversion function. In comparison to existing multilevel modular switched-capacitor circuits, the proposed switched-capacitor resonant converter (SCRC) possess voltage regulation capability. Its modular structure accomplishes voltage conversion function and proposed closed-loop phase-shift control regulates the output voltage. Meanwhile, zero-voltage switching (ZVS) operation can be accomplished. By increasing switching frequency of wide bandgap device and reducing inductance in the circuit, magnetic components can be minimized. Hence, high power density and high efficiency of the proposed converter can be achieved. This paper includes circuit operation, steady-state characteristics as well as in-depth analysis for ZVS operation. Simulation results are provided to verify the operation principle of the proposed MMSCRC. A 600W lab prototype with 6:1 conversion ratio has been built. Experimental result are also provided to validate the theoretical analysis.

Intrinsic speed limit of negative capacitance transistors

Abstract: The emergence of negative capacitance as a way to limit power dissipation in CMOS logic transistors has raised the question of response delay of ferroelectric negative capacitance. Latency requirements for digital logic require a response time on the order of 10 ps or less. In this letter, we establish a coherent theoretical framework to analyze the delay between the clock edge at the gate and the response of the semiconductor channel in a ferroelectric negative capacitance transistor. The standard Landau–Khalatnikov equation approximates the slow, diffusive limit of the classical equation of motion. Therefore, using it to predict the response speed is unphysical. After extracting the damping and kinetic inductance from THz spectroscopy data, we simulate the full classical equation of motion and analyze the delay. We find that for doped hafnium oxides, the intrinsic delay is around 270 fs, far less than what is required for digital logic.

Voltage Drop in a Ferroelectric Single Layer Capacitor by Retarded Domain Nucleation.

Abstract: Ferroelectric (FE) capacitor is a critical electric component in microelectronic devices. Among many of its intriguing properties, the recent finding of voltage drop (V-drop) across the FE capacitor while the positive charges flow in is especially eye-catching. This finding was claimed to be direct evidence that the FE capacitor is in negative capacitance (NC) state, which must be useful for (infinitely) high capacitance and ultralow voltage operation of field-effect transistors. Nonetheless, the NC state corresponds to the maximum energy state of the FE material, so it has been widely accepted in the community that the material alleviates that state by forming ferroelectric domains. This work reports a similar V-drop effect from the 150 nm thick epitaxial BaTiO3 ferroelectric thin film, but the interpretation was completely disparate; the V-drop can be precisely simulated by the reverse domain nucleation and propagation of which charge effect cannot be fully compensated for by the supplied charge from th...

Work Function Engineering for Performance Improvement in Leaky Negative Capacitance FETs

Abstract: We analyze the effects of ferroelectric leakage on the performance of a negative capacitance field-effect transistor (NCFET), which has an intermediatemetallic layer between the ferroelectric and the high-K dielectric. We show that, when designed without taking the dielectric leakage into account, the NCFET performance can actually degrade significantlywith respect to that of the baseline FET. To overcome these detrimental effects of leakage, we propose the concept of work-function engineering, where metals of dissimilar work-functions are used for the external gate electrode and the intermediate metallic layer. Using this approach, the ferroelectric charge–voltage characteristic is shifted along the voltage axis, which results in superior performance of the NCFET.

A Novel Hybrid Five-Level Voltage-Source Converter Based on T-Type Topology for High-Efficiency Applications

Abstract: A novel hybrid five-level voltage source converter for high-efficiency applications is investigated in this paper. Compared with traditional multilevel converters, this hybrid multilevel converter generates desired staircase voltage levels with a reduced number of power devices and isolated drivers at higher voltage levels. It has redundant switching state combinations in hybrid multilevel converter, which makes it easy to balance flying capacitor voltages and realize fault-tolerant operation. A voltage balancing control strategy based on switching state redundancies is presented for the hybrid multilevel converter, to generate desired levels and also keep voltage balance of flying capacitors at the same time. The performance of the hybrid multilevel converter under various operating conditions is investigated in MATLAB/Simulink. The effectiveness of the proposed hybrid multilevel converter is validated by experiment results.

Impedance Matching in Wireless Power Transfer

Abstract: Impedance matching is a common issue in a wireless power transfer (WPT) system. This paper summarizes impedance matching methods reported in the literature and gives a theoretical analysis on dc–dc converter for impedance matching in a WPT system. A buck–boost converter in discontinuous conduction mode has the characteristic of that the input resistance is independent of the load resistance and the input voltage, which seems to be suitable for impedance matching. Furthermore, the impedance matching ability of buck–boost converter will not depend on the frequency of rectifier, because it implements the solution to the dc output of rectifier. To verify those, we give several application examples of this buck–boost converter applied in rectifiers with different frequencies, such as 2.45, 5.8, and 24 GHz. As a result, those rectifiers with the buck–boost converter achieve a constant RF-dc conversion efficiency over an extremely wide load range. In addition, it is also successfully utilized in a microwave power transmission system for driving a dc motor.

Negative Capacitance as Performance Booster for Tunnel FETs and MOSFETs: An Experimental Study

Abstract: This letter reports for the first time a full experimental study of performance boosting of tunnel FETs (TFETs) and MOSFETs by negative capacitance (NC) effect. We discuss the importance of capacitance matching between a ferroelectric NC and a device capacitance to achieve hysteretic and non-hysteretic characteristics. PZT ferroelectric capacitors are connected to the gate of three terminals TFETs and MOSFETs and partial or full matching NC conditions for amplification and stability are obtained. First, we demonstrate the characteristics of hysteretic and non-hysteretic NC-TFETs. The main performance boosting is obtained for the non-hysteretic NC-TFET, where the ON-current is increased by a factor of 500 times, transconductance is enhanced by three orders of magnitude, and the low slope region is extended. The boosting of performance is moderate in the hysteretic NC-TFET. Second, we investigate the impact of the same NC booster on MOSFETs. Subthreshold swing as steep as 4 mV/decade with a 1.5-V hysteresis is obtained on a commercial device fabricated in 28-nm CMOS technology. Moreover, we demonstrate a non-hysteretic NC-MOSFET with a full matching of capacitances and a reduced subthreshold swing down to 20 mV/decade.

Medium-Voltage Impedance Measurement Unit for Assessing the System Stability of Electric Ships

Abstract: This paper describes the design and implementation of the first medium-voltage impedance measurement unit (IMU) capable of characterizing in situ source and load impedances of dc and ac networks (4160 V ac, 6000 V dc, 300 A, 2.2 MVA) in the frequency range of 0.1 Hz–1 kHz. The IMU comprises three power electronics building blocks (PEBBs), each built using 10-kV SiC MOSFET H-bridges. The modularity of the PEBBs allows for both series and shunt perturbation injection modes to be realized, as both injection modes are needed to accurately predict the stability of the electrical system. The effectiveness of the proposed impedance identification approach is experimentally verified on medium voltage power grid.

A New Parallel-Connected Diode-Clamped Modular Multilevel Converter With Voltage Self-Balancing

Abstract: The modular multilevel converter (MMC or M2C) is an emerging attractive multilevel topology for medium-voltage high-power applications. The capacitor voltage balancing control and the improvement of output current rating are two challenging issues of MMC. This paper proposed a new parallel-connected diode-clamped M2C (DCM2C), in which each arm consists of two parallel-connected clusters. In this topology, the capacitor voltages can be balanced automatically without any balancing control algorithms. Theoretically, no voltage sensors are needed to measure the capacitor voltages theoretically. Thus, the control of the converter can be simplified greatly. With a simple current-sharing control, an equal current distribution can be achieved between the two clusters. Furthermore, an extended parallel-DCM2C is proposed for larger current applications, and the corresponding current-sharing control method is developed. Experimental results validated the voltage self-balancing capability of parallel-DCM2C and the effectiveness of the proposed current-sharing control.