Negative impedance converter

About: Negative impedance converter is a research topic. Over the lifetime, 5801 publications have been published within this topic receiving 87636 citations.

Indirect current control of a single-phase voltage-sourced boost-type bridge converter operated in the rectifier mode

Abstract: An H-bridge transistorized converter intended for front-end power conversion at a high power-factor and a constant desired output voltage has been analyzed. The state-space model of the H-bridge converter controlled by the bipolar pulse width modulated (PWM) technique is described and the expressions for the equilibrium points of operation of the state variables corresponding to the circuit parameters have been derived. The converter is intended for use as a voltage source feeding an inverter. Hence the requirement of maintaining a desired DC voltage at its output becomes necessary. Transient behavior of two control strategies have been tested to examine their performance in stabilising the converter at the desired operating state. Comparison of the two feedback strategies has been done by simulation studies and the one that was found superior has been experimentally implemented. The experimental implementation of the controller for the converter operation in the rectifier mode is also described. The experimental results obtained are presented and compared with simulation results to validate the controller's performance under transient conditions.

A High-Voltage DC–DC Converter With Vin/3—Voltage Stress on the Primary Switches

Abstract: A high-voltage dc-dc converter with low voltage stress on the power switches and high output current capacity is presented. This converter exhibits three distinct features. First, the voltage stress on the primary switches is only one-third of the input voltage, so that switches of low voltage rating and thus of low on-resistance can be used. This leads to reduced conduction loss. Second, all the switches are soft-switched, so that the switching loss can be reduced. Third, the rectifier is a current tripler, so that the output current capacity, and thus the power handling capacity of the converter are increased. A 5.1-kW, 1000-V/48-V dc-dc converter prototype has been built and tested. Experimental results are favorably compared with theoretical predictions.

Circuit performance analysis of negative capacitance FinFETs

Abstract: Circuit-level performance analysis of negative capacitance FinFETs (NC-FinFET) is presented for ultra-low power high performance applications. Circuit simulations are performed by developing a compact model which solves Landau-Khalatnikov (L-K) equations self-consistently with the three-dimensional device electrostatics of the FinFET device. Using an accurate L g = 30 nm FinFET model, L-K model parameters of ferroelectric (FE) layer are extracted from an experimental NC-FinFET data. With the experimentally calibrated model, we show for the first time that for the same inverter delay as the 14 nm ITRS FinFET, V dd for NC-FinFET can be lowered from 0.7 V to 0.25 V, reducing energy by ∼10×. Optimization of the FE layer parameters can further boost the device performance.

Low frequency negative capacitance behavior of molecular beam epitaxial GaAs n-low temperature-i-p structure with low temperature layer grown at a low temperature

Abstract: The GaAs sample under study is a n-low temperature-i-p structure grown by molecular beam epitaxy with a low-temperature (LT) layer grown at 300 °C and annealed at 620 °C for 1 h. Admittance measurements on this sample reveal a negative capacitance at low frequency. This work analyzes the origin of the negative capacitance and its corresponding frequency-dependent conductance by combining two current components: charging–discharging current and the inertial conducting current. Analysis results indicate that the activation energies and time constants of both current components closely resemble each other and should correspond to the same trap. Based on the results presented herein, we can conclude that the negative capacitance at low frequency provides evidence of a generation-recombination center with an activation energy of 0.77 eV in the LT layer.

Analysis of negative capacitance and self-heating in organic semiconductor devices

Abstract: In admittance spectroscopy of organic semiconductor devices, negative capacitance values arise at low frequency and high voltages. This study aims at explaining the influence of self-heating on the frequency-dependent capacitance and demonstrates its impact on steady-state and dynamic experiments. Therefore, a one dimensional numerical drift-diffusion model extended by the heat equation is presented. We calculate the admittance with two approaches: a Fourier method that is applied to time domain data and a numerically efficient sinusoidal steady state analysis (S3A), which is based on the linearization of the equations around the operating point. The simulation results coincide well with the experimental findings from reference [H. Okumoto and T. Tsutsui, Appl. Phys. Express 7, 061601 (2014)] where the negative capacitance effect of an organic device becomes weaker with better cooling of the structure. Linking the frequency- and time-domain with the Fourier approach supports an effortless interpretation o...