Negative impedance converter

About: Negative impedance converter is a research topic. Over the lifetime, 5801 publications have been published within this topic receiving 87636 citations.

Bridgeless system for directly measuring complex impedance of an eddy current probe

Abstract: An all digital eddy current measurement system is described and illustrated in which an eddy current probe is driven by a driving signal and voltage signals representing the current through and voltage across the probe coil are used to calculate the magnitude and phase angle of a complex probe impedance. Digitization of the voltage signals is controlled by a control logic system which is run separately from but initiated by a microprocessor, the latter of which functions to analyze the acquired data and calculate impedance magnitude and phase angle values therefrom.

An advanced multi-level converter for four-phase SRM drive

Abstract: As generally recognized, the driving performance of SRM at higher speed will be degraded due to the effects of back electromagnetic force (EMF). In this paper, a multi-level converter is proposed to have an enhanced performance at a high speed range. The converter boosts voltage during phase excitation for a four-phase switched reluctance motor(SRM). By using one additional capacitor and switch, an extra controllable boosted voltage can be produced during the rise and fall periods of a motor phase current. Then this active boosted voltage can reduce the effect of EMF at high speeds. The operation and analysis of proposed converter are given for each operation mode. And effect of the boost capacitor voltage on the current waveform is studied. The attractive features of the proposed converter are as follows: obtaining boosted voltage to improve performance of SRM with same numbers of switch and diode as asymmetric converter, having higher control flexibility and capability of boosting voltage compared with passive boosting converters, possessing lower cost and simpler control in comparison with existing active boosting converters. The performances of the proposed circuit are verified by the simulation and experiment results.

A self-adaptive switched-capacitor voltage converter with dynamic input load control for energy harvesting

Abstract: This paper presents an implementation of a fully-integrated switched capacitor voltage converter with self-adjusting source loading. A charge control unit ensures improved load matching to the power source, which can be an RFID antenna or vibration energy harvesting generator. In conjunction with an adaptive stacking scheme voltage-up conversion is also realized leading to capacitor storage voltages which are higher than the generator voltage amplitudes. This and the improved load matching result in a higher generator output power. In addition, due to the switched capacitor charge pump no diode for rectification is necessary. The converter design is completely implemented and fully-integrated in a standard 0.35 µm twin-well CMOS process. Generator powers of up to 780 µW can be treated, and maximum conversion efficiency is close to 48%. Input voltage amplitudes are possible between 0.5 V – 2.5 V , while the supply voltage range is 0.9 V – 3.6 V.

A novel electrostatically doped ferroelectric Schottky barrier tunnel FET: process resilient design

Abstract: This work investigates a process-variation resilient electrostatically-doped ferroelectric Schottky-barrier tunnel FET (ED-FE-SB-TFET) based on negative capacitance (NC). The key attributes of ED-FE-SB-TFET are perovskite ferroelectric (FE) gate stack-induced NC behavior and electrostatic doping to induce pockets at both source/drain and channel interfaces. The positive feedback among the electric dipoles in FE material leads to intrinsic voltage amplification and enhanced gate controllability, thus it facilitates faster switching transitions. The proposed ED-FE-SB-TFET endeavors to create a substantial reduction in the ambipolar current ( $$I_\mathrm{Amb}$$ ), steep sub-threshold slope, paramount boost in drive current, lower drain-induced barrier-lowering, and enhanced scalability. It also obviates the need for metallurgical doping, hence ion-implantation or dopant segregation techniques employed for planar SB-TFETs pocket-doping are no longer required, and it also modifies effective Schottky barrier height and Schottky tunneling barrier width significantly to enhance the device behavior. It offers a simplified fabrication process, and it is highly resilient towards process variations, doping control issues, and random dopant fluctuations. Moreover, there is a reduced thermal budget that facilitates its fabrication on single crystal silicon-on-glass substrate realized by wafer scale epitaxial transfer. Results reveal its potential as strong candidate for next generation, scaled and low power applications.

DC-DC converter and voltage conversion method thereof

Abstract: A DC-DC converter is provided. When a load of the DC-DC converter is too light, the DC-DC converter can raise a frequency of its PWM signal, and reduce a pulse width of the PWM signal, so as to avoid the frequency of the PWM signal falling into a frequency range that can heard by human's ear and maintain high conversion efficiency of the DC-DC converter.