Negative impedance converter

About: Negative impedance converter is a research topic. Over the lifetime, 5801 publications have been published within this topic receiving 87636 citations.

Analysis, design and experimental results of a floating-output interleaved-input boost-derived DC-DC high-gain transformer-less converter

Abstract: In transformer-less energy systems sourced from low and unregulated voltage generated by a fuel cell or photovoltaic source, the voltage gain of the power electronic conditioning stage is required to be as high as possible. Although component parasitic elements limit the practically realisable voltage gain of any converter topology, this becomes a critical issue in the case of the basic step-up converter. In this study, a high-gain interleaved boost-derived converter topology is discussed. The proposed converter topology offers modularity, lower ripple for both input current and output voltage, and lower voltage and current ratings of the various circuit elements when compared to the basic boost converter. Analysis, design and key converter waveforms operating in the continuous conduction mode are provided along with design guidelines. Experimental results taken from a 1 kW laboratory prototype operating at 60 kHz are presented to confirm the validity of the analysis and design considerations.

Novel Three-Port Converter With High-Voltage Gain

Abstract: In this paper, a novel three-port converter (TPC) with high-voltage gain for stand-alone renewable power system applications is proposed. This converter uses only three switches to achieve the power flow control. Two input sources share only one inductor. Thus, the volume can be reduced. Besides, the conversion ratio of the converter is higher than other TPCs. Thus, the degree of freedom of duty cycle is large. The converter can have a higher voltage gain for both low-voltage ports with a lower turns ratio and a reasonable duty ratio. The voltage stress of switches is low; thus, conduction loss can be further improved by adopting low Rds(on) switches. Therefore, the converter can achieve a high conversion ratio and high efficiency at the same time. The operation principles, steady-state analysis, and control method of the converter are presented and discussed. A prototype of the proposed converter with a low input voltage 24 V for photovoltaic source, a battery port voltage 48 V, and an output voltage 400 V is implemented to verify the theoretical analysis. The power flow control of the converter is also built and tested with a digital signal processor.

Low-voltage-swing monolithic dc-dc conversion

Abstract: A low-voltage-swing MOSFET gate drive technique is proposed in this paper for enhancing the efficiency characteristics of high-frequency-switching dc-dc converters. The parasitic power dissipation of a dc-dc converter is reduced by lowering the voltage swing of the power transistor gate drivers. A comprehensive circuit model of the parasitic impedances of a monolithic buck converter is presented. Closed-form expressions for the total power dissipation of a low-swing buck converter are proposed. The effect of reducing the MOSFET gate voltage swings is explored with the proposed circuit model. A range of design parameters is evaluated, permitting the development of a design space for full integration of active and passive devices of a low-swing buck converter on the same die, for a target CMOS technology. The optimum gate voltage swing of a power MOSFET that maximizes efficiency is lower than a standard full voltage swing. An efficiency of 88% at a switching frequency of 102 MHz is achieved for a voltage conversion from 1.8 to 0.9 V with a low-swing dc-dc converter based on a 0.18-/spl mu/m CMOS technology. The power dissipation of a low-swing dc-dc converter is reduced by 27.9% as compared to a standard full-swing dc-dc converter.

Room-temperature negative capacitance in a ferroelectric-dielectric superlattice heterostructure.

Abstract: We demonstrate room-temperature negative capacitance in a ferroelectric–dielectric superlattice heterostructure. In epitaxially grown superlattice of ferroelectric BSTO (Ba0.8Sr0.2TiO3) and dielectric LAO (LaAlO3), capacitance was found to be larger compared to the constituent LAO (dielectric) capacitance. This enhancement of capacitance in a series combination of two capacitors indicates that the ferroelectric was stabilized in a state of negative capacitance. Negative capacitance was observed for superlattices grown on three different substrates (SrTiO3 (001), DyScO3 (110), and GdScO3 (110)) covering a large range of substrate strain. This demonstrates the robustness of the effect as well as potential for controlling the negative capacitance effect using epitaxial strain. Room-temperature demonstration of negative capacitance is an important step toward lowering the subthreshold swing in a transistor below the intrinsic thermodynamic limit of 60 mV/decade and thereby improving energy efficiency.

A three-switch high-voltage converter

Abstract: A novel single active switch two-diodes high-voltage converter is presented. This converter can operate into a capacitor-diode voltage multiplier, which offers simpler structure and control, higher efficiency, reduced electromagnetic interference (EMI), and size and weight savings compared with traditional switched-mode regulated voltage multipliers. Two significant advantages are the continuous input current and easy isolation extension. The new converter is experimentally verified. Both the steady-state and dynamic theoretical models are correlated well with the experimental data.