Negative impedance converter

About: Negative impedance converter is a research topic. Over the lifetime, 5801 publications have been published within this topic receiving 87636 citations.

Sub-60mV-swing negative-capacitance FinFET without hysteresis

Abstract: In this work, we report the first Negative-Capacitance FinFET. ALD Hf042Zr058O2 is added on top of the FinFET's gate stack. The test devices have a floating internal gate that can be electrically probed. Direct measurement found the small-signal voltage amplified by 1.6X maximum at the internal gate in agreement with the improvement of the subthreshold swing (from 87 to 55mV/decade). ION increased by >25% for the IOFF. For the first time, we demonstrate that raising HfZrO2 ferroelectricity, by annealing at higher temperature, reduces and eliminates IV hysteresis and increases the voltage gain. These discoveries will guide future theoretical and experimental work.

Virtual Impedance Current Limiting for Inverters in Microgrids With Synchronous Generators

Abstract: This paper focuses on current limiting for voltage-controlled inverters during overloads caused by poor transient load sharing between inverters and synchronous generators in islanded microgrids The use of simple current reference saturation limiters can cause instability when the voltage regulator loses control after the current reference saturates The use of virtual impedance for current limiting is shown to improve transient stability during current limiting when operating in parallel with synchronous generators Small-signal analysis is used to set the virtual impedance magnitude and $X/R$ ratio, and validation is provided by simulation and experimental results

Couplings in Phase Domain Impedance Modeling of Grid-Connected Converters

Abstract: The output impedance of a power converter plays an important role in the stability assessment of the converter. The impedance can be expressed in different frames such as the stationary frame (phase domain) or in the synchronous frame ( dq domain). To treat the three-phase system like a single-phase system, the system can be divided into positive and negative sequences in the phase domain. This paper demonstrates that there exist couplings between the positive and negative sequences, even in a balanced system due to the PLL, which is important for synchronization. Further it will be shown that even though these couplings are very small in magnitude, they are important in the stability of the converter.

A New Topology of Cascaded Multilevel Converters With Reduced Number of Components for High-Voltage Applications

Abstract: In this paper, a new topology of a cascaded multilevel converter is proposed. The proposed topology is based on a cascaded connection of single-phase submultilevel converter units and full-bridge converters. Compared to the conventional multilevel converter, the number of dc voltage sources, switches, installation area, and converter cost is significantly reduced as the number of voltage steps increases. In order to calculate the magnitudes of the required dc voltage sources, three methods are proposed. Then, the structure of the proposed topology is optimized in order to utilize a minimum number of switches and dc voltage sources, and produce a high number of output voltage steps. The operation and performance of the proposed multilevel converter is verified by simulation results and compared with experimental results of a single-phase 49-level converter, too.

Spatially resolved steady-state negative capacitance.

Abstract: Negative capacitance is a newly discovered state of ferroelectric materials that holds promise for electronics applications by exploiting a region of thermodynamic space that is normally not accessible1–14. Although existing reports of negative capacitance substantiate the importance of this phenomenon, they have focused on its macroscale manifestation. These manifestations demonstrate possible uses of steady-state negative capacitance—for example, enhancing the capacitance of a ferroelectric–dielectric heterostructure4,7,14 or improving the subthreshold swing of a transistor8–12. Yet they constitute only indirect measurements of the local state of negative capacitance in which the ferroelectric resides. Spatial mapping of this phenomenon would help its understanding at a microscopic scale and also help to achieve optimal design of devices with potential technological applications. Here we demonstrate a direct measurement of steady-state negative capacitance in a ferroelectric–dielectric heterostructure. We use electron microscopy complemented by phase-field and first-principles-based (second-principles) simulations in SrTiO3/PbTiO3 superlattices to directly determine, with atomic resolution, the local regions in the ferroelectric material where a state of negative capacitance is stabilized. Simultaneous vector mapping of atomic displacements (related to a complex pattern in the polarization field), in conjunction with reconstruction of the local electric field, identify the negative capacitance regions as those with higher energy density and larger polarizability: the domain walls where the polarization is suppressed. Imaging steady-state negative capacitance in SrTiO3/PbTiO3 superlattices with atomic resolution provides solid microscale support for this phenomenon.