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Showing papers on "Offset (computer science) published in 2000"


Journal ArticleDOI
TL;DR: Two timing offset estimation methods for orthogonal frequency division multiplexing (OFDM) systems as modifications to Schmidl and Cox's method are presented and both have significantly smaller estimator variance in both channel conditions.
Abstract: Two timing offset estimation methods for orthogonal frequency division multiplexing (OFDM) systems as modifications to Schmidl and Cox's method (see IEEE Trans. Commun., vol.45, p.1613-21, 1997) are presented. The performances of the timing offset estimators in additive white Gaussian noise channel and intersymbol interference channel are compared in terms of estimator variance obtained by simulation. Both proposed methods have significantly smaller estimator variance in both channel conditions.

473 citations


Journal ArticleDOI
TL;DR: The intrinsic structure information of OFDM signals is exploited to derive a carrier offset estimator that offers the accuracy of a super resolution subspace method, ESPRIT.
Abstract: In orthogonal frequency-division multiplex (OFDM) communications, the loss of orthogonality due to the carrier-frequency offset must be compensated before discrete Fourier transform-based demodulation can be performed. This paper proposes a new carrier offset estimation technique for OFDM communications over a frequency-selective fading channel. We exploit the intrinsic structure information of OFDM signals to derive a carrier offset estimator that offers the accuracy of a super resolution subspace method, ESPRIT.

351 citations


Journal ArticleDOI
TL;DR: A new minimal-surface-like model and its variational and partial differential equation (PDE) formulation are introduced and the constructed shape is smoother than any piecewise linear reconstruction.

319 citations


Patent
24 May 2000
TL;DR: In this paper, a direct conversion type transceiver system incorporating an offset correction and automatic gain control system was proposed, which includes an amplifier amplifying a baseband signal which was directly converted from a received incoming RF signal, a feedback offset canceller controllably canceling DC offset, an automatic gain controller controlling gain of the amplifier, and a feed forward offset cancellation coupled to a signal peak detector.
Abstract: A direct conversion type transceiver system incorporates an offset correction and automatic gain control system. The automatic gain control system includes an amplifier amplifying a baseband signal which is directly converted from a received incoming RF signal, a feedback offset canceller controllably canceling DC offset, an automatic gain controller controlling gain of the amplifier, and a feed forward offset canceller coupled to a signal peak detector. The signal peak detector controlling the automatic gain controller and the feed forward offset canceller simultaneously, the feed forward offset canceller further canceling the DC offset.

120 citations


Proceedings ArticleDOI
28 May 2000
TL;DR: An ADC using several parallel cells suffers from offset differences between the cells, which causes non-harmonic distortion, and a method for removing the offset in the digital domain is proposed, based on a PRBS-controlled chopper at the ADC input.
Abstract: An ADC using several parallel cells suffers from offset differences between the cells, which causes non-harmonic distortion. A method for removing the offset in the digital domain is proposed. The method is based on a PRBS-controlled chopper at the ADC input, which transforms any input signal to noise. The randomization controls the batch size required for removing the offset by a mean value calculation. The measured results are SFDR=72 dB and SNDR=59.0 dB at 22 MS/s, an improvement of 19 dB and 10 dB respectively.

82 citations


Journal ArticleDOI
TL;DR: This paper presents a complete formulation of the problem that includes explicit constraints to model the movement of traffic along the streets between the intersections in a time-expanded network, as well as constraints to capture the permitted movements from modern signal controllers.

75 citations


Journal ArticleDOI
TL;DR: In this article, the degeneration of generalized offsets to irreducible hypersurfaces over algebraically closed fields of characteristic zero has been analyzed and the existence of simple and special components of the offset has been shown.
Abstract: In this paper, we present a complete algebraic analysis of degeneration and existence of simple and special components of generalized offsets to irreducible hypersurfaces over algebraically closed fields of characteristic zero. More precisely, we analyze the degeneration situations when offseting, and we state that there exist, at most, a finite set of distances for which the offset of a hypersurface may degenerate. As a consequence of this analysis, an algorithmic method to determine such distances is derived. Furthermore, as an application of these results, a complete degeneration analysis of the generalized offset to the sphere is developed. In addition, we study the existence of simple and special components of the offset. In this context we prove that, in the case of classical offsets, there always exists at least one simple component and, in the case of generalized offsets, we prove that for almost every distance and for almost every isometry, all components of the offset are simple.

62 citations


Patent
Weisz John1
03 Oct 2000
TL;DR: In this article, a pickler apparatus and a process for pickling and unpickling data objects are described, and the metadata that store attributes of a source data object organized according to an abstract data type, and a data format of the computer system that is hosting the pickler is described.
Abstract: A pickler apparatus and a process for pickling and unpickling data objects are disclosed. Data objects are described in metadata that store attributes of a source data object organized according to an abstract data type, and a data format of the computer system that is hosting the pickler. Using the metadata, the data object is transformed into a linear representation or image. The format, layout, alignment, and inheritance representation of the host system are applied to the image during transformation. The image has a length value, a prefix segment, and a string of bytes copied from the data object. The prefix segment may be the metadata, so that the metadata is transported with the image whereby a receiving process can reconstruct the data object from the image based upon the metadata. The image is canonical and is easily and rapidly transported across a network. When a pointer is encountered in the data object, it is transformed in the string of bytes into a value of the offset in bytes indicated by the pointer, a length of the data that is referenced by the pointer, and a segment of bytes copied from the data that is referenced by the pointer. Nested tables, arrays, and complex collections referenced in the object are efficiently linearized.

59 citations


Patent
29 Sep 2000
TL;DR: In this article, an initial value mask is applied to each one of the offset bits in the output of the discrete sensor in order to determine whether or not offset bits include both initialization offset bits and transition offset bits.
Abstract: A method processes the outputs of a discrete sensor in a computer system. An initial value mask is applied to each one of the offset bits in the output of the discrete sensor. An initial value is obtained for each one of the offset bits in the output of the discrete sensor according to the initial value mask. It is next determined whether or not the offset bits in the output of the discrete sensor includes both initialization offset bits and transition offset bits. If the offset bits include both initialization offset bits and transition bits, only the initialization bits of an incoming mask corresponding to the output of the discrete sensor are reset.

59 citations


Patent
05 Apr 2000
TL;DR: In this paper, an offset integrator and method are provided to induce integrator leakage while simultaneously latching and canceling its own offset, which includes combining a first and second input signals with a part of the output signal of a different polarity.
Abstract: An offset integrator and method are provided to induce integrator leakage while simultaneously latching and canceling its own offset. The method includes combining a first and second input signals with a part of the output signal of a different polarity to produce a charge signal. An accumulation of the charge signal on a plurality of storage components is used to reduce the offset component of the output signal and simultaneously inducing an integrator leak. A positive and negative components of the input signals are combined with a negative and positive offset components of the part of the output signal, respectively. The method liner includes modifying a positive and negative components of an in-phase and a quadrature signal. A reset signal may be provided to erase a plurality of memory locations. A gating scheme may be used to provide a predetermined signal to produce a two-phase, non-overlapping signal. The two-phase non-overlapping signal also produces a predetermined delayed two-phase, non-overlapping signal. The gating scheme provides proper timing signals without the use of complementary clock phases.

56 citations


Patent
21 Apr 2000
TL;DR: In this paper, a frequency-locked loop is used to characterize the frequency offset by processing the samples received on a pilot channel instead of using the offset information thus derived to correct the frequency of the received signal.
Abstract: Coherent detection of high-speed digital wireless communications becomes more difficult when the frequencies of the transmitter and receiver oscillators do not coincide. A frequency-locked loop may be used to characterize this frequency offset by processing the samples received on a pilot channel. Rather than using the offset information thus derived to correct the frequency of the received signal, the invention realizes considerable computational savings by applying a frequency correction to the despread pilot samples instead.

Patent
25 Jul 2000
TL;DR: An offset voltage calibration circuit for use with a digital switching amplifier (400) is described in this paper, where the calibration circuit includes an analog-to-digital converter (406) for converting at least one DC offset voltage associated with the digital switch amplifier to digital offset data.
Abstract: An offset voltage calibration circuit for use with a digital switching amplifier (400) The calibration circuit includes an analog-to-digital converter (406) for converting at least one DC offset voltage associated with the digital switching amplifier (400) to digital offset data A memory (408) stores the digital offset data Control circuitry (402) controls the analog-to-digital converter (406) A digital-to-analog converter (404) coupled to the memory (408) receives the digital offset data and generates an offset compensation voltage for applying to an input port of the digital switching amplifier which thereby cancels at least a portion of the at least one DC offset voltage

Patent
Dong-Kyu Kim1
29 Dec 2000
TL;DR: In this paper, a timing and frequency offset estimation method for OFDM systems using an analytic tone is proposed. But the method is based on correlation function and the interval between two samples in correlation is not considered.
Abstract: A timing and frequency offset estimation method for OFDM use an analytic tone in calculating timing offset estimation and a frequency offset estimation. An analytic tone includes a signal that contains only one subcarrier and has characteristics of a uniform magnitude and a uniform phase rotation. The estimation algorithm with an analytic tone is based correlation function. By changing the interval between two samples in correlation, the maximum estimation range for the frequency offset can be extended to ±N/2 subcarrier spacing, where N is the number of total subcarriers. Thus, the frequency synchronization scheme for OFDM systems has a wider range and a more simple complexity than traditional ones requiring separate fine and coarse synchronization.

Patent
24 Feb 2000
TL;DR: In this paper, an offset detection section and an amplitude detection section detect the offset amount and amplitude value of the tracking error signal with respect to the displacement amount of the object lens from the center of the optical pickup.
Abstract: In order to correct the change in the offset and amplitude of a tracking error signal because of the change in the position of an object lens from the center of an optical pickup, the offset amount and amplitude value of the tracking error signal with respect to the displacement amount of the object lens from the center of the optical pickup are checked beforehand, and the displacement amount of the object lens is estimated on the basis of a tracking correction signal by using an object lens displacement observer. An offset detection section and an amplitude detection section detect the offset amount and amplitude value of the tracking error signal respectively, and the tracking error signal is corrected by an offset correction circuit and an amplitude correction circuit on the basis of the offset amount and amplitude value having been checked beforehand so that the offset amount and the amplitude value of the tracking error signal become identical to those obtained when the displacement amount of the object lens is zero. In addition, the offset of the tilt error signal depending on the movement direction of the optical pickup 2 is detected and recorded beforehand, and the tilt error signal is corrected on the basis of the above-mentioned recorded offset when a rotation direction detection section detects the moving direction of the optical pickup.

Patent
Esko Nieminen1
03 May 2000
TL;DR: In this article, three different methods for updating a linear feedback shift register of a code generator, and code generators applying the methods, are described, and the basic method comprises the following: (1) generating a binary offset number illustrating the offset, (2) generating the counter showing the number of bits in the offset number, (3) initializing a temporary state with the unit state, and (4) iterating as long as the counter value is higher than zero, when the counter has reached the value zero, setting the temporary state as the target state.
Abstract: The invention relates to three different methods for updating a linear feedback shift register of a code generator, and code generators applying the methods. In the basic method a Galois-type linear feedback shift register of a code generator is updated to a target state which is at a known offset from a unit state. The basic method comprises the following: ( 302 ) generating a binary offset number illustrating the offset; ( 304 ) generating a counter showing the number of bits in the binary offset number; ( 306 ) initializing a temporary state with the unit state; ( 308 ) iterating as long as the counter value is higher than zero: ( 310 ) multiplying the temporary state by itself by applying a Galois Field multiplication; ( 312 ) shifting the temporary state one state forward from the current temporary state if the value of the bit shown by the counter is one; and ( 314 ) decrementing the counter value by one; ( 316 ) in the end, when the counter has reached the value zero, setting the temporary state as the target state. The described basic method is also employed in methods for updating a Galois-type/Fibonacci-type linear feedback shift register of a code generator to a new state which is at a known offset from a current state.

Patent
20 Apr 2000
TL;DR: In this article, an auto-zero amplifier is used to cancel offset voltages in the power control loop and external offsets by coupling the output of the RF power controller to an auto zero amplifier during standby mode.
Abstract: The invention provides RF power controllers that cancel offset voltages in the power control loop and external offset voltages by coupling the output of the RF power controller to an auto-zero amplifier during STANDBY mode. The auto-zero amplifier controls the output voltage of the RF power controller during each STANDBY mode so as to eliminate the effect of offset voltages. The voltage at the input of the auto-zero amplifier that allows the offset voltages to be canceled is stored during ENABLE mode. The stored voltage is used by the auto-zero amplifier to continue to remove the effect of the offset voltages on the output voltage of the RF power controller during ENABLE mode. Offset drifts due to temperature, power supply changes, etc. are canceled due to frequent offset sampling.

Patent
15 May 2000
TL;DR: In this paper, an OFDM receiver is provided with an offset compensating device (14) for compensating the frequency offset of a received OFDM signal, which includes a memory (51) for holding two reference signals corresponding to arbitrary parts in the start symbol of the signal.
Abstract: An OFDM receiver is provided with an offset compensating device (14) for compensating the frequency offset of a received OFDM signal. The offset compensating device (14) includes a memory (51) for holding two reference signals corresponding to arbitrary parts in the start symbol of the OFDM signal. The cross-correlation values between the received OFDM signal and the two reference signals are calculated by cross-correlation units (52 and 53), and respective peak positions are detected by a peak detector (54). A frequency offset estimate of the received OFDM signal is estimated by a frequency offset estimating circuit (55) based on the cross-correlation values in the detected peak positions. A phase rotating circuit (37) compensates the frequency offset of the received OFDM signal based on the estimated frequency offset estimate.

Patent
22 Sep 2000
TL;DR: A differential amplifier with adjustable offset as mentioned in this paper includes a differential pair, a controller, an offset adjuster and an output stage, which can be used to compensate for device mismatch in the differential amplifier.
Abstract: A differential amplifier with adjustable offset includes a differential pair, a controller, an offset adjuster and an output stage. The differential pair and the output stage can be standard implementations such as, for example, a source-coupled PFETs and a folded-cascode output stage. The offset adjuster includes transistors that can be selectively enabled to form a composite transistor that is connected in parallel with at least one transistor of the differential pair to, in effect, increase the size of the transistor of the differential pair. The controller can reduce offset by causing the offset adjuster to increase the effective size of the appropriate transistor of the differential pair to compensate for device mismatch in the differential amplifier.

Patent
Benjamin W. Mooring1
22 Nov 2000
TL;DR: In this article, the authors proposed a method for dynamic alignment of a wafer with a support blade that carries the wafer by making a determination of an approximate value of an offset of the offset with respect to a desired location of the wafers in a module.
Abstract: Dynamic alignment of a wafer with a support blade that carries the wafer is provided by making a determination of an approximate value of an offset of the wafer with respect to a desired location of the wafer in a module. This determination is in terms of a statement of an optimization program, which effectively keeps an offset computation time period within a wafer transfer time period. By a method, and by programming a computer, the wafer is picked up from a first location using an end effector and the end effector is moved to transfer the picked up wafer from the first location past a set of sensors to produce sensor data. In the event of an unknown offset of a wafer, the picking up operation results in the picked up wafer being misaligned with respect to a desired position of the picked up wafer on the end effector. When the desired location corresponds to original target coordinates to which the end effector normally moves, the original target coordinates are modified to compensate for the approximate value of the offset. The end effector is then caused to place the picked up wafer at the modified target coordinates to compensate for the unknown offset and the misalignment. By determining the amount of such wafer offset using the optimization program, the probability of convergence to a precise value of the offset is higher than with non-optimization programs.

Proceedings ArticleDOI
TL;DR: In this paper, the Lame parameters, Lambda and Mu, are estimated separately for each offset stack to compensate for offset-dependent phase, bandwidth and tuning and nmo stretch effects.
Abstract: Summary Seismic amplitude variation with offset holds information on density and two elastic parameters: compressional and shear velocities (or impedances). We simultaneously invert multiple offset stacks to transform P-wave offset seismic reflection data to these parameters. Prior to the inversion, wavelets are estimated separately for each offset stack. This enables the inversion to compensate for offset-dependent phase, bandwidth and tuning and nmo stretch effects. The impedance volumes can be interpreted separately or combined to estimate other geophysical parameters which might optimally discriminate between facies. In this regard, we have found the Lame’ parameters, Lambda and Mu particularly useful. From well log analysis we expect that reservoir sands have lower Lambda (incompressibility) and higher


Journal ArticleDOI
TL;DR: In this article, a Nanomessmaschine for the dreidimensionale Koordinatenmessung with an Auflösung of 1,24 nm is presented.
Abstract: Abstract Am Institut für Prozessmess- und Sensortechnik wird eine Nanomessmaschine für die dreidimensionale Koordinatenmessung mit einem Messbereich von 25 mm x 25 mm x 5 mm und einer Auflösung von 1,24 nm entwickelt. Das Gerät schließt mit seiner Auflösung und seinem Messbereich eine Gerätelücke in der Koordinatenmesstechnik. Drei Miniaturplanspiegelinterferometer, ein Antastsensor und zwei Winkelsensoren werden so angeordnet, dass in allen drei Koordinatenachsen abbefehlerfreie Messungen möglich sind. Anwendungsgebiet der neuen Nanomessmaschine ist die Präzisionsvermessung von Kleinteilen und Mikrostrukturen.

Patent
Kiran Kuchi1
31 Aug 2000
TL;DR: In this article, a hop delay diversity scheme for multiple antenna transmissions is proposed, where an input symbol stream is offset in time by M symbol periods to generate or offset symbol stream.
Abstract: A method and apparatus for providing hopped delay diversity for multiple antenna transmissions. In the method and apparatus, an input symbol stream is offset in time by M symbol periods to generate or offset symbol stream. The offset input stream may be offset so as to lead or lag the original input symbol stream. The original input symbol stream is then transmitted on a first set of N antennas and the offset input symbol stream is transmitted on a second set of N antennas, with transmit diversity techniques applied to the transmissions from the first and second set of N antennas.

Patent
27 Sep 2000
TL;DR: In this paper, the authors propose a method that reduces an offset in a baseband signal by changing a downconversion frequency in response to the offset, which can be used to couple a wireless receive channel to a frequency synthesizer.
Abstract: An apparatus that has a feedback circuit that couples a wireless receive channel to a frequency synthesizer. A method that reduces an offset in a baseband signal by changing a downconversion frequency in response to the offset.

Patent
31 May 2000
TL;DR: In this paper, an imaginary aircraft, called the shadow aircraft, flies the original flight plan and causes the true aircraft to fly the offset course, which has the same number of legs as the original course.
Abstract: In the present invention, an imaginary aircraft, called the “shadow aircraft,” flies the original flight plan and, in turn, causes the true aircraft to fly the offset course. The offset course has the same number of legs as the original course, and for each leg of the original course, there is a corresponding parallel leg of the offset course. Except for an initial waypoint and a final waypoint, the locations of offset course waypoints are defined to be the intersections of the straight lines parallel to the original legs at the specified offset distance. The range and bearing to the offset course initial waypoint are chosen to be the same as the range and bearing to the next waypoint. For the interior legs of the flight plan, the lengths of the offset course legs vary from the corresponding “true” course leg. A maximum offset distance, a minimum offset course leg length, and an allowable region of transition are defined in the offset course system in order to be able to acquire and track a “flyable” offset course. The resulting system enables an aircraft to fly an offset course that is offset laterally from the true aircraft position without computing and storing offset course geometry in the form of latitude and longitude of the offset waypoints.

Patent
03 Apr 2000
TL;DR: In this article, the authors propose a device for reading data from an interleaver memory in which L data bits are stored, the device including : Ng PN generators each including m memories; an address generator for adding an offset value to the input data size to provide a virtual address having a size of a multiple of 2m.
Abstract: A device for generating L addresses, which are smaller in number than 2mxNg virtual addresses, for reading data from an interleaver memory in which L data bits are stored, the device including : Ng PN generators each including m memories; an address generator for adding an offset value to the input data size to provide a virtual address having a size of a multiple of 2m, and generating addresses other than addresses corresponding to the offset value in address generation areas using the address generation areas having the size of 2m; and means for reading the input data from the interleaver memory using the addresses generated from the address generation areas

Patent
16 May 2000
TL;DR: In this paper, a gain correction memory is used to correct dispersion in a characteristic of each semiconductor light sensor to correct an output signal of the light sensor, which can be used to obtain high image quality by eliminating a specific fixed pattern noise to the image pickup element.
Abstract: PROBLEM TO BE SOLVED: To obtain high image quality by eliminating a specific fixed pattern noise to the solid-state image pickup element, that adopts the configuration of extracting an output signal of each semiconductor light sensor via a switch, by correcting the output signal of the semiconductor light sensor with correction data for dispersion in a characteristic of each semiconductor light optical sensor. SOLUTION: Correction data to correct dispersion in a characteristic of each semiconductor light sensor are used to correct an output signal of the semiconductor light sensor. A gain correction memory 20 of this image pickup element stores gain correction data of each semiconductor light sensor in an area sensor section 10. An offset correction memory 21 stores offset correction data in each semiconductor light sensor in the area sensor section 10. An adder 25 adds offset correction data read from the memory 21 to conduct offset correction. A multiplier 26 multiplies the gain controller data read from the memory 20 with the image data after offset so as conduct gain correction.

Patent
30 Aug 2000
TL;DR: In this article, an image processing apparatus (800 ) for a charge coupled device having hot/cold pixel and line noise filtering is disclosed which provides optical black and offset correction for charge-coupled devices such that a digitally programmable bandwidth exists.
Abstract: An image processing apparatus ( 800 ) for a charge coupled device having hot/cold pixel and line noise filtering is disclosed which provides optical black and offset correction. The present invention teaches an offset and optical black correction circuit having a digital filter to obtain noise-free optical black correction for charge-coupled devices such that a digitally programmable bandwidth exists. The sum of the channel offset and optical black level is averaged for a given number of lines having a number of optical black cells per line and this sum passes through a digital filter. Moreover, the channel is digitally calibrated to obtain a user programmed ADC ( 810 ) output which corresponds to that average.

Patent
17 Aug 2000
TL;DR: An improved offset correction circuit for an image digitizing system having a correlated double sample and hold circuit, a programmable gain amplifier and an analog-to-digital converter is provided in this paper.
Abstract: An improved offset correction circuit for an image digitizing system having a correlated double sample and hold circuit, a programmable gain amplifier and an analog-to-digital converter. The output of the analog-to-digital converter is provided to a dual offset correction circuit. The dual offset correction circuit provides both first and second correction values as feedback signals. In one embodiment, the first correction value is a coarse correction which is applied prior to amplification by the programmable gain amplifier. The second correction value is a fine correction offset which is applied as feedback after the programmable gain amplifier.

Patent
28 Aug 2000
TL;DR: In this article, a data structure is disclosed, which includes a data descriptor record, a type field, a base address field, an offset field, and a length field, where the offset field is configured to indicate a starting address of data within a secondary data structure.
Abstract: A data structure is disclosed. The data structure includes a data descriptor record. In turn, the data descriptor record includes a type field, a base address field, an offset field, wherein the, and a length field. The type field may be configured, for example, to indicate a data structure type. The data structure type may be configured to assume a values indicating one of a contiguous buffer, a scatter-gather list and a linked list structure, among other such data structures. The base address field may be configured, for example, to store a base address, with the base address being a starting address of a secondary data structure associated with the data descriptor record. The offset field may be configured, for example, to indicate a starting address of data within a secondary data structure pointed to by a base address stored in the base address field. The length field is configured to indicate a length of data stored in a secondary data structure pointed to by a base address stored in the base address field.