Showing papers on "Output impedance published in 1986"

Method of and apparatus for measuring the state of discharge of a battery

Abstract: A method is described of measuring the state of discharge of a battery, i.e. the ratio between the supplied capacity and the nominal capacity. The method consists in measuring a first internal impedance of the battery at a first frequency and a second internal impedance of the battery at a second frequency, then in determining the argument of the difference between the internal impedances, the resulting argument being representative of the state of discharge of the battery. The method can be used to advantage to check in a rapid, accurate and non-destructive way whether batteries to be used in portable appliances, e.g. electronic watches, are in good working order before being fitted into the appliances.

Output circuit having transistor monitor for matching output impedance to load impedance

Abstract: An output circuit comprises an output transistor circuit for applying an output signal to a transmission line connected to an output terminal, a circuit for driving the output transistor circuit in response to an input signal applied to an input terminal, and a control circuit by which the signal amplitude of a first wave applicable to the transmission line with a load connected to the output terminal through the transmission line is rendered approximately one half of the output signal amplitude with a load directly connected to the output terminal. The control circuit includes a monitoring transistor within the same chip as the output transistor circuit, a selected one of the output resistance and input signal of the output transistor circuit being controlled in accordance with the magnitude of the drain current of the monitoring transistor to adjust the amplitude of the signal applied to the transmission line. Transmission with transmitting and receiving ends having a well-defined transmission waveform is obtained, thereby making possible high-speed signal transmission between LSI chips.

Impedance matching arrangement

Abstract: An impedance matching arrangement is suitable for use with a frequency hopping radio communications system which is operable over a wide frequency band, so as to match the operating impedance of the antenna at each of the frequencies used. As the frequency of the radio system hops from one frequency to another, a note of any impedance mismatch is noted and data derived therefrom is stored for future use when that frequency is next selected so as to reduce any impedance mismatch.

Current limited constant frequency dc converter

Abstract: A constant-current, current-programmed dc-to-dc converter includes a controllable switch and an inductor. The switch is rendered conductive in response to a recurrent clock signal, and nonconductive in response to a comparison of a voltage representing the inductor ramp current with an output voltage error signal from a high impedance source, which establishes an output voltage control feedback loop. An overcurrent limiting circuit includes a current sensor having a low output impedance which produces a load current representative signal. The load current representative signal is applied to an amplifier having a low output impedance and which includes a diode in its feedback loop to maintain it nonsaturated. A second diode is connected to the output of the amplifier and to the high impedance output terminal of the error voltage source to close a current limiting degenerative feedback loop which swamps the error voltage when the second diode becomes conductive due to excess load current. This reduces the peak value of inductor current sufficient to maintain the desired load current limit. If the amplifier fails open-circuit, both diodes conduct to the low impedance current sensor and continue to provide load overcurrent protection.

Protection system for preventing defibrillation with incorrect or improperly connected electrodes

Abstract: A protection circuit for a defibrillator that prevents a defibrillator pulse from being generated if the impedance between the defibrillator's electrode leads is not characteristic of the impedance between a pair of defibrillator electrodes properly connected to the defibrillator. The impedance measuring circuit applies a current to the electrode leads and the resulting voltage is measured to provide an indication of the electrode's impedance. The current is applied between the electrodes at about 33 kHz to approximate the impedance between a pair of defibrillator electrodes during a defibrillation pulse. The output of the measurement circuit is converted to an 8 bit word by an analog-to-digital converter and read by a microprocessor which compares the measured impedance to various impedance values in order to either generate an enable signal for the defibrillator or display messages indicative of open or short circuited electrode leads or a patient monitoring electrode connected to the electrode leads. the impedance measurement circuit operates in either of two ranges which are selected by the microprocessor on the basis of the measured impedance values.

Uniform intensity led driver circuit

Abstract: A unique driver circuit for providing constant average current through a driven element or elements having varying impedance first samples the impedance at the drive terminal in order to determine impedance of the driven elements. For increasing impedance of the driven elements, the duty cycle of the driving signal is increased, thereby resulting in a near-constant average current through the driven elements when the number of driven elements in series is changed.

Impedance matched, high-power, rf antenna for ion cyclotron resonance heating of a plasma

Abstract: A resonant double loop radio frequency (rf) antenna for radiating high-power rf energy into a magnetically confined plasma. An inductive element in the form of a large current strap, forming the radiating element, is connected between two variable capacitors to form a resonant circuit. A real input impedance results from tapping into the resonant circuit along the inductive element, generally near the midpoint thereof. The impedance can be matched to the source impedance by adjusting the separate capacitors for a given tap arrangement or by keeping the two capacitances fixed and adjustng the tap position. This results in a substantial reduction in the voltage and current in the transmission system to the antenna compared to unmatched antennas. Because the complete circuit loop consisting of the two capacitors and the inductive element is resonant, current flows in the same direction along the entire length of the radiating element and is approximately equal in each branch of the circuit. Unidirectional current flow permits excitation of low order poloidal modes which penetrate more deeply into the plasma.

Adaptive impedance mismatch detector system

Abstract: An adaptive impedance mismatch detector system (10) for determining whether or not a particular load impedance (30) is matched or mismatched to the characteristic impedance of a transmission line (at 20). The detector system is capable of determining if a particular load impedance has a value outside of an impedance threshold circle (24) having a center (22) at a location other than at the center of the Smith Chart (Fig. 2). The system changes the radius and/or center of the threshold circle in response to changes in circuit operating conditions or parameters. This flexibility enables the detector to be more selective in determining improper load conditions.

Impedance of a horizontal coil above a conducting half-space

Abstract: The induction of eddy currents by a circular, air-cooled coil of rectangular cross section, carrying a low-frequency alternating current and with its axis parallel to the surface of a homogeneous conducting half-space is considered. An exact, closed-form expression for the coil impedance is derived. The calculations are in excellent agreement with experiment and agree with an independent calculation of coil impedance which is valid in the limit of small skin depth.

Four-state I/O control circuit

Abstract: An I/O control circuit is provided which is of the type that receives two inputs such that four sets of input conditions to the circuit are defined. A first set of input conditions establishes a low impedance path from the circuit output to the positive supply. A second set of input conditions establishes a low impedance path from the output to the negative supply, or ground. A third set of input conditions establishes a high impedance path from the output to both the positive and the negative supply. And, in accordance with the present invention, "pull-up" means is connected to the output such that the fourth set of input conditions establishes a path to the positive supply, the path having an impedance which is intermediate that of the low impedance and the high impedance. Alternatively, "pull-down down" means is connected to the output such that the fourth set of input conditions establishes an intermediate impedance path to the negative supply.

Antennas in material media near boundaries with application to communication and geophysical exploration, Part I: The bare metal dipole

Abstract: The properties of the bare metal dipole embedded in a dissipative medium near a boundary are examined. These include the distribution of current, the driving-point admittance and impedance, and the effective length, with particular reference to antennas in the earth near the air surface at frequencies in the range from 30 to 300 kHz and antennas on the sea floor at frequencies in the range from 0.3 to 3 Hz. The effects of the internal impedance of the copper conductor are included at the low frequencies where they are important.

Temperature compensated output buffer

Abstract: An integrated circuit with temperature compensated output buffers which are adapted for impedance matched coupling to transmission lines when operated at either room temperature or at a cryogenic temperature (e.g., immersed in liquid nitrogen). The output buffers include output terminals which are adapted to be coupled to the transmission lines. Output stages of the output buffers have an output impedance which is less than a characteristic impedance of the transmission lines, and are characterized by a temperature coefficient of resistance. Compensation resistors which have an impedance less than the characteristic impedance of the transmission lines, and are characterized by a relatively low temperature coefficient of resistance, couple the output stages to the output terminals.

Active matching transmit/receive module

Abstract: A transmit/receive module is disclosed that provides selectable impedance matching between: a power amplifier and the antenna of a phased array when the radar is transmitting, and selectable impedance matching between the antenna and a low noise amplifier when the radar is receiving. The transmit/receive module replaces the conventional fixed impedance matching system with a microprocessor, a plurality of switches and sets of pairs of electrical capacitors, resistors, and inductors. Since the antenna impedance characteristics change with changes of beam angles, the microprocessor directs the switches to configure the electrical components into any one of a number of impedance matching circuits. The microprocessor selects an optimum impedance matching circuit for the power amplifier to maintain maximum power transfer for radar transmission and another optimum impedance matching circuit for the low noise amplifier for minimum noise upon radar signal reception.

Precision measurement technique of integrated MOS capacitor mismatching using a simple on-chip circuit

Abstract: A precision measurement technique of the capacitor mismatchings of integrated circuits has been required, that is insensitive to parasitic capacitors on the chip, stray capacitors in measurement circuits, and external noises. A new ac measurement technique is developed here that uses an on-chip source-follower circuit and a simple algorithm. The source-follower circuit lowers the output impedance and thereby excludes the effects of external noises and stray capacitors in measurement circuits. In the present technique, capacitively divided ac voltage after the bandpass filter is measured in two steps by exchanging the terminals of the serial capacitors using external switches. Capacitor mismatching, defined by the relative capacitance tolerance \Delta C/C , is derived as the ratio of the difference between the two measured voltages to their average. This derivation significantly reduces errors arising from parasitic capacitors on the chip, the nonlinearity of the source-follower circuit, and the pulse wave that can give the gate bias voltage of the source-follower transistor. The measurement error is estimated to be, in the worst case, 0.1 percent of \Delta C/C .

Digital-to-analog converter with gain compensation

Abstract: A digital-to-analog converter circuit (10) comprises a current switch (22) that has differential input conductors (16a, 16b, . . . , 16n and 18a, 18b, . . . , 18n) which receive complementary logic voltage signals corresponding to a digital input word (X 1 , X 2 , . . . , X n ). The current switch synthesizes an output signal (V o -V o ) whose magnitude corresponds to the weighted value of the digital input word. The circuit further comprises a current reference source (60) that develops a reference current (I REF ) from which transistor constant-current sources (48a, 48b, . . . , 48n) in the current switch derive binary-weighted currents to synthesize the output voltage signal. The current reference source includes an impedance element or resistor (70) through which the reference current flows and which is scaled to the load impedance connected to the current switch. The impedance element compensates for digital-to-analog converter gain dependence associated with the effect of the Early voltage and β on the output impedance of the transistors forming the current switch. The presence of the impedance element promotes, therefore, stable, uniform changes in the magnitude of the output voltage signal in response to incremental changes in the weighted value of the digital input word.

High speed bootstrapped CMOS driver

Abstract: A bootstrapped CMOS driver circuit capable of driving large capacitance loads with small internal delays. Higher driving capability is achieved by using only n-channel transistors at the output and overdriving the transistors during the transitions. A total internal delay of less than one nanosecond for a driver may be provided with 100 ohms compatible output impedance.

Apparatus for controlling the parallel operation of an A-C output converter for a commercial power source including a circuit for simulating output current for test purposes

Abstract: An apparatus for controlling the parallel operation of a commercial power source and an A-C output converter in which the A-C output converter of a variable voltage and a variable frequency is connected and operated in parallel with the commercial power source; an impedance element is provided between said commercial power source and an output terminal of at least one phase which represents an internally generated voltage of the A-C output converter, the impedance element being connected in parallel with an output impedance of a main circuit of the A-C output converter, and the voltage and frequency of the A-C output converter being controlled so that a current that flows through said impedance element assumes a predetermined value.

Semiconductor integrated circuit.

Abstract: PURPOSE:To output binary or ternary digital signals at a fixed mismatching attenuation at all times by making resistance component due to cross-under included in internal impedance in all sending conditions. CONSTITUTION:Layout of each connecting line is so made that a cross-under part 5 is laid outside of junction n1 of an MOSFETs Q1 and Q3, that is, in the side near an output terminal 1a. Consequently, one connecting line l3 becomes to have resistance component rc due to the cross-under part 5. Thereby, the resistance component due to cross-under is made to be included in internal impedance in all sending conditions, and the binary or ternary digital signals can be outputted always at a fixed mismatching attenuation irrespective of sending condition of the signal.

Differential amplification circuit

Abstract: A first differential amplifier amplifies the differential signal component of the input signal supplied to input terminals. The differential component is then supplied to output terminals. The first differential amplifier comprises a first differential pair of transistors for producing a differential output current proportional to the input signal, and two load impedance elements connected to the outputs of the transistors of the first differential pair, for converting the output current to a voltage output. A current source is coupled to both load impedance elements. The in-phase component provided at the output terminals is detected by a detector circuit. A second differential amplifier detects the difference between the in-phase component and a reference value. This difference changes the output current of the current source, thereby controlling the in-phase component.

Local area network with multiple node bus topology

Abstract: In a local area network, a plurality of nodes are connected to a single port of a hub through a length of cable and a corresponding plurality of transceivers attached to the cable, each of the transceivers having an output impedance significantly greater than the cable characteristic impedance, thereby allowing a plurality of nodes to be connected to one hub port with a single cable.

Method for the automatic impedance matching of a transmitter with an antenna

Abstract: 1. A method for automatically matching the unknown impedance of an antenna to the known nominal impedance of a transmitter using a matching network having variable impedance and which is connected on the input side via a measuring head to the transmitter output and on the output side to the antenna, which network also has at least one input-side capacitive shunt arm with a variable capacitance, consisting for example of a plurality of capacitor elements which can be switched in parallel to one another and has an inductive series arm with a variable inductance consisting, for example, of a plurality of coil elements which can be switched in series to one another, which network in addition for setting its variable impedance by changing the capacitance of the capacitive shunt arm and/or the inductance in the inductive series arm cooperates with a micro-processor which controls, in dependence on the information transferred to it on the input side by the measuring head, in particular relating to the voltage standing wave ratio (VSWR) and the phase relation, the impedance setting of the matching network in the desired direction, characterized in that, to perform a standard tuning process (STA), the transformed antenna impedance presented to the transmitter output via the matching network (AN) assumes an inductive value in a first step by changing the inductance in the inductive series arm and, relative to the Smith diagram, reaches the "G= 1" circle, in that, in a second step, by changing the capacitance in the capacitive shunt arm the transformed antenna impedance is moved along the "G= 1" circle (G= 1) until the measuring head (MK) indicates the transition from the inductive zone to the capacitive zone and thus the tuning process is concluded in that, however, if the transformed antenna impedance indicates an excessively high voltage standing wave ratio, approximately VSWR > 3 when the "G= 1" circle is reached, an intermediate step is performed in the course of the second step when a predetermined voltage standing wave ratio, approximately VSWR= 3, is reached, in which second step the transformed impedance of the antenna is corrected, by further changing the inductance in the inductive series arm, in the direction of its displacement to the "G = 1" circle and in that for the completion of these process steps, the measuring head is designed in terms of circuitry to issue control information to the micro-processor (MP) in such a way that these items of control information have, in addition to information relating to the transmitting level (P), Phase (Ph) and voltage threshold ratios (VSWR) 3), also a criterion for the "G = 1" circle (G = 1).

Effective Utilization of Surge Protection Devices

Abstract: A systematic method is described for selecting the energy rating for surge protection devices when coordinated with a known impedance and subjected to typical low-voltage ac transients. A review of line transient generation characteristics, source impedance determination, and load surge protection device characteristics is given. From this study, an analytical model of the source, line, and load protection device is presented with closed-form mathematical expressions for suppressor current and energy. Results are obtained and compared for a unidirectional voltage impulse, a decaying oscillatory voltage wave, and a unidirectional current wave. From the analysis, the effect that line impedance has on each of these waveforms is shown graphically. In addition, the validity of the analytical model is confirmed experimentally.

Two-frequency shared antenna

Abstract: PURPOSE:To attain light weight and small size of a radio transmission/reception equipment by adding respectively a tuning circuit to each end of a loop antenna and constituting each of a tunning circuit so as to form the synthesized resonance frequency for the loop antenna and the tuning circuit into two different frequencies thereby sharing one loop antenna for different frequencies. CONSTITUTION:Series-parallel resonance circuits, 3, 3' comprising a coil L1, capacitors C1, C2 and a coil L2, capacitors C3, C4 respectively are connected to both ends 2, 2' of the loop antenna element 1. Further, the resonance frequency of the two resonance circuits 3, 3' and the loop antenna element 1 in total three components is two desired frequencies f1, f2 and the circuit element is decided so that the impedance of input/output terminals 4, 4' tapped down by capacity division of the resonance circuits 3, 3' becomes the input/output impedance of the transmission reception circuit to be connected to them, e.g., 50OMEGA. Thus, in connecting a receiver of the reception frequency f1 to the input/ output terminal 4 of the resonance circuit 3 and the transmitter using the transmission frequency f2 of the resonance circuit 3' respectively, one antenna is used as the shared antenna of the transmission and reception equipment having different frequencies from each other.

Radiation hard memory cell circuit with high inverter impedance ratio

Abstract: A memory cell circuit has a pair of cross-coupled inverters. One inverter has an output impedance at least 10 times, preferably, at least 50 times, that of the other inverter so that during a radiation pulse the chance of a change in logic state is reduced. In a particular embodiment, the one inverter has an output impedance of 135 times that of the other inverter.

Apparatus and method for driving loudspeaker systems

Abstract: A method and apparatus for powering, protecting and controlling the behaviour of a loudspeaker, with particular application to high fidelity sound reproduction systems. A method of achieving correct damping of the loudspeaker drive unit independent of its voice coil temperature and improving its linearity is disclosed whereby a high output impedance amplifier is used to power the loudspeaker, with damping maintained by motional feedback techniques. The high output impedance amplifier is also described.

Electronic power conditioner

Abstract: Improvement of power quality is frequently necessary to insure proper operation of sensitive electronic equipment. Power quality improvement involves the use of combinations of ac regulators, transient limiters and/or power filters. Traditional ac regulators have multiple-cycle response and cannot actively attenuate voltage transients and harmonics, and may generate low-order harmonics. The Electronic Power Conditioner (EPC) developed by Powertronic Systems, Inc. (PSI) has much shorter response time and regulates the instantaneous value of output voltage. The EPC generates no low-order harmonics, has low output impedance and actively attenuates voltage transients and harmonics. It provides superior performance and is competitive with traditional regulators in cost, size and weight.

Application of the boundary matching method to elliptic conductors

Abstract: A boundary matching method for the calculation of current density distribution in a long conductor with arbitrary cross section is presented in another paper. An example is given here treating an elliptical cross section. Explicit expressions for the current density distribution and conductor internal impedance are obtained. The current density and impedance are evaluated for elliptic conductors with different ellipticity. Experimental and published data confirm the analysis.

Low noise, high frequency oscillator

Abstract: A low noise, high efficiency oscillator having particular application in transmitters and receivers used in communication by wire and/or radio comprises a low output impedance amplifier 10, such as a push-pull switching amplifier, whose noise performance is inversely proportional to the dc input power multiplied by the efficiency of the amplifier, and a series resonant circuit (22) coupled in a positive feedback path of the amplifier (10) The output impedance of the amplifier (10) is reduced to provide high power efficiency and to reduce the frequency pulling effect of the load, the ratio QL/Qo of the total oscillator circuit being optimised for low noise, where QL is the loaded Q of the resonant circuit incorporating the input impedance of the amplifier (10) and Qo is the unloaded Q of the resonant circuit For minimum noise the ratio QL/Qo would be equal to 2/3

Complementary gate circuit

Abstract: PURPOSE:To suppress generation of noise to a power line and increase in power consumption/heat at high speed operation by constituting the circuit of low output impedance utilizing exquisitely the good correspondence to a large current, high input impedance characteristic and power range possible for wide range of operation. CONSTITUTION:The complementary gate circuit consists of the 1st CMOS inverter comprising a PMOS transistor (TR) P1 and an NMOS TRN1, the 2nd CMOS inverter comprising a PMOS TRP2 and an NMOS TRN2 and a load drive inverter circuit comprising a junction TRT1 of longitudinal structure of pull-up P channel and a junction TRT2 of pull-down N-channel longitudinal structure. Since a VOUT is given as a potential dividing a power with the NMOS and the PMOS, the NMOS increases the degree of conduction attended with the increase in a VIN and the PMOS transits to the nonconductive state, then the VOUT is transited from the H level to the L level at the VIN near the neutral point of the power supply.