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Showing papers on "Output impedance published in 1993"


Journal ArticleDOI
20 Jun 1993
TL;DR: In this paper, a forbidden region for the polar plot of the ratio of impedances at the interface between two cascaded power subsystems is determined, and a method of transforming the forbidden region into a load impedance specification for a given source impedance is developed.
Abstract: By applying the loop gain analysis technique, a forbidden region for the polar plot of the ratio of impedances at the interface between two cascaded power subsystems is determined. A method of transforming the forbidden region into a load impedance specification for a given source impedance is developed. The method assures system stability and minimal performance degradation of the distributed power system, while allowing impedance overlap at the interface. >

504 citations


PatentDOI
TL;DR: In this article, a two-dimensional ultrasonic transducer array includes a plurality of transducers, each of which has a different arrangement of piezoelectric layers in each element according to the transverse area of the element.
Abstract: A two-dimensional ultrasonic transducer array includes a plurality of transducer elements, with each element having a plurality of piezoelectric layers. The transducer elements vary in transverse areas of radiating regions. The effect of the variations in transverse areas on the electrical impedances of the elements is at least partially offset by varying the specific impedance, i.e., impedance per unit area, of the transducer elements in the array. In a preferred embodiment, the specific impedance is varied by selecting the electrical arrangements of piezoelectric layers in each element according to the transverse area of the element. Series, parallel and series-parallel arrangements are employed. This impedance normalization improves the electrical connection of the transducer elements to driving circuitry. In alternative embodiments, impedance normalization is achieved by varying element thicknesses, element materials and/or degrees of poling across the two-dimensional array.

183 citations


Patent
21 Apr 1993
TL;DR: In this paper, a guide wire (15) for supporting monopolar arcing for cutting tissue and for ablating occlusions is described, and a flexible metal wire (302) including a distal end, an electrically insulating coating (306) extending along the wire, and an electric and thermally insulating tip (310) attached to the wire.
Abstract: A guide wire (15) for supporting monopolar arcing for cutting tissue and for ablating occlusions includes a flexible metal wire (302) including a distal end, an electrically insulating coating (306) extending along the wire, and an electrically and thermally insulating tip (310) having a distal end and attached to the wire, the wire extending through the electrically and thermally insulating tip and forming an electrode (312) at the distal ends of the wire and the tip. An electrosurgical apparatus for cutting tissue and for ablating occlusions includes a pulse generator (5, 6) having a variable output impedance for selectively generating a train of pulses of electrical energy for application to a guide wire (15) having an attached electrode. The pulse generator senses the load impedance and adjusts the output impedance to match the load impedance. The generator measures the relative electrical energy produced by an arc in response to a pulse, compares the relative electrical energy to a predetermined value to determine an energy difference, and adjusts the energy of a subsequent pulse to reduce the energy difference toward zero.

169 citations


Journal ArticleDOI
19 May 1993
TL;DR: In this paper, a switched-source-impedance (SSI) CMOS circuit is proposed as a means of reducing the exponential increase of sub-threshold current with threshold-voltage scaling.
Abstract: A switched-source-impedance (SSI) CMOS circuit is proposed as a means of reducing the exponential increase of subthreshold current with threshold-voltage scaling. Inserting a switched impedance at the source of a MOS transistor reduces the standby subthreshold current of giga-scale LSI's operating at room temperature by three to four orders of magnitude and suppresses the current variation caused by threshold-voltage and temperature fluctuations. The scheme is applicable to any combinational and sequential CMOS logic circuits as long as their standby node voltages are predictable. The standby current of a 16-Gb DRAM is expected to be reduced from 1.1 A to 0.29 mA using this scheme. Hence, battery backup of giga-scale LSI's will be possible even at room temperature and above. >

166 citations


Patent
15 Nov 1993
TL;DR: In this article, an electronic device for preventing time-varying current from passing through an electrochemical cell or battery is disclosed, which can be used to reduce or eliminate ripple and crosstalk in batteries that are supplying voltage sensitive equipment.
Abstract: An electronic device for effectively preventing time-varying current from passing through an electro-chemical cell or battery is disclosed. Time-varying current flowing in a circuit which includes the cell/battery is sensed externally to the cell/battery with a magnetically-coupled ac current probe thereby producing an induced time-varying signal. This induced signal is amplified to the level of the original time-varying current and applied to the cell/battery's terminals in phase-opposition to the original current. As a result, the component of time-varying current flowing in the cell/battery's external leads assumes an alternate path around the cell/battery and is effectively canceled within the cell/battery itself. Time-varying voltage across the cell/battery, which would normally result from time-varying current passing through its internal impedance, is likewise eliminated. Accordingly, measurements of the cell/battery's incremental parameters can be performed with the cell/battery "on line" without measurement errors due to spurious charger- and load-related signals. Additional applications of the disclosed device include reducing or eliminating ripple and crosstalk in batteries that are supplying voltage-sensitive equipment, and preventing plate deterioration caused by ac currents flowing through a cell/battery.

154 citations


Patent
17 Sep 1993
TL;DR: In this paper, a method of monitoring the internal impedance of an accumulator battery in an uninterruptible power supply, and a UPS is presented. But the method is not suitable for the case of large accumulators.
Abstract: A method of monitoring the internal impedance of an accumulator battery in an uninterruptible power supply, and a UPS. In accordance with the invention, during the discharge of the battery to the load, the load current induced by the load and passing through the battery is measured or calculated, and the corresponding AC voltage component obtained on the battery voltage is measured, the value for the internal impedance of the battery being calculated from these values. The obtained impedance value is compared to a predetermined reference value to determine the condition of the battery.

151 citations


Patent
22 Feb 1993
TL;DR: In this article, the power output of an ultrasonic generator to a transducer is controlled by a variable impedance network circuit which is interposed between the generator and the transducers.
Abstract: Apparatus and a method for controlling the power output of an ultrasonic generator to a transducer includes a variable impedance network circuit which is interposed between the generator and the transducer. Sensing circuits and a microprocessor are coupled to the input of the transducer so that the total impedance ZT, the transducer impedance in free air ZFA and the load impedance ZL may be calculated and the network impedance ZNW may be set for a bonding operation to maintain the power level PL or the impedance ZL at a desired predetermined level.

147 citations


Patent
24 Dec 1993
TL;DR: In this article, a method for determining the state of charge of an electrochemical cell by comparing the impedance of the cell at two or more frequencies or by comparing a cell's impedance at a medium frequency with the impedance at high frequency is presented.
Abstract: A method for determining whether an electrochemical cell is substantially fully charged. The determination is made by ascertaining the rate of change of the impedance of the cell with changing frequency, at low frequency. A method for determining the state of charge of an electrochemical cell by comparing the impedance of the cell at two or more frequencies or by comparing the impedance of the cell, at a medium frequency, with the impedance at high frequency. Apparatus for generating output signals representative of the magnitude of resistive and reactive components of an impedance (30). The apparatus has a signal generator (70) for passing AC current through the impedance, and a synchronous demodulator circuit (88) for demodulating AC signal appearing across the impedance pursuant to passing the current through it. A phase shift circuit (130, 132, 136, 138, 140) selectively generates control signals in phase or 90° phase shifted relative to the AC current through the impedance to control the demodulator circuit to respectively produce the output signals representing resistive and reactive components.

123 citations


Patent
26 Apr 1993
TL;DR: In this article, a method and apparatus for measuring the depletion level (depth of discharge) of a lithium-iodine battery in an implantable medical device is presented, while the pacemaker is first temporarily decoupled from the medical device circuitry.
Abstract: A method and apparatus for measuring the depletion level (depth of discharge) of a lithium-iodine battery in an implantable medical device. A first set of measurements are made to determine the internal impedance of the battery, and a second set of measurements are made to determine the geometric capacitance of the battery, which has been found to correlate closely to the depth of discharge of the battery. The measurements are all made while the pacemaker is first temporarily decoupled from the medical device circuitry. The first measurements are made during a time window following a known change in resistive load across the terminals of the battery, and are capable of being correlated with 1-kHz qualification testing data made on the battery at the time of manufacture. The second measurements are made when the known load is periodically coupled and decoupled to the terminals of the battery at a rate of 80-kHz. The resulting data can be used to monitor depth of discharge throughout the operable life of the battery.

118 citations


Journal ArticleDOI
TL;DR: It is concluded that FEM models of electrodes can be used to improve the performance of an electrical impedance tomography reconstruction algorithm.
Abstract: In electrical impedance tomography (EIT), the measured voltages are sensitive to electrode-skin contact impedance because the contact impedance and the current density through it are both high. Large electrodes were used to provide a more uniform current distribution and reduce the contact impedance. A large electrode differs from a point electrode in that it has shunting and edge effects that cannot be modeled by a single resistor. The finite-element method (FEM) was used to study the electric field distributions underneath an electrode, and three models were developed: a FEM model, a simplified FEM model, and a weighted load model. The FEM models considered both shunting and edge effects and closely matched the experimental measurements. It is concluded that FEM models of electrodes can be used to improve the performance of an electrical impedance tomography reconstruction algorithm. >

103 citations


Patent
12 Nov 1993
TL;DR: In this article, a low-loss design for an adjustable inductance element suitable for use in parallel-resonant L-C tank circuits is described. And the application of an impedance matching circuit to a plasma process is also disclosed; in this context, a local impedance transformation circuit is used to improve power transfer to the plasma source antenna.
Abstract: The disclosure discusses impedance matching circuits based on parallel-resonant L-C tank circuits, and describes a low-loss design for an adjustable inductance element suitable for use in these parallel tank circuits. The application of an impedance matching circuit to a plasma process is also disclosed; in this context, a local impedance transformation circuit is used to improve power transfer to the plasma source antenna.

Journal ArticleDOI
TL;DR: An improved approach to obtaining good zero-voltage-crossing signals is presented and these signals are subsequently used as synchronization signals for a phase-controlled thyristor power converter.
Abstract: An improved approach to obtaining good zero-voltage-crossing signals is presented. These signals are subsequently used as synchronization signals for a phase-controlled thyristor power converter. Detection of accurate zero crossings is possible even when there are large frequency changes, sudden load changes, or large commutation overlap angles. The improved accuracy in the integrity of the zero crossing is obtained by reconstructing a voltage representing the AC source voltage. This voltage is determined from the distorted thyristor converter input voltage, the converter input current, and an online identification of the source impedance using a microcontroller-based adaptive algorithm. The improvement provided by the new zero crossing detection scheme is verified experimentally. >

Patent
21 Jan 1993
TL;DR: In this article, an impedance matching network and a network model are used to estimate the load impedance from known present network values and a measurement of network input impedance, and to estimate optimum network values from the input impedance and the estimated load impedance.
Abstract: A method, and corresponding apparatus, for matching a generator impedance with an unknown and possibly changing load impedance, to maximize power transferred to the load. The apparatus includes an impedance matching network, and a network model, to estimate the load impedance from known present network values and a measurement of network input impedance, and to estimate optimum network values from the input impedance and the estimated load impedance. A controller computes new network values based on the present and optimum values, and outputs the new values to the network. The process is repeated using the new network values to estimate the load impedance and generate a new set of optimum values. The controller uses a control equation with parameters selected to ensure rapid convergence on the maximum-power condition, without overshoot or instability. Preferably, current and voltage measurements are made in the network to enable correction of the network values based on these measurements on the actual network. Although the invention may be used with any type of variable-impedance network hardware, preferably current-controlled inductances are used as the variable network impedances.

PatentDOI
TL;DR: In this paper, the authors propose a frequency selective component that includes a substrate having at least a first surface and an acoustic impedance transformer coupled to the substrate, which transforms the acoustic impedance of the substrate to a second acoustic impedance.
Abstract: A frequency selective component and a method for making a frequency selective component. The frequency selective component includes a substrate having at least a first surface and an acoustic impedance transformer coupled to the substrate. The acoustic impedance transformer transforms an acoustic impedance of the substrate to a second acoustic impedance. The acoustic resonator further includes a mechanical resonator disposed on the acoustic impedance transformer. The acoustic resonator provides a frequency selection function.

Patent
08 Feb 1993
TL;DR: In this article, the output impedance of a plurality of slaved drivers is adjusted by a circuit for measuring and correcting mismatch between their output impedance and the impedance at the input of a reference transmission line, equal in geometry to the lines connected to the other drivers.
Abstract: An automatic system for adjusting the output impedance of fast CMOS drivers, wherein the output impedance of a plurality of slaved drivers is adjusted by a circuit for measuring and correcting mismatch between the output impedance of one of the drivers, taken as reference and dedicated for this purpose, and the impedance at the input of a reference transmission line, equal in geometry to the lines connected to the other drivers. The voltage measured at the far end of the reference line is sent to a differential amplifier where it is compared with the supply voltage of the final driving stage. According to the comparison result at specific time intervals, a signal is supplied to the regulator which supplies power to the penultimate driving stage, thereby controlling the resistance of the driver to match the line impedance.

Proceedings ArticleDOI
01 Jan 1993
TL;DR: In this article, the authors describe circuits and techniques that provide automatic on-chip impedance matching between a seriesterminated, lowvoltage swing, CMOS I/O pad, and an external interconnect.
Abstract: The authors describe circuits and techniques that provide automatic on-chip impedance matching between a series-terminated, low-voltage swing, CMOS I/O pad, and an external interconnect. The automatic impedance control technique employs a digitally controlled output impedance driver, a high-gain, low-voltage differential receiver, and an IEEE-1149.1-1990 compatible test access port. The techniques presented here design circuits that compensate for external environmental variations. A component to test these circuits uses a 0.8- mu m effective gate-length process. The test components exhibit 2-ns I/O latencies with 1-ns rise/fall times and match impedances between 30 and 100 Omega . >

Patent
David L. Thompson1
05 Feb 1993
TL;DR: In this article, a method and apparatus for estimating the remaining capacity of a lithium-iodine battery through the nomographic analysis of two or more measurements of battery impedance is presented, based on the rated capacity of the battery and the expected internal impedance at various stages of depletion.
Abstract: A method and apparatus for estimating the remaining capacity of a lithium-iodine battery through the nomographic analysis of two or more measurements of battery impedance. In a preferred embodiment, a pacemaker or other implantable medical device is provided with circuitry for periodically measuring the internal impedance of its battery. Each measurement of impedance is stored along with an indication of when such measurement was made. Nomographic analysis, based upon the rated capacity of the battery and the expected internal impedance at various stages of depletion, allows for two or more time-stamped impedance measurements to serve as the basis for an extrapolation to estimate the remaining service life of the implantable medical device. Nomographic analysis may be performed by circuitry contained in the implanted device itself; in the alternative, periodic impedance measurements may be communicated to external processing circuitry via a telemetry channel.

Patent
12 Aug 1993
TL;DR: A semiconductor circuit module is formed with external connections on coaxial pins This provides a controlled impedance between a ground connection and a signal connection which is substantially equal per unit length The module may be configured so that the impedance of the connection between the signal connections and integrated circuit may also be optimally impedance matched as mentioned in this paper.
Abstract: A semiconductor circuit module is formed with external connections on coaxial pins This provides a controlled impedance between a ground connection and a signal connection which is substantially equal per unit length The module may be configured so that the impedance of the connection between the signal connections and integrated circuit may also be optimally impedance matched

Patent
Kenji Nakao1
19 Mar 1993
TL;DR: In this article, an output circuit which hardly causes ringing in its output waveform as well as undesired radiation also by optimizing current drivability and output impedance of the output circuit by the voltage drop means (6) in response to a load connected thereto and driving an output buffer of a logic circuit at a high speed.
Abstract: An output circuit which hardly causes ringing etc. in its output waveform even if a high capacity load is driven at a high speed comprises an input terminal (11), an output terminal (12), an output driving circuit (5) controlled by a signal received in the input terminal (11), and voltage drop means (6) connected between an output terminal (10) of the output driving circuit (5) and the output terminal (12). The output driving circuit (5) is formed by connecting a circuit having high current drivability and that having small current drivability in parallel with each other, to have large current drivability when change of an output voltage is started while having small current drivability at a terminating point of the change. While ringing is suppressed by the output driving circuit (5), it is possible to obtain an output circuit which hardly causes ringing in its output waveform as well as undesired radiation also by optimizing current drivability and output impedance of the output circuit by the voltage drop means (6) in response to a load connected thereto and driving an output buffer of a logic circuit at a high speed.

Patent
10 Sep 1993
TL;DR: In this article, a self-biased cascode current mirror (SRCM) was proposed to provide a high output impedance and high voltage swing while providing low power consumption and requiring a small layout area.
Abstract: A self-biased cascode current mirror includes a current mirror (60), and a cascode bias generator (50). The cascode bias generator (50) includes a resistor (51) to provide a bias voltage for the current mirror (60). The current mirror (60) includes cascode transistor (64) and two mirror transistors (62, 63). The bias voltage is approximately equal to a minimum saturation voltage of the cascode transistor (64) plus a gate-source voltage of the transistor (63) of the current mirror (60). The self-biased cascode current mirror (60) has a high output impedance and high voltage swing while providing low power consumption and requiring a small layout area.

Journal ArticleDOI
01 Nov 1993
TL;DR: In this paper, the authors present a detailed analysis of appropriate electrical impedance models for steel railway rails suitable for power supply circuit transient calculations, which can be used to predict remote short-circuit-fault substation current profiles.
Abstract: The authors present a detailed analysis of appropriate electrical impedance models for steel railway rails suitable for power supply circuit transient calculations. They extend existing models to fully describe the skin effect, so that power circuit transient behaviour can be taken into account with little error in prediction of response. Practical measurements of rail impedance are compared with calculated values of circuit impedance and demonstrate an accuracy of within 9% for resistance and 18% for inductance. An associated paper (see ibid., vol.139, no.4, p.289-94, 1992) shows how this model can be used to predict remote short-circuit-fault substation current profiles.< >

Journal ArticleDOI
K.G. Stawiasz1, Mark B. Ketchen1
TL;DR: In this paper, the white noise of series arrays of 50 gradiometer superconducting quantum interference devices (SQUIDS) and 100 magnetometer SQUIDs have been fabricated using Nb/AlO/sub x/Nb junctions with a planarized all-refractory technology for superconductivity (PARTS).
Abstract: Series arrays of 50 gradiometer superconducting quantum interference devices (SQUIDS) and 100 magnetometer SQUIDs have been fabricated using Nb/AlO/sub x//Nb junctions with a planarized all-refractory technology for superconductivity (PARTS), the white noise of these arrays has been measured. The individual devices are 50-pH, 2-hole and 100-pH, 1-hole SQUIDs with integrated single turn input coils, 1- mu m/sup 2/ and 0.5- mu m/sup 2/ junctions, and PtRh shunt resistors. The input coil inductance of 10 nH will effectively match with a wide bandwidth to miniature pick-up loop structures for various experiments. Ideally, the coupled energy sensitivity should remain constant as devices are added in series, while the output impedance rises to a level practical for direct coupling to room-temperature electronics. The output impedance of the arrays is 250-1000 Omega . The white noise was measured directly with an ultra low noise preamplifier at room temperature. The best result was Phi /sub N/=0.12 mu Phi /sub 0// square root Hz with a corresponding coupled energy sensitivity of 56 h. >

Patent
16 Mar 1993
TL;DR: In this article, an improved current source having high output impedance, low saturation voltage, and less sensitivity to process parameters is achieved by having enhancement P-channel transistor devices used as current mirror, while depletion P-Channel transistor devices are provided as the cascode devices.
Abstract: An improved current source having high output impedance, low saturation voltage, and less sensitivity to process parameters is achieved by having enhancement P-channel transistor devices used as current mirror, while depletion P-channel transistor devices are provided as the cascode devices. A "diode connected" depletion device may be inserted between the enhancement gate and the drain of the current reference transistor to reduce saturation voltage. The "diode connected" depletion device keeps the drains of the enhancement devices at a similar voltage even when the enhancement and depletion device threshold, i.e. V T , do not track over temperature or process. Thus, the current mirror circuit provides not only higher output impedance, lower saturation voltage, but is also less sensitive to process variation.

Patent
11 Mar 1993
TL;DR: In this paper, an active load applied to the gate transmission line termination of distributed power devices reduces the low frequency noise power appearing at the output of the device, including at least one active device such as a field effect transistor.
Abstract: An active load applied to the gate transmission line termination of distributed power devices reduces the low frequency noise power appearing at the output of the device. The active load, including at least one active device such as a field effect transistor, operates by transforming the input impedance of a low noise amplifier to the desired load impedance. The active load is connected to one end of an input transmission line having a plurality of impedances connected in electrical series. An input terminal is connected to the opposite end. An output transmission line, also having a plurality of impedances connected in series, has an output terminal at one end and a terminating output impedance at the other. A plurality of active devices are connected to junction points between the series connected impedances of the input and output lines.

Journal ArticleDOI
TL;DR: In this paper, the superconducting flux flow transistor and magnetically controlled long junctions have been made from thin films of TlCaBaCuO and YBaCoCuO.
Abstract: Flux-flow-based devices such as the superconducting flux flow transistor and magnetically controlled long junctions have been made from thin films of TlCaBaCuO and YBaCuO. The devices are based on the magnetic control of flux flow in their respective structures: a long junction or an array of weak links. The equivalent circuits of the two devices are similar: a low-impedance input control line, an output impedance of 3-20 Omega , and an active current-controlled element. The long junctions have tended to be slower, to have lower gain, and to be somewhat less noisy than their counterparts. Circuits such as narrowband and distributed amplifiers (50-GHz bandwidths, noise figures >

Patent
03 Mar 1993
TL;DR: In this paper, the low frequency response of the current loop gain is used to maintain an advantageously low output impedance for the power supply and reduce the system to a lower order while maintaining adequate loop stability.
Abstract: A switched mode power converter includes a periodically switched power switch which is switched under the control of a multiple loop feedback controlling the power switch in order to supply a regulated output. The output voltage and power switch current are sensed. An error voltage is generated which is representative of the deviation of the output voltage from a regulated value. A voltage derived from the power switch current is limited in its low frequency response and is then combined with the error voltage. The low frequency response of the current loop gain is used to maintain an advantageously low output impedance for the power supply. This shaped loop gain response advantageously allows accurate adjustment of the current loop gain and reduces the system to a lower order while maintaining adequate loop stability. The low frequency response may be attained by limiting the low frequency response of the sensed current or by inserting an operational amplifier in the feedback path to limit its low frequency response.

Patent
03 Aug 1993
TL;DR: In this article, a Z-clamp circuit is used to provide termination and clamping in an IC tester with an output impedance that matches the transmission line between the driver circuit and the DUT.
Abstract: Driver circuits are provided which also serve as termination and clamp in an IC tester. When it is to drive a port of a device under test (DUT) between two predetermined voltage levels, the driver's I/O terminal is switched between two predetermined voltage levels with an output impedance that matches the transmission line between the driver circuit and the DUT. When the DUT's port is supplying an output signal, the driver circuit can be programmed to provide one of two types of termination. If the DUT's port is specified as capable of driving the load, the transmission line between the driver circuit and the DUT is terminated by switching the driver circuit's I/O terminal to a predetermined voltage level with an impedance of Z 0 . If the DUT's port is not specified as being capable of driving such a termination load, the driver circuit functions like a Z-clamp circuit.

Patent
16 Feb 1993
TL;DR: In this paper, a constant current loop measuring system is provided for measuring a characteristic of an environment, consisting of a first impedance positionable in the environment, a second impedance coupled in series with said first impedance and a parasitic impedance electrically coupled to the first and second impedances.
Abstract: A constant current loop measuring system is provided for measuring a characteristic of an environment. The system comprises a first impedance positionable in the environment, a second impedance coupled in series with said first impedance and a parasitic impedance electrically coupled to the first and second impedances. A current generating device, electrically coupled in series with the first and second impedances, provides a constant current through the first and second impedances to produce first and second voltages across the first and second impedances, respectively, and a parasitic voltage across the parasitic impedance. A high impedance voltage measuring device measures a voltage difference between the first and second voltages independent of the parasitic voltage to produce a characteristic voltage representative of the characteristic of the environment.

Patent
07 Oct 1993
TL;DR: In this article, an emitter follower is constructed of a first transistor with a first resistor connected between the emitter electrode of the first transistor and an output terminal, with input signal applied to the base of the second transistor.
Abstract: An impedance converter includes an emitter follower constructed of a first transistor with a first resistor connected between an emitter electrode of the first transistor and an output terminal. Input to the emitter follower is provided by a second transistor of complementary type, with input signal applied to the base of the second transistor and the emitter electrode of the second transistor coupled to the base of the first transistor with a second resistor. Bias current in the second transistor and second resistor is in constant proportion to bias current in the first transistor and first resistor. Output impedance can be made positive, negative or zero by appropriate proportioning of the first and second resistors.

Patent
05 May 1993
TL;DR: In this article, a high frequency plasma power supply comprising a final stage push-pull amplifier with each phase having a parallel combination of at least two FETs, an output transformer 5 having the connection of the phase outputs of the pushpull amplifier 2 to the opposite terminals of a primary winding with a neutral tap, and a low pass filler 6 allowing passage of substantially the fundamental frequency component from the secondary winding output of the output transformer is presented.
Abstract: In a high frequency plasma power supply comprising a final stage push-pull amplifier 2 with each phase having a parallel combination of at least two FETs, an output transformer 5 having the connection of the phase outputs of the push-pull amplifier 2 to the opposite terminals of a primary winding with a neutral tap, and a low pass filler 6 allowing passage of substantially the fundamental frequency component from the secondary winding output of the output transformer 5, the high frequency power passing through the low pass filter being supplied between the electrodes of a plasma chamber 10 through an impedance matching circuit 9 having an impedance adjusting mechanism, the dc voltage Vds to be applied between the drain and source of each FET of each phase of the push-pull amplifier is adjusted to not more than about 30% of the dc absolute rated value and the turn ratio of the output transformer is 1:4, thereby supplying the power having the level necessary for plasma reaction.