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Showing papers on "Output impedance published in 2007"


Journal ArticleDOI
TL;DR: The paper explorers the resistive output impedance of the parallel-connected inverters in an island microgrid and proposes a novel wireless load-sharing controller for islanding parallel invertes in an ac distributed system.
Abstract: In this paper, a novel wireless load-sharing controller for islanding parallel inverters in an ac-distributed system is proposed This paper explores the resistive output impedance of the parallel-connected inverters in an island microgrid The control loops are devised and analyzed, taking into account the special nature of a low-voltage microgrid, in which the line impedance is mainly resistive and the distance between the inverters makes the control intercommunication between them difficult In contrast with the conventional droop-control method, the proposed controller uses resistive output impedance, and as a result, a different control law is obtained The controller is implemented by using a digital signal processor board, which only uses local measurements of the unit, thus increasing the modularity, reliability, and flexibility of the distributed system Experimental results are provided from two 6-kVA inverters connected in parallel, showing the features of the proposed wireless control

928 citations


Journal ArticleDOI
TL;DR: In this paper, the authors show that electrode polarization impedance can indeed influence the measurements and that also other phenomena such as negative sensitivity regions, separate current paths and common-mode signals may seriously spoil the measured data.
Abstract: Tetrapolar electrode systems are commonly used for impedance measurements on biomaterials and other ionic conductors. They are generally believed to be immune to the influence from electrode polarization impedance and little can be found in the literature about possible pitfalls or sources of error when using tetrapolar electrode systems. In this paper we show that electrode polarization impedance can indeed influence the measurements and that also other phenomena such as negative sensitivity regions, separate current paths and common-mode signals may seriously spoil the measured data.

176 citations


Patent
07 Jul 2007
TL;DR: In this paper, a power extractor dynamically matches the impedance of the source and the load for the maximum transfer of power for a power source with respect to the load impedance, and is operated such that the impedances of the extractor between the power source and load are dynamically changed in response to detected power changes.
Abstract: In some embodiments, a power extractor may operate such that the source impedance and the load impedance may have various values. The power extractor dynamically matches the impedance of the source and the load for the maximum transfer of power. The power extractor includes detection circuitry to continuously detect power changes, and is operated such that impedances of the power extractor between the source and load are dynamically changed in response to the detected power changes. The power extractor may then match an impedance of a power source to the impedance of a load. Other embodiments are described and claimed.

156 citations


Journal ArticleDOI
17 Sep 2007
TL;DR: A 64-site wireless current microstimulator chip (Interestim-2B) and a prototype implant based on the same chip have been developed for neural prosthetic applications, which has site potential measurement and in situ site impedance measurement capabilities, which help its users indicate defective sites or characteristic shifts in chronic stimulations.
Abstract: A 64-site wireless current microstimulator chip (Interestim-2B) and a prototype implant based on the same chip have been developed for neural prosthetic applications. Modular standalone architecture allows up to 32 chips to be individually addressed and operated in parallel to drive up to 2048 stimulating sites. The only off-chip components are a receiver inductive-capac- itive (LC) tank, a capacitive low-pass filter for ripple rejection, and arrays of microelectrodes for interfacing with the neural tissue. The implant receives inductive power up to 50 mW and data at 2.5 Mb/s from a frequency shift keyed (FSK) 5/10 MHZ carrier to generate up to 65 800 stimulus pulses/s. Each Interestim-2B chip contains 16 current drivers with 270 muA full-scale current, 5-bit (32-steps) digital-to-analog converter (DAC) resolution, 100 MOmega output impedance, and a voltage compliance that extends within 150 and 250 mV of the 5 V supply and ground rails, respectively. It can generate any arbitrary current waveform and supports a variety of monopolar and bipolar stimulation protocols. A common analog line provides access to each site potential, and exhausts residual stimulus charges for charge balancing. The chip has site potential measurement and in situ site impedance measurement capabilities, which help its users indicate defective sites or characteristic shifts in chronic stimulations. Interestim-2B chip is fabricated in the AMI 1.5 mum standard complementary metal-oxide-semiconductor (CMOS) process and measures 4.6 x 4.6 x 0.5 mm. The prototype implant size including test connectors is 19 X 14 x 6 mm, which can be shrunk down to <0.5 CC. This paper also summarizes some of the in vitro and in vivo experiments performed using the Interestim-2B prototype implant.

153 citations


Journal ArticleDOI
TL;DR: A microfluidic device to capture physically single cells within microstructures inside a channel and to measure the impedance of a single HeLa cell using impedance spectroscopy is presented.
Abstract: This work presents a microfluidic device to capture physically single cells within microstructures inside a channel and to measure the impedance of a single HeLa cell (human cervical epithelioid carcinoma) using impedance spectroscopy. The device includes a glass substrate with electrodes and a PDMS channel with micro pillars. The commercial software CFD–ACE+ is used to study the flow of the microstructures in the channel. According to simulation results, the probability of cell capture by three micro pillars is about 10%. An equivalent circuit model of the device is established and fits closely to the experimental results. The circuit can be modeled electrically as cell impedance in parallel with dielectric capacitance and in series with a pair of electrode resistors. The system is operated at low frequency between 1 and 100 kHz. In this study, experiments show that the HeLa cell is successfully captured by the micro pillars and its impedance is measured by impedance spectroscopy. The magnitude of the HeLa cell impedance declines at all operation voltages with frequency because the HeLa cell is capacitive. Additionally, increasing the operation voltage reduces the magnitude of the HeLa cell because a strong electric field may promote the exchange of ions between the cytoplasm and the isotonic solution. Below an operating voltage of 0.9 V, the system impedance response is characteristic of a parallel circuit at under 30 kHz and of a series circuit at between 30 and 100 kHz. The phase of the HeLa cell impedance is characteristic of a series circuit when the operation voltage exceeds 0.8 V because the cell impedance becomes significant.

119 citations


Journal ArticleDOI
TL;DR: A new three inputs and single output voltage-mode universal biquadratic filter with high-input and low-output impedance using three plus-type differential difference current conveyors, two grounded capacitors and two grounded resistors is presented.
Abstract: A new three inputs and single output voltage-mode universal biquadratic filter with high-input and low-output impedance using three plus-type differential difference current conveyors, two grounded capacitors and two grounded resistors is presented. The proposed circuit offers the following features: realization of all the standard filter functions, that is, high-pass, bandpass, low-pass, notch, and all-pass filters, no requirements for component matching conditions, the use of only grounded capacitors and resistors, high-input and low-output impedance and low active and passive sensitivities.

103 citations


Journal ArticleDOI
TL;DR: The development of a multi-frequency electrical impedance tomography (EIT) system with a single balanced current source and multiple voltmeters primarily designed for imaging brain function with a flexible strategy for addressing electrodes and a frequency range from 10 Hz-500 kHz is described.
Abstract: We describe the development of a multi-frequency electrical impedance tomography (EIT) system (KHU Mark1) with a single balanced current source and multiple voltmeters. It was primarily designed for imaging brain function with a flexible strategy for addressing electrodes and a frequency range from 10 Hz–500 kHz. The maximal number of voltmeters is 64, and all of them can simultaneously acquire and demodulate voltage signals. Each voltmeter measures a differential voltage between a pair of electrodes. All voltmeters are configured in a radially symmetric architecture in order to optimize the routing of wires and minimize cross-talk. We adopted several techniques from existing EIT systems including digital waveform generation, a Howland current generator with a generalized impedance converter (GIC), digital phase-sensitive demodulation and tri-axial cables. New features of the KHU Mark1 system include multiple GIC circuits to maximize the output impedance of the current source at multiple frequencies. The voltmeter employs contact impedance measurements, data overflow detection, spike noise rejection, automatic gain control and programmable data averaging. The KHU Mark1 system measures both in-phase and quadrature components of trans-impedances. By using a script file describing an operating mode, the system setup can be easily changed. The performance of the developed multi-frequency EIT system was evaluated in terms of a common-mode rejection ratio, signal-to-noise ratio, linearity error and reciprocity error. Time-difference and frequency-difference images of a saline phantom with a banana object are presented showing a frequency-dependent complex conductivity of the banana. Future design of a more innovative system is suggested including miniaturization and wireless techniques.

98 citations


Proceedings ArticleDOI
17 Jun 2007
TL;DR: In this paper, an estimation method of power system impedance based on power variations caused by a distributed power generation system (DPGS) at the point of common coupling (PCC) is proposed.
Abstract: This paper proposes an estimation method of power system impedance based on power variations caused by a distributed power generation system (DPGS) at the point of common coupling (PCC). The proposed algorithm is computationally simple and uses the voltage variations at the point of common coupling (PCC) caused by the variations of the power delivered to utility network to derive the value of grid impedance. Accurate estimation of both resistive and inductive part of the impedance is obtained, as the results presented show.

76 citations


Journal ArticleDOI
TL;DR: In this article, a simple low-cost control architecture for low-voltage hysteretic regulators supplying loads with low-to-medium current consumption is presented, where the closed-loop output impedance can be designed to be resistive and the switching frequency can be adjusted to be independent of the output impedance requirement so that the load transient response and the efficiency can be optimized separately.
Abstract: This paper presents a simple low-cost control architecture for low-voltage hysteretic regulators supplying loads with low-to-medium current consumption. Only two sensed voltages, a passive filter network and a hysteretic comparator are required to implement the main control functions: the output voltage regulation and the adaptive voltage positioning. This paper also shows that other previously reported low-cost control solutions have an important design tradeoff between load transient response and efficiency. In the proposed controller, the closed-loop output impedance can be designed to be resistive and the switching frequency can be adjusted to be independent of the output impedance requirement so that the load transient response and the efficiency can be optimized separately. Experimental results validate the performance of the proposed controller (i.e., a load transient response with insignificant output voltage overshoot and selectable switching frequency independent of the output impedance requirement).

73 citations


Patent
13 Mar 2007
TL;DR: In this paper, an inductor is coupled to a switching means (SWM) and a capacitance is provided with an impedance (3) located between the inductor and the capacitor, with a feedback loop comprising a converter (6) for controlling the current injector (5) for compensating a ripple in an output voltage across the capacitor.
Abstract: A supply circuit (1) comprising an inductor (2) coupled to switching means (7) and comprising a capacitor (4) is provided with an impedance (3) located between the inductor (2) and the capacitor (4) , with a current injector (5) and with a feedback loop comprising a converter (6) for controlling the current injector (5) for compensating a ripple in an output voltage across the capacitor (4) . The impedance (3) allows injection of acompensating current at a location different from an output location. This increases a number of possible detections of ripples in the output voltage and allows a ripple in an output voltage to be detected even in case of loads introducing much noise across the capacitor (4) . The converter (6) detects a detection signal via the impedance (3) by measuring a voltage across the impedance (3) or across a serial circuit comprising the impedance (3) and the capacitor (4) . The impedance (3) comprises a resistor or a further inductor.

72 citations


Journal ArticleDOI
TL;DR: Simulation and experimental results validate the theoretical predictions for the proposed hysteretic controller, particularly the constant output impedance operation and the robust transient response performance.
Abstract: This paper presents a design methodology for voltage hysteretic regulators powering digital integrated circuits with low voltage, high current, and high slew rate current transients. The design approach optimizes the transient response during large consumption changes by imposing constant closed-loop output impedance. This paper also suggests a novel compensator network for the adaptive voltage positioning feedback loop, which leads to a robust transient response performance against load disturbances. The application of the design methodology to the proposed hysteretic controller provides the suitable control parameter values for optimal transient response. Simulation and experimental results validate the theoretical predictions for the proposed controller, particularly the constant output impedance operation and the robust transient response performance

Journal ArticleDOI
TL;DR: In this article, the electrochemical impedance Z and complex capacitance C for typical equivalent circuits were summarized systematically in order to support the frequency domain analysis of electric double layer capacitance (EDLC).
Abstract: The electrochemical impedance Z and complex capacitance C for typical equivalent circuits were summarized systematically in order to support the frequency domain analysis of electric double layer capacitance (EDLC). In the present paper, the impedance and the complex capacitance were calculated in the case that the electrochemical response of porous electrode was presented by a transmission line model (TLM). The loci of Z and C on the complex were divided into the lumped constant and distributed constant ranges in low and high frequency ranges, respectively. The complex capacitance plot was superior to obtain the capacitance of porous electrode than the impedance plot.

Patent
17 May 2007
TL;DR: In this paper, a broadband output transformer has a first balanced input connected to the drain of one of the transistors, and a second balanced output connected to a drain of the other transistor, and an input to output impedance ratio of 1:4.
Abstract: An RF power amplifier includes first and second field effect transistors having a gate, a source, and a drain, having an output power rating of at least 200 watts, and operating with a drain-to-source voltage that is greater than 50 VDC. The transistors are configured as a push-pull amplifier. The amplifier further includes an RF signal input. A input transformer is connected to the RF signal input. The input transformer has respective balanced outputs connected to the gates of the transistors. A broadband output transformer has a first balanced input connected to the drain of one the transistors, and a second balanced input connected to the drain of the other transistor. The broadband output transformer has an input to output impedance ratio of 1:4.

Proceedings ArticleDOI
Tae-Woo Kwak1, Min-Chul Lee1, Bae-Kun Choi, Hanh-Phuc Le1, Gyu-Hyeong Cho1 
18 Jun 2007
TL;DR: An amplitude modulator for class-E2 EDGE polar transmitters is fabricated in a 0.35mum CMOS process and can drive an RF PA with an equivalent impedance of 4Omega up to maximum output power of 2.25W with a maximum efficiency of 88.3%.
Abstract: An amplitude modulator for class-E2 EDGE polar transmitters is fabricated in a 0.35mum CMOS process. This hybrid switching modulator consists of a class-D amplifier with a 2MHz switching frequency and a wideband buffered analog amplifier having low output impedance of 200mOmega at high frequency. It can drive an RF PA with an equivalent impedance of 4Omega up to maximum output power of 2.25W with a maximum efficiency of 88.3%. The chip area is 4.7mm2.

Journal ArticleDOI
TL;DR: In this paper, a new low-frequency input impedance model was developed by using the method of harmonic balance, which conforms to the standard definition of impedance and predicts input current responses to superimposed input harmonic voltages.
Abstract: Input impedance models of boost single-phase power factor correction converters suitable for predicting small-signal input characteristics below the line fundamental frequency are presented in this paper. Existing low-frequency input impedance models based on double averaging predicts input current responses to perturbations in the amplitude of the input voltage. It is shown in this paper that such impedance models do not conform to the standard definition of impedance, and, hence, cannot be used in conjunction with the source output impedance to study system interactions based on the Nyquist stability criterion, as traditionally done in dc power systems. A new input impedance model that overcomes this problem is developed by using the method of harmonic balance. The new model conforms to the standard definition of impedance and predicts input current responses to superimposed input harmonic voltages. Numerical simulation and experimental results are presented to validate the proposed model. Mathematical relationship between the two types of models are also presented.

Proceedings ArticleDOI
17 Jun 2007
TL;DR: In this article, the authors presented the modeling and analysis of small-signal input impedance for line-commutated rectifiers, and derived closed-form analytical expressions for the ac input impedance as functions of the dc circuit impedance.
Abstract: This paper presents the modeling and analysis of small-signal input impedance for line-commutated rectifiers. The recently developed impedance mapping method, which has been applied to single-phase rectifiers with sinusoidal line inputs, is generalized to single-phase rectifiers with distorted lines as well as three-phase rectifiers. The modeling method assumes known impedance of the circuit on the dc side of the rectifier bridge (including its output filter and the load), and determines the corresponding ac input impedance by using a current and voltage mapping function which describes the operation of the rectifier bridge in the frequency domain. In this approach, closed-form analytical expressions are derived for the ac input impedance as functions of the dc circuit impedance. The resulting models are intended for stability analysis and design of large ac power systems involving significant number of rectification loads, such as more-electric aircraft power systems and microgrids. Detailed derivation of the models is presented in this paper. Numerical simulation and experimental measurement results are also presented to validate the derived models.

Journal ArticleDOI
TL;DR: Novel calibration methods for the recently developed KHU Mark1 EIT system are described, which obtained 1 MOmega minimal output impedance of the current source in the frequency range 10 Hz-500 kHz and showed effects of calibration in reconstructed images.
Abstract: Multi-channel multi-frequency electrical impedance tomography (EIT) systems require a careful calibration to minimize systematic errors. We describe novel calibration methods for the recently developed KHU Mark1 EIT system. Current source calibration includes maximization of output resistance and minimization of output capacitance using multiple generalized impedance converters. Phase and gain calibrations are used for voltmeters. Phase calibration nulls out the total system phase shift in measured voltage data. Gain calibrations are performed in two steps of intra- and inter-channel calibrations. Intra-channel calibration for each voltmeter compensates frequency dependence of its voltage gain and also discrepancy between design and actual gains. Inter-channel calibration compensates channel-dependent voltage gains of all voltmeters. Using the calibration methods described in this paper, we obtained 1 MOmega minimal output impedance of the current source in the frequency range 10 Hz-500 kHz. The reciprocity error was as small as 0.05% after intra- and inter-channel voltmeter calibrations. To demonstrate effects of calibration in reconstructed images, we used a homogenous phantom from which uniform images should be produced. Reconstructed time- and frequency-difference images using uncalibrated data showed spurious anomalies. By using calibrated data, standard deviations of time- and frequency-difference images of the homogenous phantom were reduced by about 40% and 90%, respectively.

Journal ArticleDOI
TL;DR: In this article, a two-stage ballast system with a power factor correction (PFC) and a resonant inverter for high-intensity discharge lamps is presented, which includes a microcontroller whose proposed algorithm implements a power loop and a voltage loop, both to control the PFC, and generates the transistor drive signals of the RI.
Abstract: This paper presents new design considerations and a control strategy for a two-stage ballast system; power factor correction (PFC) and resonant inverter (RI), for high intensity discharge lamps. The ballast includes a microcontroller whose proposed algorithm implements a power loop and a voltage loop, both to control the PFC, and generates the transistor drive signals of the RI. The power loop adjusts the lamp power in steady state and the voltage loop controls the PFC during the ignition and warm-up time. System stability is studied to verify that the PFC stage provides the ballast with the required stability in long and medium term, while the short term stability is assured by the high output impedance of the LCC inverter, operating in open loop at constant switching frequency. The resulting performance of the ballast shows improvements in ignition repeatability, warm-up time reduction, robustness of the resonant inverter operation, and simple and accurate power control, including dimming operation

Journal ArticleDOI
TL;DR: The limited usefulness of the maximum power transfer theorem in practice is argued and some reasons for this type of impedance matching exists, other than effectingmaximum power transfer.
Abstract: The limited usefulness of the maximum power transfer theorem in practice is argued. Inappropriately, the utility and value of the maximum power transfer theorem are often elevated to be religious icons of electrical engineering. While the theorem appears to be useful, often in real circuits the load impedance is not set equal to the complex conjugate of the equivalent impedance of the connecting source. When the load impedance happens to be equal to the complex conjugate of the source impedance, other practical reasons for this type of impedance matching exists, other than effecting maximum power transfer. Some reasons are discussed in a straightforward fashion.

Journal ArticleDOI
TL;DR: In this article, a two-input three-output current-mode universal filter with three dual-output controlled-controlled current conveyors (DOCCCIIs) and two grounded capacitors is presented.
Abstract: A novel current-controlled two-input three-output current-mode universal filter, which employs only three dual-output controlled-controlled current conveyors (DOCCCIIs) and two grounded capacitors, is presented in this paper. The proposed configuration provides inverting-type lowpass, noninverting-type lowpass, inverting-type bandpass, noninverting-type bandpass, highpass, bandstop and allpass current responses at a high impedance terminal, which enable easy cascadability. The filter also offers an independent electronic control of the natural frequency ω o and the parameter ω o / Q through adjusting the bias current of the DOCCCII. No critical matching condition is required for realizing all the filter responses, and all the incremental parameter sensitivities are low. The performances of the proposed circuit are simulated with PSPICE to confirm the presented theory.

Patent
15 Nov 2007
TL;DR: In this paper, a response voltage Vc is calculated by substituting the measured internal impedance X into a response-voltage correlation equation, and by comparing the response voltage with a predetermined threshold V0, if Vc was bigger than or equal to V 0, the battery was determined as normal.
Abstract: Coefficients A and B are calculated from the measured temperature and the measured state of charge. Next, a response voltage Vc is calculated by substituting the measured internal impedance X into a response-voltage correlation equation. Besides, by comparing the response voltage Vc with a predetermined threshold V0, if Vc is bigger than or equal to V0, the battery is determined as normal. By substituting the measured values of internal impedance, temperature, and SOC into the internal impedance calculation formula, a final internal impedance calculation formula is determined by calculating the value of C by an iterating operation. Next, in the case of determining SOH of a battery, by substituting a standard temperature and a standard SOC into the final internal impedance calculation formula, the internal impedance to determine the SOH is calculated. By comparing the internal impedance with SOH determination threshold, the SOH of the battery is determined.

Patent
30 Jan 2007
TL;DR: In this article, a radio frequency (RF) structure services an antenna having a characteristic impedance and includes a differential Power Amplifier, a differential Low Noise Amplifier (LNA), and a balun transformer.
Abstract: A Radio Frequency (RF) structure services an antenna having a characteristic impedance and includes a differential Power Amplifier (PA), a differential Low Noise Amplifier (LNA), and a balun transformer. The differential PA has a differential PA output with a PA differential output impedance. The differential LNA has a differential LNA input with an LNA differential input impedance. The balun transformer has a singled ended winding coupled to the antenna, a differential winding having a first pair of tap connections coupled to the differential PA output and a second pair of tap connections coupled to the differential LNA input, and a turns ratio of the single ended winding and the differential winding. The turns ratio and the first pair of tap connections impedance match the PA differential output impedance to the characteristic impedance of the antenna. The turns ratio and the second pair of tap connections impedance match the LNA differential input impedance to the characteristic impedance of the antenna.

Patent
Han-Seok Yun1, Young-Jo Lee1, Soo-Seok Choi1, Jae-moon Lee1, Bo-Hyung Cho1 
29 Aug 2007
TL;DR: In this article, a battery management system that estimates an internal impedance of a battery, a method of driving the same, a device that estimates a battery's internal impedance, and a method for estimating the internal impedance in a battery including a plurality of cells is presented.
Abstract: A battery management system that estimates an internal impedance of a battery, a method of driving the same, a device that estimates an internal impedance of a battery, and a method of estimating the internal impedance of a battery. A method of driving a battery management system that estimates the internal impedance of a battery including a plurality of cells includes generating a battery equivalent model of the battery, receiving a terminal voltage signal and a charge and discharge current signal of the battery, and generating a first discrete signal corresponding to the terminal voltage signal of the battery and a second discrete signal corresponding to the charge and discharge current signal of the battery, and filtering the first discrete signal and the second discrete signal according to a frequency range corresponding to the battery equivalent model so as to estimate the internal impedance of the battery. The device that estimates an internal impedance of a battery filters the first discrete signal and the second discrete signal according to a frequency range corresponding to the battery equivalent model so as to estimate the internal impedance of the battery.

Journal ArticleDOI
TL;DR: A high-output impedance current mode single-input and three-outputs (SITO)-type multifunction filter which employs three dual-output current conveyors to simultaneously realize low-pass, high-pass and band-pass responses is presented.
Abstract: This paper presents a high-output impedance current mode single-input and three-outputs (SITO)-type multifunction filter which employs three dual-output current conveyors to simultaneously realize low-pass, high-pass and band-pass responses. The proposed circuit uses grounded-virtually grounded passive components (which makes the circuit ideal for integration and tuning). Moreover, it has low active and passive component sensitivities and does not require critical matching conditions and cancellation constraints.

Proceedings ArticleDOI
27 May 2007
TL;DR: Three simple low-voltage CMOS analogs of the Wilson current mirror are described that function well at all current levels, ranging from weak inversion to strong inversion, comparing them with CMOS implementations of the conventional Wilson and super-Wilson current mirrors.
Abstract: In this paper, we describe three simple low-voltage CMOS analogs of the Wilson current mirror that function well at all current levels, ranging from weak inversion to strong inversion. Each of these current mirrors can operate on a low power-supply voltage of a diode drop plus two saturation voltages and features a wide output-voltage swing with a cascode-type incremental output impedance. Two of the circuits requires an input voltage of a diode drop plus a saturation voltage while the third one features a low input voltage of a saturation voltage. We present experimental results from versions of these three current mirrors that were fabricated in a 0.5-mum CMOS process through MOSIS, comparing them with CMOS implementations of the conventional Wilson and super-Wilson current mirrors.

Patent
24 Aug 2007
TL;DR: In this paper, a gate-source capacitor is adjusted so that a real part of an LNA input impedance corresponds to the complex conjugate of the source impedance at the selected sub-band center frequency.
Abstract: Methods and corresponding systems in a low noise amplifier include selecting a selected sub-band for amplifying, wherein the selected sub-band is one of a plurality of sub-bands, wherein each sub-band is a portion of a frequency band, and wherein each sub-band has a corresponding sub-band center frequency. Next, a gate-source capacitor is adjusted so that a real part of an LNA input impedance corresponds to a real part of a source impedance at the selected sub-band center frequency. A match capacitor is also adjusted so that the LNA input impedance corresponds to the complex conjugate of the source impedance at the selected sub-band center frequency. The gate-source capacitor and the match capacitor can each be adjusted by recalling capacitor values from memory that correspond to the selected sub-band, and connecting selected capacitor components in response to the recalled capacitor values.

Journal ArticleDOI
TL;DR: A method for measuring the complex impedance of bolometers and calorimeters that allows experimenters to easily isolate the device impedance from the effects of parasitic impedances and frequency dependent gains in amplifiers.
Abstract: Impedance measurements provide a useful probe of the physics of bolometers and calorimeters. We describe a method for measuring the complex impedance of these devices. In previous work, stray impedances and readout electronics of the measurement apparatus have resulted in artifacts in the impedance data. The technique allows experimenters to find an independent Thevenin or Norton equivalent circuit for each frequency. This method allows experimenters to easily isolate the device impedance from the effects of parasitic impedances and frequency dependent gains in amplifiers.

Journal ArticleDOI
TL;DR: In this paper, a modified current conveyor was proposed for current-mode cascading by possessing high output impedance, which was validated through PSPICE simulation using 0.5μ CMOS parameters.
Abstract: This paper presents some new current mode first order all-pass sections with grounded components employing a modified current conveyor. The new circuits are ideal for current-mode cascading by possessing high output impedance. As an application of the circuits, a new quadrature oscillator is also given. The theory is validated through PSPICE simulation using 0.5μ CMOS parameters.

Journal ArticleDOI
TL;DR: In this paper, the authors presented two new first-order voltage-mode all-pass filters using a single-current differencing buffered amplifier and four passive components, which employed a capacitor, a resistor, and an active element.
Abstract: This paper presents two new first-order voltage-mode all-pass filters using a single-current differencing buffered amplifier and four passive components Each circuit is compatible to a current-controlled current differencing buffered amplifier with only two passive elements, thus resulting in two more circuits, which employ a capacitor, a resistor, and an active element, thus using a minimum of active and passive component counts The proposed circuits possess low output impedance, and hence can be easily cascaded for voltage-mode systems PSPICE simulation results are given to confirm the theory

Patent
Thomas William Arell1
13 Feb 2007
TL;DR: In this article, a multi-stage RF/Microwave power amplifier circuit is provided that is capable of operating efficiently at multiple output power levels, including low power and high power modes.
Abstract: A multi-stage RF/Microwave power amplifier circuit is provided that is capable of operating efficiently at multiple output power levels. The amplifier comprises first and second amplifying stages, an output impedance matching network connected to the output of first amplifying stage and an interstage impedance matching network connected between the outputs of said first and second amplifying stages. In a high power mode, the first amplifying stage is enabled and the second amplifying stage is disabled and the output and interstage impedance matching networks present a first value of the output impedance that improves the efficiency of the first amplifying stage. In a low power mode, the first amplifying stage is disabled and the second amplifying stage is enabled, and output and interstage impedance matching networks present a second value of the output impedance that improves the efficiency of the second amplifying stage.