Showing papers on "Output impedance published in 2017"
TL;DR: A comprehensive overview on the contributions and their classification on the inverter- and grid-side damping measures are presented and some promising damping methods for industrial applications will be discussed.
Abstract: Grid-tied voltage source inverters using LCL filter have been widely adopted in distributed power generation systems (DPGSs). As high-order LCL filters contain multiple resonant frequencies, switching harmonics generated by the inverter and current harmonics generated by the active/passive loads would cause the system resonance, and thus the output current distortion and oscillation. Such phenomenon is particularly critical when the power grid is weak with the unknown grid impedance. In order to stabilize the operation of the DPGS and improve the waveform of the injected currents, many innovative damping methods have been proposed. A comprehensive overview on those contributions and their classification on the inverter- and grid-side damping measures are presented. Based on the concept of the impedance-based stability analysis, all damping methods can ensure the system stability by modifying the effective output impedance of the inverter or the effective grid impedance. Classical damping methods for industrial applications will be analyzed and compared. Finally, the future trends of the impedance-based stability analysis, as well as some promising damping methods, will be discussed.
279 citations
TL;DR: In this paper, a study of the stability of grid-connected inverters with high grid impedance based on impedance analysis is presented, where the effects of the PLL loop and the digital control delays on the output impedance characteristics have been taken into account.
Abstract: A power distribution grid exhibits the characteristics of a weak grid owing to the existence of scattered high-power distributed power-generation devices. The grid impedance affects the robust stability of grid-connected inverters, leading to harmonic resonance, or even instability in the system. Therefore, a study of the stability of grid-connected inverters with high grid impedance based on impedance analysis is presented in this paper. The output impedance modeling of an LCL -type single-phase grid-connected inverter is derived, where the effects of the PLL loop and the digital control delays on the output impedance characteristics have been taken into account. To enhance the stability of grid-connected inverters with different grid impedance, a novel impedance-phased compensation control strategy is proposed by increasing the phase margin of the grid-connected inverters. Specifically, a detailed implementation and parameter design of the impedance-phased compensation control method is depicted. Finally, an impedance-phased dynamic control scheme combined with online grid impedance measurement is introduced and also verified by the experiment results.
225 citations
TL;DR: In this paper, a comparative study of V-I / I-I/I-V droop control approaches in dc microgrids focusing on steady-state power-sharing performance and stability is presented.
Abstract: Droop control has been widely applied in dc microgrids (MGs) due to its inherent modularity and ease of implementation Among the different droop control methods that can be adopted in dc MGs, two options have been considered in this paper: I – V and V – I droop I – V droop controls the dc current depending on the dc voltage while V – I droop regulates the dc voltage based on the output current The paper proposes a comparative study of V – I / I – V droop control approaches in dc MGs focusing on steady-state power-sharing performance and stability The paper presents the control scheme for current-mode ( I – V droop) and voltage-mode ( V – I droop) systems, derives the corresponding output impedance of the source subsystem, including converters dynamics, and analyzes the stability of the power system when supplying constant power loads The paper first investigates the impact on stability of the key parameters including droop gains, local control loop dynamics, and number of sources and then performs a comparison between current-mode and voltage-mode systems in terms of stability In addition, a generalized analytical impedance model of a multisource, multiload power system is presented to investigate stability in a more realistic scenario For this purpose, the paper proposes the concept of “global droop gain” as an important factor to determine the stability behaviour of a parallel sources based dc system The theoretical analysis has been validated with experimental results from a laboratory-scale dc MG
139 citations
TL;DR: Five modifications to the synchronverter algorithm from the paper “Synchronverters: Inverters that mimic synchronous generators,” are proposed to improve its stability and performance and introduce virtual capacitors in series with the inverter outputs to filter spurious dc components from the current supplied to the grid.
Abstract: Synchronverters are inverters that mimic the behavior of synchronous generators. In this paper, we propose five modifications to the synchronverter algorithm from the paper “Synchronverters: Inverters that mimic synchronous generators,” ( IEEE Trans. Ind. Electron. , vol. 58, no. 4, pp. 1259–1267, Apr. 2011), to improve its stability and performance. These modifications are implemented in software and do not require any changes in the inverter hardware. The first two modifications concern the control of the virtual field current in the synchronverter so that it is more robust to faults. We prove the stability of the grid-connected synchronverter with this improved field current controller. The third modification is to increase the effective size of the filter inductors virtually. This is motivated using results from the stability analysis of a constant field current synchronous generator connected to an ac power grid and also by practical considerations. Simulations and experiments show that this leads to a much better response to changes in grid frequency, voltage, or to imbalance in the grid. The fourth modification is to change the formula for the (virtual) nominal active mechanical torque to take into account the (virtual) losses in the output impedance of the converter. This makes the tracking of the desired active power much more accurate. The fifth modification is to introduce virtual capacitors in series with the inverter outputs to filter spurious dc components from the current supplied to the grid.
139 citations
TL;DR: In this paper, the generalized Nyquist stability criterion (GNC) is used to evaluate the small-signal stability of balanced three-phase dc systems, where the impedance matrices of subsystems can be designed as diagonal dominant.
Abstract: Small-signal stability in balanced three-phase systems is typically investigated by means of the generalized Nyquist stability criterion (GNC) that involves operations on the source and load subsystems’ impedance matrices. Eigenvalues of the ratio of these impedance matrices should be calculated for stability judgment. This paper shows that for a power-electronics-based distributed power system, impedance matrices of subsystems can be designed as diagonal dominant. Therefore, stability, in this case, is fully determined by the scalar ratios formed by the impedance elements seen across the ${d}$ -axis and ${q}$ -axis interfaces. A three-phase ac system can then be treated as two decoupled dc systems. As a result, the ac stability analysis can also be conducted based on insightful impedance quantities; impedance specification criteria developed for dc systems can be readily applied to ensure stability in ac systems. The major contribution of this paper is related to the simplification of the GNC analysis with good experimental validations. Limitation of the proposed method is that the systems have to work under high power factor condition. However, such limitation is not a problem for many power-electronics-based distributed power systems.
137 citations
TL;DR: A capacitive virtual impedance loop was implemented to improve the harmonic current sharing and attenuate the voltage harmonics at the PCC during islanded operation of the microgrid.
Abstract: Optimization of the islanded and grid-connected operation of microgrids is important to achieve a high degree of reliability. In this paper, the authors consider the effect of current harmonics in single phase microgrids during both modes of operation. A detailed analysis of the effect of the output impedance of the considered primary control loops on the harmonic output of the considered voltage source inverters is initially carried out. A virtual admittance loop is proposed to attenuate the current harmonic output in grid-connected operation that is generated due to the grid voltage distortion present at the point of common coupling (PCC) and due to local non-linear loads. This paper also considers the harmonic current sharing and resulting voltage harmonics at the PCC during islanded operation of the microgrid. A capacitive virtual impedance loop was implemented to improve the harmonic current sharing and attenuate the voltage harmonics at the PCC. Experimental results are given to validate the operation of the proposed algorithms.
132 citations
TL;DR: The theoretical analysis is instrumental in designing an optimally stable single dc bus EPS and provides a stability analysis based on the derivation of the output impedance of the source subsystem and input impedance ofThe load subsystem, including control dynamics.
Abstract: This paper focuses on the analysis of a single dc bus multigenerator electrical power system (EPS) for future more electric aircraft. Within such a single bus paradigm, the paper proposes a detailed control design procedure and provides a stability analysis based on the derivation of the output impedance of the source subsystem and input impedance of the load subsystem, including control dynamics. The single bus characteristic is analyzed and the stability properties of the EPS are investigated when supplying constant power loads. In addition, the paper highlights the impact on stability of the number of parallel sources and of the power sharing ratio. The theoretical analysis is instrumental in designing an optimally stable single dc bus EPS. The key findings are validated by experimental results.
127 citations
TL;DR: In this article, a new impedance-based stability criterion was proposed for a grid-tied inverter system based on a Norton equivalent circuit of the inverter, and the link between the criterion in [18] and the original criterion is the inverse Nyquist stability criterion.
Abstract: A new impedance-based stability criterion was proposed for a grid-tied inverter system based on a Norton equivalent circuit of the inverter [18] . As an extension of the work in [18] , this paper shows that using a Thevenin representation of the inverter can lead to the same criterion in [18] . Further, this paper shows that the criterion proposed by Middlebrook can still be used for the inverter systems. The link between the criterion in [18] and the original criterion is the inverse Nyquist stability criterion. The criterion in [18] is easier to be used. Because the current feedback controller and the phase-locked loop of the inverter introduce poles at the origin and right-half plane to the output impedance of the inverter. These poles do not appear in the minor loop gain defined in [18] but in the minor loop gain defined by Middlebrook. Experimental systems are used to verify the proposed analysis.
113 citations
TL;DR: Systematic measurements demonstrate that the hybrid nanogenerator can deliver the largest output power of 13 mW at a loading resistance of 8 kΩ and it is demonstrated that a wind-driven RSHG can light dozens of light-emitting diodes and power an electric watch.
Abstract: Currently, a triboelectric nanogenerator (TENG) and an electromagnetic generator (EMG) have been hybridized to effectively scavenge mechanical energy. However, one critical issue of the hybrid device is the limited output power due to the mismatched output impedance between the two generators. In this work, impedance matching between the TENG and EMG is achieved facilely through commercial transformers, and we put forward a highly integrated hybrid device. The rotating-sleeve triboelectric–electromagnetic hybrid nanogenerator (RSHG) is designed by simulating the structure of a common EMG, which ensures a high efficiency in transferring ambient mechanical energy into electric power. The RSHG presents an excellent performance with a short-circuit current of 1 mA and open-circuit voltage of 48 V at a rotation speed of 250 rpm. Systematic measurements demonstrate that the hybrid nanogenerator can deliver the largest output power of 13 mW at a loading resistance of 8 kΩ. Moreover, it is demonstrated that a win...
101 citations
TL;DR: The strategy simulates characteristics of paralleling capacitor at the VSG output terminal, and compensates the output voltage according to adaptive control ofVSG output reactive power, thus to reduce reactive power sharing error, and improve the voltage control accuracy meanwhile.
Abstract: In the islanded microgrid, distributed generators are controlled with virtual synchronous generator (VSG) strategy to simulate rotor inertia and droop characteristics of synchronous generators, in order to enhance the voltage and frequency support capabilities. Since the capacity and location distribution of each VSG is random, the VSG output impedance, line impedance and its capacity are mismatched, resulting in inaccurate sharing of reactive power. Based on the study of reactive power sharing schemes without communication and system parameters detection, and aiming at the contradiction between reactive power sharing error and voltage control accuracy of existing schemes, a reactive power sharing strategy based on virtual capacitor is proposed. The strategy simulates characteristics of paralleling capacitor at the VSG output terminal, and compensates the output voltage according to adaptive control of VSG output reactive power, thus to reduce reactive power sharing error, and improve the voltage control accuracy meanwhile. The design of virtual capacitor parameters and a two VSG parallel system stability with proposed strategy are analyzed in this paper. The correctness and effectiveness of the proposed strategy is verified by experiments.
82 citations
TL;DR: The inverter output impedance is passivized for solving the harmonic and the stability problems in the multiparallel inverters and the dynamic performance is enhanced with an additional current reference generation scheme.
Abstract: In this paper, the inverter output impedance is passivized for solving the harmonic and the stability problems in the multiparallel inverters The harmonics are easily aroused because of the disturbances, and the system stability is challenged by the grid impedance Based on the simplified equivalent impedance model, the two problems are analyzed in the low-frequency (LF) band and the high-frequency (HF) band, respectively Aiming at improving the LF performance, the weighted-proportional grid voltage feedforward and the harmonic quasi-resonant controller with phase compensation are proposed The dynamic performance is enhanced with an additional current reference generation scheme In order to improve the HF performance, a novel digital phase lead filter which brings the system back to a minimum-phase case is proposed By the proposed control method, the high modulus of each inverter output impedance $Z_{o}$ is guaranteed, while the phase angles of $Z_{o}$ over the entire frequency band are avoided to be lower than −90° The experiments based on four-parallel inverters have been conducted to validate the effectiveness of the proposed control method
01 Jul 2017
TL;DR: In this article, the authors investigated the origins of the voltage imbalance in practical implementations of flying capacitor multilevel (FCML) converters and presented corresponding solutions to solve the problem.
Abstract: Flying capacitor multilevel (FCML) converters are known to naturally balance the capacitor voltages through the use of phase-shifted pulse-width modulation. However, in practice, the capacitor voltages can still deviate and active balancing is often required. This work investigates the origins of the voltage imbalance in practical implementations of such converters and presents corresponding solutions. It is shown that the source impedance and the input capacitor can have a drastic impact on the flying capacitor voltages. Moreover, we also demonstrate that an FCML converter with an even number of levels has significantly better immunity to the presence of source impedance than one with an odd number of levels. It is also found that gate signal propagation delay mismatch from half-bridge gate drivers will lead to capacitor imbalance. An alternative gate drive power supply circuit is designed to address this problem. Lastly, variations of switches' on-resistance are found to have a small impact on the capacitor voltage balance.
TL;DR: In this paper, the authors proposed an impedance-based method to determine the source and the load impedance of a two-terminal HVDC system, and the results are compared with the experimental results.
Abstract: The high-voltage dc (HVDC) systems are appearing more and more, and it is becoming a requirement that the HVDC voltage-source converters (VSCs) operate both as an inverter and a rectifier without changing the controls to provide the flexibility of having power flows in both directions. It is observed that the HVDC system operates stably when the power flow direction is from the power-controlled converter to the dc-voltage-controlled converter, and it becomes unstable when the power flow direction has been altered. In order to analyze such an instability problem and to design the local control, an impedance-based method is proposed. Identifying the source and the load impedance are prerequisite to apply the impedance-based method. The existing method of determining the source and the load impedance cannot predict the stability when the power flow direction is altered; therefore, a method based on the power flow direction has been presented to determine the source and the load impedance. The converter that injects power to the dc system is the current source represented with its Norton equivalent parallel impedance, while the other converter impedance is considered as the load impedance. The stability of the system is determined by the ratio of the load impedance to the current-source impedance. Once the source and the load impedance are analytically obtained, the impedance-based Generalized Nyquist stability criterion is applied to determine the stability. The system stability for the two power flow directions is well predicted from the Nyquist plot of impedance ratio. A two-terminal HVDC system has been developed in MATLAB/Simulink to demonstrate the application of this method, and the results are compared with the experimental results.
TL;DR: This brief presents a filter-integrated high-efficiency class-F power amplifier (PA) employed not only to realize output impedance matching and the third-harmonic manipulation but also to provide high-selectivity bandpass responses.
Abstract: This brief presents a filter-integrated high-efficiency class-F power amplifier (PA). The hybrid cavity–microstrip filtering circuit is employed not only to realize output impedance matching and the third-harmonic manipulation but also to provide high-selectivity bandpass responses. To fulfill the requirements of high-efficiency class-F PAs, cavity resonators and microstrip feeding structures are involved, and their benefits are fully exploited. The metal cavity resonator features a high $Q$ value and, thus, low loss in the passband, resulting in high efficiency. Moreover, metal walls of cavities act as heat sink for the transistor. The microstrip feeding structures are used to improve the skirt selectivity and manipulate the third harmonic. Moreover, it features easy integration with the transistor, and thus, the transition between cavity and microstrip lines is eliminated. The hybrid filter is characterized based on filter synthesis theory. Complex impedance conversion analysis is carried out to guide the impedance transformation from 50 $\Omega$ to a complex one desired by the transistor. For demonstration, a filtering PA operating at 2.4 GHz is designed and measured. It exhibits both high-selectivity bandpass responses and good PA performance with maximum power-added efficiency of 70.9% at 40.8-dBm output power.
TL;DR: In this article, the buck-boost converter in discontinuous conduction mode has the characteristic of that the input resistance is independent of the load resistance and the input voltage, which seems to be suitable for impedance matching.
Abstract: Impedance matching is a common issue in a wireless power transfer (WPT) system. This paper summarizes impedance matching methods reported in the literature and gives a theoretical analysis on dc–dc converter for impedance matching in a WPT system. A buck–boost converter in discontinuous conduction mode has the characteristic of that the input resistance is independent of the load resistance and the input voltage, which seems to be suitable for impedance matching. Furthermore, the impedance matching ability of buck–boost converter will not depend on the frequency of rectifier, because it implements the solution to the dc output of rectifier. To verify those, we give several application examples of this buck–boost converter applied in rectifiers with different frequencies, such as 2.45, 5.8, and 24 GHz. As a result, those rectifiers with the buck–boost converter achieve a constant RF-dc conversion efficiency over an extremely wide load range. In addition, it is also successfully utilized in a microwave power transmission system for driving a dc motor.
TL;DR: In this paper, the authors describe the design and implementation of the first medium-voltage impedance measurement unit (IMU) capable of characterizing in situ source and load impedances of dc and ac networks (4160 V ac, 6000 V dc, 300 A, 2.2 MVA).
Abstract: This paper describes the design and implementation of the first medium-voltage impedance measurement unit (IMU) capable of characterizing in situ source and load impedances of dc and ac networks (4160 V ac, 6000 V dc, 300 A, 2.2 MVA) in the frequency range of 0.1 Hz–1 kHz. The IMU comprises three power electronics building blocks (PEBBs), each built using 10-kV SiC MOSFET H-bridges. The modularity of the PEBBs allows for both series and shunt perturbation injection modes to be realized, as both injection modes are needed to accurately predict the stability of the electrical system. The effectiveness of the proposed impedance identification approach is experimentally verified on medium voltage power grid.
TL;DR: In this article, a generalized output impedance model for switched-capacitor (SC) dc-dc converters that can be resonated or soft-charged with a single inductor is presented, which can be used to identify the most suitable architectures for a given conversion ratio and relevant constraints on flying capacitors.
Abstract: This paper explores generalized output impedance models and develops a new performance-limit figure of merit (FOM) for switched-capacitor (SC) dc–dc converters that can be resonated or soft-charged with a single inductor. Compared to past work, the output impedance model is greatly simplified through a two-port charge multiplier treatment, yet it maintains accuracy across conversion ratios and is valid in both slow- and fast-switching operation. Building on previous analytical treatments of SC and ReSC converters, the model is expanded to derive optimizations that include both conduction and switching losses. The process is used to identify a new FOM for hybrid–resonant SC converters that can be used to identify the most suitable architectures for a given conversion ratio and relevant (energy or area) constraints on flying capacitors. This is used to highlight the active-device and capacitance utilizations of common topologies, as well as which are most favorable for hybrid–resonant operation.
TL;DR: An uncertainty and disturbance estimator (UDE)-based robust droop controller is proposed to address problems of nonlinearity and uncertainty in conventional droop control methods, and results from a single-phase system with two inverters are provided.
Abstract: Conventional droop control methods cannot achieve accurate proportional reactive power sharing, due to the mismatch of components, system disturbances, etc. In this paper, an uncertainty and disturbance estimator (UDE)-based robust droop controller is proposed to address these problems. As a result, the model nonlinearity and uncertainty (e.g., power angle and uncertain output impedance) and system disturbances (e.g., variations of output impedance, load change, and fluctuating dc-link voltage) can be estimated and compensated. Experimental results from a single-phase system with two inverters are provided to demonstrate the effectiveness of the proposed strategy. In order to further demonstrate the advantage and flexibility of the proposed UDE-based control strategy, simulation results from a three-phase system with two inverters are presented with comparison to a robust droop control strategy reported.
TL;DR: In this paper, the effect of the output impedance of peaking power amplifier (PA) on Doherty PAs (DPAs) is analyzed at the internal plane of transistors.
Abstract: The effect of the output impedance of peaking power amplifier (PA) on Doherty PAs (DPAs) is analyzed in this paper. In the design procedure of DPAs, the ideal case is that the output impedance of auxiliary PA is infinite at output power back-off (OPBO) level. However, it is almost impossible to realize this perfect condition in broadband DPAs. Therefore, when the output impedance of peaking path deviates from infinity, some potential effects on DPAs must be produced. In this paper, these effects are explained at the internal plane of transistors. The conclusion is that, at different normalized frequencies, there are different optimal impedance regions for the output impedance of peaking stage. This means that the noninfinite output impedances of peaking stage can enhance the performances of broadband DPAs so long as they are elaborately processed. A 1.65–2.7-GHz (48% bandwidth) broadband DPA is designed considering the effects of peaking PA. The experimental results show that this DPA obtains a drain efficiency of 41%–59.6% at 6-dB OPBO levels and a drain efficiency of 55.8%–72.2% at saturation power levels. The maximum output power across the entire operating band is 43.1–45.2 dBm with a gain of 9.0–10.2 dB. Furthermore, the designed DPA achieves an adjacent channel leakage ratio of −45.8 dBc with an output power of 36.1 dBm at 2.0 GHz after digital predistortion when it is excited by 5-MHz WCDMA signal with a peaking-to-average power ratio of 8.6 dB.
TL;DR: The output impedance modification with the active damping design is explained, thus, the stability and harmonic rejection capability of the converter can be improved and experimental measurements of the output impedance withactive damping are presented for the first time in the literature.
Abstract: LCL-filter is commonly used to attenuate the switching harmonics of grid-connected converters. LCL -filter creates resonances in the converter dynamics which shall be damped for ensuring robust performance of the converter. Active damping methods can be used to attenuate the resonant behavior effectively. Accordingly, the output impedance is affected and the grid-interaction sensitivity of the converter varies with the active damping design. In order to carry out impedance-based stability analysis or assessment of the harmonic rejection capability, an accurate analytical model to predict the output impedance is necessary. This paper investigates the output impedance properties of capacitor-current-feedback active damping, which are so far not considered thoroughly in the literature. The output impedance modification with the active damping design is explained, thus, the stability and harmonic rejection capability of the converter can be improved. Furthermore, in order to validate the model, experimental measurements of the output impedance with active damping are presented for the first time in the literature.
TL;DR: In this paper, the apparent impedance is defined as the ratio between the voltage and current at the injection point of a power system, and the eigenvalues are obtained by applying system identification techniques to the measured set of apparent impedances.
Abstract: In this paper, a new method for power system stability analysis is introduced. The method is based on injection of a small voltage or current in an arbitrary point of a power system. The apparent impedance is then defined as the ratio between the voltage and current at the injection point. It is shown that the apparent impedance can be used to estimate the eigenvalues of the system that are observable from the injection point. The eigenvalues are obtained by applying system identification techniques to the measured set of apparent impedances. The method is similar to the well-established impedance-based stability analysis based on source and load impedance models. However, while the source/load impedance ratio is viewed as the minor-loop gain, the apparent impedance can be viewed as a closed-loop transfer function. It can also be expressed as the parallel connection of the source and load impedance. It is shown, in this paper, how the system eigenvalues can be extracted based on a set of apparent impedance values. The apparent impedance holds, therefore, complementary information compared with the existing impedance-based stability analysis. The method can also be used as a tool to validate analytically derived state-space models. In this paper, the method is presented as a simulation tool, while further work will extend it to include experimental setups. Two case studies are presented to illustrate the method: 1) a dc case with a buck converter feeding a constant power load and 2) a three-phase grid-connected voltage source converter with a current controller and a phase lock loop. The estimated (apparent) eigenvalues of the studied systems are equal to those obtained from the analytic state-space model.
TL;DR: In this article, the secondary-particle size distribution of a lab-made lithium ion battery was investigated by electrochemical impedance spectroscopy, and an equivalent circuit was designed in which two series circuits of charge-transfer resistance and Warburg impedance were connected in parallel.
TL;DR: A novel impedance network circuit based on three coupled inductors with a Δ connection that offers smaller magnetizing current and winding losses compared to the successful Y-source circuit and the adverse effect of leakage inductance on the converter performance is significantly reduced.
Abstract: Impedance networks have been already investigated in various literature with the main goals of increasing the attainable voltage gain and reducing the components number. Recently, coupled inductors found popularity because they let converters with lower weight and cost. It seems that coupled inductances are a proper answer to the increasing voltage gain while keeping down the components number. This paper proposes a novel impedance network circuit based on three coupled inductors with a Δ connection. The proposed Δ-source converter offers smaller magnetizing current and winding losses compared to the successful Y-source circuit. Moreover, with the Δ-connected three coupled inductors, the adverse effect of leakage inductance on the converter performance is significantly reduced. The effectiveness of the proposed structure is analytically proved. The theoretical achievements over the conventional Y-source structure are confirmed through extensive simulations and experiments.
TL;DR: In this article, a modified small-signal model of a voltage source inverter (VSI) and a VSC that captures model nonlinearities such as deadtime and modulation effects that were not presented in the literature is presented.
Abstract: This paper presents a modified small-signal model of a voltage source inverter (VSI) and a voltage source converter (VSC) that captures model nonlinearities such as deadtime and modulation effects that were not presented in the literature. Previous research has concentrated on developing compensation methods for these types of phenomena in a switching model, but very little on predicting them. In this paper, the small-signal model of the VSI in literature is used, and the different phenomena are then incorporated into the model to get a complete one. In addition, the effect of voltage and current feedback control is also analyzed. The output impedance of the VSI is derived with the modified small-signal model, compared to the conventional one and validated with switching model and experimental results.
TL;DR: A novel and very simple scheme to mend conventional dual-band impedance matching networks is presented, which involves the employment of a load-modifying element (load-healer) so as to extend the range of frequency-dependent complex load that could be matched.
Abstract: A novel and very simple scheme to mend conventional dual-band impedance matching networks is presented. It involves the employment of a load-modifying element (load-healer) so as to extend the range of frequency-dependent complex load that could be matched. Two simple load-healers incorporated in the conventional T-network are used to illustrate the concept. The proposed scheme can be successfully applied in many situations where conventional matching networks are severely limited. Two prototypes operating concurrently at 1 and 2 GHz are designed corresponding to the two types of load-healer. They are implemented on FR4 substrate having a dielectric constant of 4.6, a substrate height of 1.5 mm, and a 35-μm copper cladding. The prototypes exhibit good agreement between their EM simulated and measured results.
TL;DR: This paper discusses the frequency-dependent input impedance of different types of modern electronic equipment and its potential impact on the network harmonic impedance, and aims to provide some impulses for further discussions.
Abstract: Network harmonic impedance forms the link between harmonic currents emitted by individual devices and the harmonic voltage levels in the grid. It is essential for the definition of current emission limits in order to ensure electromagnetic compatibility between all equipment connected to the grid. Among all electrical equipment in future smart grid electronic devices, like PV inverters, EV chargers or lamps with electronic ballast, will have a dominating share. This is expected to have a considerable impact on the network harmonic impedance characteristic. This paper discusses the frequency-dependent input impedance of different types of modern electronic equipment and its potential impact on the network harmonic impedance. It is shown that the semiconductor switching results in a variation of the impedance within the fundamental cycle. This is not considered by the presently used assessment methods as they assume only passive network elements. Beside a method to measure these variations, several indices are introduced to quantify the level of its impact. This paper aims to provide some impulses for further discussions, particularly about the definition of network harmonic impedance in presence of electronic devices, the necessity to include these variations in realistic harmonic studies and if this has to be considered in the standardization.
TL;DR: Together with the self-calibration and current matching functions, the current steering capabilities integrated on-chip support use in fully implanted neural interfaces with autonomous operation for and adaptive stimulation under variations in electrode and tissue conditions is presented.
Abstract: An 8-channel current steerable, multi-phasic neural stimulator with on-chip current DAC calibration and residue nulling for precise charge balancing is presented. Each channel consists of two sub-binary radix DACs followed by wide-swing, high output impedance current buffers providing time-multiplexed source and sink outputs for anodic and cathodic stimulation. A single integrator is shared among channels and serves to calibrate DAC coefficients and to closely match the anodic and cathodic stimulation phases. Following calibration, the differential non-linearity is within $ \pm 0.3$ LSB at 8-bit resolution, and the two stimulation phases are matched within 0.3%. Individual control in digital programming of stimulation coefficients across the array allows altering the spatial profile of current stimulation for selection of stimulation targets by current steering. Combined with the self-calibration and current matching functions, the current steering capabilities integrated on-chip support use in fully implanted neural interfaces with autonomous operation for and adaptive stimulation under variations in electrode and tissue conditions. As a proof-of-concept we applied current steering stimulation through a multi-channel cuff electrode on the sciatic nerve of a rat.
TL;DR: A five-inputs single −output voltage-mode universal biquadratic filter using active building block, namely voltage differencing differential difference amplifier (VDDDA) is presented and measured results agree well with theoretical expect.
TL;DR: In this paper, a simplified precalibration method using several known impedances is introduced to eliminate the influence of measurement instruments and other parasitic effects, which can extract the noise source impedance of SMPS in wide frequency band with sufficient accuracy.
Abstract: A noise source impedance extraction method for switched-mode power supply (SMPS) under operating condition is proposed and validated in this letter. First, a simplified precalibration method using several known impedances is introduced to eliminate the influence of measurement instruments and other parasitic effects. Second, the configuration of the proposed method is presented and the calculation methods of common-mode and differential-mode noise source impedances using microwave transmission analysis are described, respectively. The experimental results show that the proposed method can extract the noise source impedance of SMPS in wide frequency band with sufficient accuracy. Compared with traditional methods, the complex calibration process can be simplified, and no more additional equipment is required. Moreover, a novel multiple-function line impedance stabilization network (MF-LISN) with the function of electromagnetic interference measurement and noise source impedance extraction is designed according to the proposed method. Since only MF-LISN is used, it can be more convenient to extract the noise source impedance of SMPS for electromagnetic compatibility pretest.
TL;DR: This paper describes a DTX that embeds mixed-domain multi-tap finite-impulse response (FIR) filtering with programmable analog sub-sample delays within a highly linear and mismatch-resilient switched-capacitor DTX architecture and shows that switched-Capacitor power amplifiers in conjunction with transformer-based power combining are ideal candidates for embedding mixed- domain FIR filtering.
Abstract: A major drawback of digital transmitters (DTX) is the absence of a reconstruction filter after digital-to-analog conversion which causes the baseband quantization noise to get upconverted to radio frequency and amplified at the output of the transmitter. In high power transmitters, this upconverted noise can be so strong as to prevent their use in frequency-division duplexing systems due to receiver desensitization or impose stringent coexistence challenges. In this paper, we describe a DTX that embeds mixed-domain multi-tap finite-impulse response (FIR) filtering with programmable analog sub-sample delays within a highly linear and mismatch-resilient switched-capacitor DTX architecture. It is shown that switched-capacitor power amplifiers (SCPA) in conjunction with transformer-based power combining are ideal candidates for embedding mixed-domain FIR filtering since the near-constant source impedance of the SCPA greatly aids in linear FIR summation thereby preserving the desired noise-shaping profile. Moreover, their excellent mismatch characteristics help in ensuring precise tap weights in the FIR which enhances noise suppression. The availability of multiple taps in this architecture also allows the synthesis of FIR configurations with wide notch bandwidths (BW). Theoretical analyses of this architecture and design trade-offs related to linearity, mismatch, output power, and efficiency are discussed. The implemented 65 nm CMOS prototype exhibits a peak output power of 30.3 dBm and a peak system efficiency of 34%, and achieves a noise floor of −149 dBc/Hz over a BW of 20 MHz at an offset of 135 MHz from a 2.23 GHz carrier while transmitting a 1.4 MHz 64-QAM signal with an average output power of 22 dBm.