Output impedance

About: Output impedance is a research topic. Over the lifetime, 11185 publications have been published within this topic receiving 134949 citations.

Frequency selective amplifier with wide-band impedance and noise matching

Abstract: This disclosure is directed to a frequency-selective low noise amplifier (LNA) with wide-band impedance and noise matching. The LNAS may include a closed loop circuit that supports wideband input matching. For example, the closed loop circuit may be configure to impedance match an input signal and provide a low noise figure. In addition, the LNA may include an open loop circuit that amplifies the input signal and provides a high output impedance. The open loop circuit may further include a selectivity filter that filters out frequencies outside a desired frequency band. The LNA may drive a tunable band-pass filter via the open loop circuit.

Δ-Source Impedance Network

Abstract: Impedance networks have been already investigated in various literature with the main goals of increasing the attainable voltage gain and reducing the components number. Recently, coupled inductors found popularity because they let converters with lower weight and cost. It seems that coupled inductances are a proper answer to the increasing voltage gain while keeping down the components number. This paper proposes a novel impedance network circuit based on three coupled inductors with a Δ connection. The proposed Δ-source converter offers smaller magnetizing current and winding losses compared to the successful Y-source circuit. Moreover, with the Δ-connected three coupled inductors, the adverse effect of leakage inductance on the converter performance is significantly reduced. The effectiveness of the proposed structure is analytically proved. The theoretical achievements over the conventional Y-source structure are confirmed through extensive simulations and experiments.

A silicon MOS magnetic field transducer of high sensitivity

Abstract: A structure has been devised which converts magnetic flux density change to a change in output current. The structure is essentially a P-channel MOST with the drain diffusion split into two halves. A magnetic field normal to the silicon surface deflects device current towards one half-drain. By operating the MOST in the "pinched-off" mode (V DS > V GS -V T ) the output impedance is made high, so that large output voltage swings may be obtained. A theoretical study of the voltage and current distributions in the MOST channel has given data on the influence of device geometry on sensitivity. Experimental results indicate a linear relationship between output current and magnetic flux density, and an unexplained nonlinear variation of output with device current. Comparison of experimental results with theory indicates a carrier Hall mobility in the channel of 116 cm2/V.s.

Pulsed current generating circuits

Abstract: 1,139,392. Transistor saw-tooth and pulse circuits. INTERNATIONAL BUSINESS MACHINES CORP. 21 March, 1967 [30 March, 1966], No. 13069/67. Heading H3T. [Also in Divisions G1 and G3] A load 6, e.g. a transistor under test (see Division G1) is supplied with a pulse of constant current for a perdetermined time by means of the circuit shown, in which a pulse generator 1 having a voltage output of controllable amplitude controls a current generator 5 whose output is sensed by a detector 8 supplying a signal to a control circuit 9 which is also supplied from 10 with a predetermined reference signal, the arrangement being such that when the output of generator 5 reaches a predetermined value, circuit 9 produces a signal at output 25 to lock the generator 1 at that particular voltage output and so maintain the output of generator 5 constant at the predetermined value. Thereafter transistors 27, 28 respond to changes in current caused by impedance variation of the load 6 and so maintain the current constant. A typical cycle of operation is as follows:- (1) With positive potential at the terminals 2, 3, transistor 26 is reverse biased by the output of amplifier 16 so that there is no output from generator 5 and amplifier 39, the latter condition causing transistor 52 to be conducting, multivibrator 61 to be passive and its output at 25 to be negative. (2) Pulse reversal at terminal 2 reverse biases the diode 11 to stop the forward current through diode 13. (3) Pulse reversal at terminal 3, shortly after that at terminal 2, Fig. 3 (not shown), cuts off diode 20 and produces output from amplifier 16 in the form of a linear ramp whose rate of rise is adjustable by a resistor 23. A current of like waveform is thus produced at the output 34 of the generator 5 in which members 26, 31 form a voltage follower, a Zener diode 32 holds the base of transistor 28 at constant potential and the voltage of the constant voltage source 30 is divided between resistor 38 (of detector 8), the load 6 and the drop from the collector of transistor 28 to a common reference 17. (4) When the output Vs from amplifier 39 equals the reference voltage (-)Vp, the bias current IB from transistor 47 switches a tunnel diode 43 and turns on transistor 44, which causes transistor 52 to turn off and the multivibrator 61 to produce a positive pulse at the terminal 25. As a result diode 21 conducts to cut-off the diode 12 and the condenser 19 holds its charge for the remaining duration of the pulse at terminal 2, due to the high impedance of members 11, 12, 13 and 16. Thus transistor 26 is biased at a fixed value and the output current of generator 5 is maintained constant. (5) When the pulse at terminal 2 returns to its positive value, diode 11 is forward biased to discharge condenser 19, forward bias diode 13, and so cut off transistor 26 and the output from generator 5. In a modification employing an amplifier 16 of low output impedance, Fig. 2(b) (not shown), an output amplifier (120) is connected between the output of the generator 1 and the input of the generator 5. Also, the amplifier 39 may be replaced by a composite amplifier comprising two amplifiers appropriately connected with one another and with resistors, Fig. 2(a) (not shown).

Physical models for amorphous-silicon thin-film transistors and their implementation in a circuit simulation program

Abstract: A semianalytic theory to describe both the current-voltage and capacitance-voltage characteristics of amorphous silicon thin-film transistors on the basis of their physics of operation is presented. In this model, the drain current is directly related to the electron concentration at the source side of the channel. This enables one to describe the various regimes of operation of these devices (i.e. subthreshold or above threshold) using only one equation. The output conductance of these devices in saturation is also considered, and it is shown that the finite output impedance is a consequence of the drain voltage modulating the effective channel length by creating a space-charge limited current region of variable length near the drain. The results of this model are in good agreement both with experimental data and the results of comprehensive two-dimensional simulations. These device models have been successfully incorporated into a SPICE circuit simulation program. >