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Output impedance

About: Output impedance is a research topic. Over the lifetime, 11185 publications have been published within this topic receiving 134949 citations.


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Journal ArticleDOI
TL;DR: In this paper, a universal current-mode biquad filter circuit suitable for integrated circuit implementation is presented, which uses three two-output current followers, two voltage buffers, two grounded capacitors and four virtually grounded resistors.
Abstract: A new universal current-mode biquad filter circuit suitable for integrated circuit implementation is presented. The circuit uses three two-output current followers, two voltage buffers, two grounded capacitors and four virtually grounded resistors to realise all the standard biquad filters without changing the circuit topology. The proposed circuit can be used to achieve independent control of the natural frequency and the bandwidth. Also, the filter exhibits a low input impedance, high output impedance as well as low active and passive sensitivities. Simulation results using CMOS unity gain cells are also presented.

41 citations

Patent
28 Jul 1969
TL;DR: In this article, a passive impedance-matching network was designed to provide an interface between a fixed radio frequency power output of a generator and the capacitive electrodes of the gaseous plasma chamber of a plasma-generating apparatus, with the particular characteristic of providing a close impedance match over a relatively wide changing impedance range of the plasma in accordance with a known program.
Abstract: A passive impedance-matching network specifically designed to provide an interface between a fixed radio frequency power output of a generator and the capacitive electrodes of the gaseous plasma chamber of a plasma-generating apparatus, the network having the particular characteristic of providing a close impedance match over a relatively wide changing impedance range of the plasma in accordance with a known program.

41 citations

Journal ArticleDOI
TL;DR: Theoretical simulations show that the surface plus internal measurement approach holds some promise as a method for estimating temperature distributions during hyperthermia treatments, but the simulations while promising are idealizations in that they are two-dimensional with modest levels of additive noise.
Abstract: Algorithmic methods for estimating complete temperature fields during hyperthermia treatments based on surface and internal electrical measurements are presented. The techniques utilized draw upon impedance imaging concepts, but rather than limit the measurements to positions on the body surface, internal impedance recording sites are allowed. Theoretical simulations show that this strategy improves the reconstructed image in the target region when either internal measurement locations are added to a given number of external recording sites or some external measurement locations are replaced by internal recording positions. The algorithms developed are tested on a set of problems with increasing levels of complexity. The culmination of these investigations is a complete simulation of a hyperthermia treatment and reconstruction of a thermal image for a body cross-section of an actual cancer patient. The results of this work suggest that the surface plus internal measurement approach holds some promise as a...

41 citations

Journal ArticleDOI
TL;DR: Evaluation results show beyond-FinFET comparison speed and enhanced linearity for the proposed NCFET-based clocked comparator and VTC, respectively, and improvement is achieved by exploiting the steeper slope and increased output impedance ofNCFETs.
Abstract: Negative-capacitance FETs (NCFETs) are a promising candidate for low-power circuits with intrinsic features, e.g., the steep switching slope. Prior works have shown potential for enabling low-power digital logic and memory design with NCFETs. Yet, it is still not quite clear how to harness these new features of NCFETs for analog functionalities. This article provides more insights into the circuit design space with new device characteristics and investigates its deployment in analog circuits, specifically, time-domain analog-to-digital converters (ADCs) and phase-locked loops (PLLs). We propose and optimize a novel digital-based clocked comparator and a capacitor-based voltage-to-time converter (VTC), which are essential building blocks in ADCs and PLLs. Evaluation results show beyond-FinFET comparison speed and enhanced linearity for the proposed NCFET-based clocked comparator and VTC, respectively. Such improvement is achieved by exploiting the steeper slope and increased output impedance of NCFETs. More details on design details and a discussion are provided in this article.

41 citations

Journal ArticleDOI
TL;DR: In this paper, an impedance transformer with ultra-high impedance transforming ratio (UHITR) is presented, which is obtained by controlling coupling coefficients of cascaded open-circuited coupled lines.
Abstract: An impedance transformer (IT) with a ultra-high impedance transforming ratio (UHITR) is presented in this letter. The UHITR is obtained by controlling coupling coefficients of cascaded open-circuited coupled lines. Two transmission poles have appeared in the passband for an under-matched region. For the validation, the IT with impedance transforming ratio of 10 was designed at a center frequency $(f_{0})$ of 2.6 GHz. From the experiment, insertion and return losses at $f_{0}$ were determined as 0.55 dB and 21.47 dB, respectively. Within the operating band from 2.515 to 2.73 GHz, the insertion and return losses were better than 0.8 dB and 18 dB, respectively. The out-of-band suppression characteristics are higher than 20 dB from dc to 1.92 GHz and better than 18 dB from 3.28 to 7.2 GHz.

41 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202347
2022140
2021182
2020285
2019366
2018377