scispace - formally typeset
Search or ask a question
Topic

Output impedance

About: Output impedance is a research topic. Over the lifetime, 11185 publications have been published within this topic receiving 134949 citations.


Papers
More filters
Journal ArticleDOI
TL;DR: In this article, a translinear current conveyor-based sinusoidal oscillator is proposed to generate output current equal-amplitude signals that are equally spaced in phase (N being even or odd).
Abstract: A new electronically tunable current-mode multiphase sinusoidal oscillator based on translinear current conveyors is presented. The proposed oscillator circuit, which employs only one translinear current conveyor and one grounded capacitor for each phase, can generate arbitrary N output current equal-amplitude signals that are equally spaced in phase (N being even or odd), all at high output impedance terminals. The frequency of oscillation and the condition of oscillation can be controlled electronically and independently through the bias current of the translinear current conveyor. The proposed structure also has simple circuitry, low-component count, and is highly suitable for integrated circuit implementation. The theoretical results were verified by PSPICE simulation. In addition, the modification of the N sinusoidal oscillators to construct a programmable multiphase oscillator is also discussed.

56 citations

Journal ArticleDOI
TL;DR: In this paper, a 2-mode transduction system was proposed to obtain a wider detection bandwidth for a resonant gravitational wave detector, where the resonant amplification is realized by means of a resonator with a mechanical mode plus an electrical matching network.
Abstract: Along with peak sensitivity, an important parameter of a resonant gravitational wave detector is its bandwidth. In addition to the obvious advantage of making the detector more sensitive to short bursts, a wider bandwidth would allow, for instance, details of the signal emitted during a supernova gravitational collapse or the merger of compact binaries to be resolved [1]. Moreover, a wider bandwidth reduces the uncertainty in the burst arrival time [2] and consequently, with a detector network, permits a more precise source location and a higher efficiency of spurious events rejection [3]. The introduction of a mechanically resonant transducer, a standard practice in actual resonant detectors, has greatly improved the coupling between the bar and the amplifier, but the bandwidth is intrinsically limited [4], and in practice, according to the full width at half maximum (FWHM) definition applied to the two minima of the Shh strain noise spectra, values of a few Hz have been achieved [5]. The use of multimode resonant transducers should permit further improvements of the detector bandwidth [6]. This approach has been studied [7] in depth and a few 2-mode transducer prototypes have been realized [8] or are under development [9] to obtain 3mode operation of the resonant mass detectors. This Letter describes how a wider detection bandwidth can be obtained with an alternative 2-mode transduction system in which the resonant amplification is realized by means of a resonant mechanical mode plus a resonant electrical matching network. It also describes the key tests performed on the components of the transduction system in order to verify the achievement of the requirements set by analysis of the detector model. Figure 1 shows the electromechanical scheme of a cryogenic detector with a resonant capacitive transducer read by a SQUID amplifier. The matching transformer couples the output impedance of the transducer (a capacitance of a few nF) to the input impedance of the SQUID (a small

56 citations

Patent
16 Oct 2002
TL;DR: In this article, a combiner with dual parallel signal amplifiers feeding it is used to amplify amplitude and phase modulated signals, depending on how these two signals are combined, the resulting output of the combiner is amplitude modulated.
Abstract: Circuits and methods for use in amplifying amplitude and phase modulated signals. A circuit uses a combiner with dual parallel signal amplifiers feeding it. The signal amplifiers have a low output impedance while the combiner does not provide any isolation between its inputs from the signal amplifiers. As in other Chireix architectures, the signals from the signal amplifiers are phase modulated prior to being fed to the combiner. The combiner then combines these two signals and, depending on how these two signals are combined, the resulting output of the combiner is amplitude modulated. The signal amplifiers may be Class D or Class F amplifiers to provide high efficiency amplification of the signals.

56 citations

Journal ArticleDOI
TL;DR: An uncertainty and disturbance estimator (UDE)-based robust droop controller is proposed to address problems of nonlinearity and uncertainty in conventional droop control methods, and results from a single-phase system with two inverters are provided.
Abstract: Conventional droop control methods cannot achieve accurate proportional reactive power sharing, due to the mismatch of components, system disturbances, etc. In this paper, an uncertainty and disturbance estimator (UDE)-based robust droop controller is proposed to address these problems. As a result, the model nonlinearity and uncertainty (e.g., power angle and uncertain output impedance) and system disturbances (e.g., variations of output impedance, load change, and fluctuating dc-link voltage) can be estimated and compensated. Experimental results from a single-phase system with two inverters are provided to demonstrate the effectiveness of the proposed strategy. In order to further demonstrate the advantage and flexibility of the proposed UDE-based control strategy, simulation results from a three-phase system with two inverters are presented with comparison to a robust droop control strategy reported.

56 citations

Patent
21 Jan 2005
TL;DR: A disclosed amplifier and buffer circuit, for example for a linear voltage regulator, comprises an input gain stage, an integrator and a unity-gain output stage, which enables stable operation over a broad range of output capacitance.
Abstract: A disclosed amplifier and buffer circuit, for example for a linear voltage regulator, comprises an input gain stage, an integrator and a unity-gain output stage. An output stage compensation scheme enables stable operation over a broad range of output capacitance. For low to moderate output capacitance, the design of the output stage effectively pushes the output pole to high frequencies while an internal pole provided by the integrator is dominant and rolls off the gain at lower frequencies. For high output capacitance, an input impedance of the buffer couples the internal pole and output pole, such that the output pole becomes dominant while the internal pole gets pushed to higher frequencies, maintaining stability. This input impedance connection may utilize the base-emitter resistance of a bipolar junction transistor connected to the internal node, or the connection may use an MOS transistor and a separate RC circuit.

56 citations


Network Information
Related Topics (5)
Capacitor
166.6K papers, 1.4M citations
90% related
Voltage
296.3K papers, 1.7M citations
89% related
Amplifier
163.9K papers, 1.3M citations
87% related
Capacitance
69.6K papers, 1M citations
86% related
CMOS
81.3K papers, 1.1M citations
84% related
Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202347
2022140
2021182
2020285
2019366
2018377