Showing papers on "Overhead (computing) published in 1980"

Guaranteed Response Times in a Hard-Real-Time Environment

Abstract: This paper describes a scheduling algorithm for a set of tasks that guarantees the time within which a task, once started, will complete. A task is started upon receipt of an external signal or the completion of other tasks. Each task has a rxed set of requirements in processor time, resources, and device operations needed for completion of its various segments. A worst case analysis of task performance is carried out. An algorithm is developed for determining the response times that can be guaranteed for a set of tasks. Operating system overhead is also accounted for.

A Cordic Arithmetic Processor Chip

Abstract: A monolithic processor computes products, quotients, and several common transcendental functions. The algorithms are based on the well-known principles of "CORDIC," but recourse to a subtle novel corollary results in a scale factor of unity. Compared to older machines, the overhead burden is significantly reduced. Also, expansion of the functional repertoire beyond the circular domain, i.e., addition to the menu of hyperbolic and linear operations, is a relatively trivial matter, in terms of both hardware cost and execution time. A bulk CMOS technology with conservative layout rules is used for the sake of high reliability, low-power consumption, and good cycle speed.

Packet Switching in Radio Channels: New Conflict-Free Multiple Access Schemes

Abstract: We study new access schemes for a population of geographically distributed data users who communicate with each other and/or with a central station over a multiple-access broadcast ground radio packet-switching channel. We introduce and analyze alternating priorities (AP), round robin (RR), and random order (RO) as new conflict-free methods for multiplexing buffered users without control from a central station. These methods are effective when the number of users is not too large; as the number grows, a large overhead leads to a performance degradation. To reduce this degradation, we consider a natural extension of AP, called minislotted alternating priorities (MSAP) which reduces the overhead and is superior to fixed assignment, polling, and known random access schemes under heavy traffic conditions. At light input loads, only random access schemes outperform MSAP when we have a large population of users. In addition, and of major importance, is the fact that MSAP does not require control from a central station.

An Approach to Concurrent Control Flow Checking

Abstract: A control flow checking scheme capable of detecting control flow errors of programs resulting from software coding errors, hardware malfunctions, or memory mutilation during the execution of the program is presented. In this approach, the program is partitioned into loop-free intervals and a database containing the path information in each of the loop-free intervals is derived from the detailed design. The path in each loop-free interval actually traversed at run time is recorded and then checked against the information provided in the database, and any discrepancy indicates an error. This approach is general, and can detect all uncompensated illegal branches. Any uncompensated error that occurs during the execution of a loop-free interval and manifests itself as a wrong branch within the loop-free interval or right after the completion of execution of the loop-free interval is also detectable. The approach can also be used to check the control flow in the testing phase of program development. The capabilities, limitations, implementation, and the overhead of using this approach are discussed.

On non-linear free vibrations of an elastic cable

Abstract: The effect of non-linear terms in the equations of motion on the first normal modes of the oscillations of an elastic flexible cable under the action of gravity is studied. The non-linear equations are derived and approximate solutions are found by the Ritz-Galerkin method. A numerical example is given and the significance of the results is discussed with regard to the galloping oscillations of overhead transmission lines.

Concurrent Search and Insertion in AVL Trees

Abstract: This paper addresses the problem of concurrent access to dynamically balanced binary search trees. Specifically, two solutions for concurrent search and insertion in AVL trees are developed. The first solution is relatively simple and is intended to allow several readers to share nodes with a writer process. The second solution uses the first as a starting point and introduces additional concurrency among writers by applying various parallelization techniques. Simulation results used to evaluate the parallel performance of these algorithms with regard to the amount of concurrency achieved and the parallel overhead incurred are summarized.

A processor for a high-performance personal computer

Abstract: This paper describes the design goals, micro- architecture, and implementation of the microprogrammed processor for a compact high performance personal computer. This computer supports a range of high level language environments and high bandwidth I/O devices. Besides the processor, it has a cache, a memory map, main storage, and an instruction fetch unit; these are described in other papers. The processor can be shared among 16 microcoded tasks, performing microcode context switches on demand with essentially no overhead. Conditional branches are done without any lookahead or delay. Microinstructions are fairly tightly encoded, and use an interesting variant on control field sharing. The processor implements a large number of internal registers, hardware stacks, a cyclic shifter/masker, and an arithmetic/logic unit, together with external data paths for instruction fetching, memory interface, and I/O, in a compact, pipe-lined organization.The machine has a 50 ns microcycle, and can execute a simple macroinstruction in one cycle; the available I/O bandwidth is 640 Mbits/sec. The entire machine, including disk, display and network interfaces, is implemented with approximately 3000 MSI components, mostly ECL 10K; the processor is about 35% of this. In addition there are up to 4 storage modules, each with about 300 16K or 64K RAMS and 200 MSI components, for a total of 8 Mbytes. Several prototypes are currently running.

A CORDIC Arithmetic Processor Chip

Abstract: A monolithic processor computes products, quotients, and several common transcendental functions. The algorithms are based on the well-known principles of "CORDIC," but recourse to a subtle novel corollary results in a scale factor of unity. Compared to older machines, the overhead burden is significantly reduced. Also, expansion of the functional repertoire beyond the circular domain, i.e., addition to the menu of hyperbolic and linear operations, is a relatively trivial matter, in terms of both hardware cost and execution time. A bulk CMOS technology with conservative layout rules is used for the sake of high reliability, low-power consumption, and good cycle speed.

The Implementation of Fast Radix 2 Transforms on Array Processors

Abstract: Methods of implementing fast radix 2 transforms on array processors are considered. The complexity of arithmetic and data routing operations is analyzed for the methods given. It is shown that all methods give an O(P) speed-up in the arithmetic operations for a P processor array. However the methods incur an overhead in data organization. Theorems are presented that prove one method to be superior in minimizing this overhead for transforms of length N > P.

Transition machine - a general purpose computer

Abstract: A general purpose computing machine utilizing a hardware executive system controller for reducing software system overhead. The computing machine has a uniprocessor embodiment which enhances system throughput and a multiprocessor embodiment which may be tailored to achieve a high level of concurrent processor operation. The computing machine utilizes a novel programming structure tailored to the machine architecture by separating data transformation tasks from control statements and performing the data transformation task at the processor level while performing the control task in the hardware executive.

High-performance raster graphics for microcomputer systems

Abstract: A frame buffer architecture is presented that reduces the overhead of frame buffer updating by three means. First, the bit-map memory is (x,y) addressable, whereby a string of pixels can be accesse...

Overhead Storage Considerations and a Multilinear Method for Data File Compression

Abstract: The paper is concerned with the reduction of overhead storage, i.e., the stored compression/decompression (C/D) table, in field-level data file compression. A large C/D table can occupy a lage fraction of maim memory space during compression and decompression, and may cause excessve page swapping in virtual memory systems. A two-stage approach is studied, including the reuired additional C/D table decompression time. It appears that the approach has limitations and is not completely satisfactory.

Incorporating System Overhead in Queuing Network Models

Abstract: Multiclass queuing network models of multiprogramming computer systems are frequently used to predict the performance of computing systems as a function of user workload and hardware configuration. This paper examines three different methods for incorporating operating system overhead in multiclass queuing network models. The goal of the resultant model is to provide an accurate account of the processing performance and the system CPU overhead of each of the several different types of jobs (batch, timesharing, transaction processing, etc.) that together make up the multiprogramming workload. The first method introduces an operating sysbtm workload consisting of a fixed number of jobs to represent system CPU overhead processing. The second method extends the jobs' CPU service requests to include explicitly the CPU overhead necessary for system processing. The third method employs a communicating set of user and system job classes so that the CPU overhead can be modeled by switching jobs from user to system class whenever they require system CPU service. The capabilities and accuracy of the three methods are assessed and compared against performance and overhead data measured on a Univac 1110 computer.

The lazy repairman and other models: Performance collapse due to overhead in simple, single-server queuing systems

Abstract: We consider two simple models of overhead in batch computer systems and demand access communications systems. The first, termed “modified M/M/1/K, ” is an exponential, single-server queuing system with finite storage capacity, constant arrival rate, and queue-length-dependent service time. We consider cases in which the expected service time consists of a constant plus a term that grows linearly or logarithmically with the queue length. We show that the performance of this system—as characterized by the expected number of customers in the system, the expected time in the system, and the rate of missed customers—can collapse as the result of small changes in the arrival rate, the overhead rate, or the queue capacity. The system has the interesting property that increasing the queue capacity can decrease performance. In addition to equilibrium results, we consider the dynamic behavior of the model. We show that the system tends to operate in either of two quasi-stable modes of operation—one with low queue lengths and one with high queue lengths. System behavior is characterized by long periods of operation in both modes with abrupt transitions between them. We point out that the performance of a saturated system may be improved by dynamic operating procedures that return the system to the low mode. In the second model, termed the “lazy repairman, ” the single server has two distinct states: the “busy” state and the “lazy” state. Customers receive service only when the server is in the busy state; overhead is modeled by attributing time spent in the lazy state to overhead functions. When the expected time spent in the lazy state increases with the number of customers waiting for service, the behavior of the lazy repairman model is similar to the modified M/M/1/K, although the lazy repairman model makes it easier to study in detail the effects of overhead.

Multiivirtual data processing system

Abstract: PURPOSE:To avoid occurrence of the overhead in the multi-virtual data processing system by preserving the common region on TLB and then repealing the user region in case the virtual space is switched. CONSTITUTION:For the entry on TLB, the display is given as V-bit ''1'' (effective) and C-bit ''1'' (common region). In case the virtual space is switched, the entry on TLB must be registered again. In this connection, the entries are once repealed collectively. In this case, however, the entry whose C-bit is ''1'' is made effective, and thus the entry corresponding to the common region is kept effective. Thus, the time can be saved more than when the registering is given again after all entries are repealed, avoiding occurrence of the overhead.

Profile cutting machine

Abstract: A machine for cutting a profile into the respective ends of a flat rectangular piece of rubberized material having a clamping table with an overhead reciprocating carriage that has a rotating profile cutter that cuts an interlocking profile at a single pass into such material.

A crash tolerant b-tree data structure for database retrieval systems

Abstract: The B-tree data structure is the standard mechanism used to index direct access files. While reliability is a concern for the entire industry, no one had yet examined the effects on the B-tree structure when a system is abnormally terminated. Furthermore, while several variant B-tree structures have been proposed, they have not been fully explored in terms of their reliability in the face of system failure. This thesis addresses these two questions, and proposes a B'-tree structure which allows both the detection and the correction of damage caused by abnormal termination. The programs which update secondary stored B-trees are shown to contain critical paths. If a program crashes while executing within a critical path, the B-tree either loses indices or produces duplicated indices that are temporarily inaccessible. It is shown that there is no way to protect the standard B-tree structure from this kind of failure. A new B'-tree structure is proposed that allows error detection and recovery at negligible cost. The new structure differs from the standard B-tree by the inclusion of three additional fields: Median(x); Nephew(x); and Successor(x). The Nephew field is only used as a reference during error detection and is never traversed. The new B'-tree structure permits timely detection of crash damage and provides enough additional information to restart the update that caused the damage. The cost in storage and time complexity of the B'-tree protection scheme is shown to be negligible. The increase in storage for an order m B'-tree is 0(1/m) over its order m B-tree counterpart (practical values of m exceed 100). From the viewpoint of extra time, the protected update algorithms are essentially free, although there is a slightly increased overhead for key deletion. Neither error detection nor error recovery, however, increase the number of I/O operations beyond those that would normally occur. The B'-tree structure is potentially useful in large data bases and information retrieval systems. It may also serve as a partitioning mechanism for organizing k-d trees on secondary storage, and to protect them from crash. This partitioning also allows the application of heuristics that improve insertion efficiency, heretofore a major drawback to using the k-d tree. Since the k-d structure provides excellent lower performance bounds for range and nearest neighbor queries, their data base application would seem a profitable investigation.

Page replacement algorithm for large‐array manipulation

Abstract: The Least Recently Used (LRU) method is the technique that is most often used for a page replacement algorithm. However, LRU may not be an effective method for some large-array manipulation. A method for solving this problem is presented in this paper. In this method, the Operating System (OS) automatically detects loops that are not suitable for the LRU method. There is no necessity to modify application programs nor any additional overhead as long as sufficient real memory is provided. Therefore this method is most suitable for practical use. It functions on the basis of information about the relationship between the working set size and the window size, and indication of whether the detected page fault is caused by an instruction fetch or an operand fetch, etc. The results of experiments and improvements are also shown.

Stochastic modeling in computer graphics

Abstract: A recurrent problem in generating realistic pictures by computers is to represent natural irregular objects and phenomena without undue time or space overhead. We develop a new and powerful solutio...

Control Overhead—A Performance Metric for Evaluating Control-Unit Designs

Abstract: The basic goal in the design of computer control units is the efficient, high-speed allocation, orchestration, and synchronization of the computer resources. The key concept to meeting the above requirements is the continual optimization of the control structure during the design process. This paper defines an approach to control optimization which is independent of the particular control structure.