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Showing papers on "p–n junction published in 1971"


Journal ArticleDOI
TL;DR: Germanium was used to dope both the n and p layers of GaAs grown when molecular beams containing Ge, Ga, and As2 simultaneously impinged on the substrate surface.
Abstract: Germanium was used to dope both the n and p layers of GaAs grown when molecular beams containing Ge, Ga, and As2 simultaneously impinged on the substrate surface. The formation of n‐ or p‐type layers is dependent on the ratio of As2/Ga in the molecular beam and the substrate temperature. We describe the process used for the doping as well as the photoluminescence spectra from these layers.

96 citations


Journal ArticleDOI
TL;DR: In this paper, an approximate but general theory for p-n junctions with almost arbitrary impurity gradients is developed, and its results are within about 25 percent of those previously obtained for the special cases of ideal step and exponentially graded junctions.
Abstract: Minority-carrier lifetime in a forward-biased asymmetrical p-n junction diode can be measured by observing the time response of the diode to a sudden reversing step voltage. An approximate but general theory for p-n junctions with almost arbitrary impurity gradients is developed, and its results are within about 25 percent of those previously obtained for the special cases of ideal step and exponentially graded junctions. A relatively simple experimental technique is described which is suitable for measuring lifetimes down to less than 1 ns. Measurements at extreme ambients are facilitated by the fact that the test diode is mounted at the end of a single coaxial line which can be arbitrarily long. The raw data from the experiment are in the form of an oscilloscope trace, which provides an immediate qualitative and semiquantitative indication of the minority-carrier lifetime and the penetration length for the injected carriers. A graphical presentation of the theoretical results leads quickly to a more precise quantitative evaluation of these parameters. In addition, the technique can be used to measure an average junction depletion capacitance and the device series resistance.

46 citations


Journal ArticleDOI
TL;DR: In this article, highconductivity n−type ZnSe implanted with Li ions gives evidence of type conversion when tested by thermal probe measurements, and the photovoltaic effect, current rectification, and lowvoltage electroluminescence were observed in diodes fabricated from implanted material.
Abstract: High‐conductivity n‐type ZnSe implanted with Li ions gives evidence of type conversion when tested by thermal probe measurements. Photovoltaic effect, current rectification, and low‐voltage electroluminescence were observed in diodes fabricated from implanted material.

42 citations


Patent
W George1, J Price1
19 Mar 1971
TL;DR: In this article, an improved junction field effect transistor with dielectric isolation was proposed, which allowed the use of a single gate for the control of the current from the source to the drain of the device.
Abstract: There is disclosed an improved junction field effect transistor with dielectric isolation as opposed to isolation by PN junction techniques. The use of the dielectric isolation lowers parasitic capacitance and permits the use of a single gate for the control of the current from the source to the drain of the device. The use of a single gate and the dielectric isolation prevents this parasitic capacitance and the concomitant reduction of the frequency response of the device by eliminating the need for a large area second gate which generates the unwanted parasitic capacitance. In the two gate embodiment of the subject invention, the second gate area is minimized so as to minimize the parasitic capacitance. The gain of the subject device is increased by internally connecting the two gates with a deep diffused region therebetween. There is further disclosed a method for making junction field effect transistors such that the channel width is accurately controlled.

34 citations


Journal ArticleDOI
TL;DR: In this article, the laser operation of In1−xGaxP (x∼0.27) p−n junctions is demonstrated at 4.2 and 77°K.
Abstract: The laser operation of In1−xGaxP (x∼0.27) p‐n junctions is demonstrated at 4.2 and 77°K. The n‐type material for the junctions is grown at a fixed temperature (900–950°C) from an In solution with the InP and GaP source crystal introduced into the solution at slightly higher temperature. The p‐n junctions are formed at 700°C by Zn diffusion from an In + 10% Zn source. In comparison with InP, the threshold currents for In1−xGaxP junctions are large, which is attributed to the problems associated with introducing Zn into the In–Ga sublattice.

33 citations


Patent
C Henry1, H Kukimoto1
12 Nov 1971
TL;DR: In this paper, a modified photocapacitance technique was used to determine the deep level impurity concentration, as a function of distance from a P-N junction in a semiconductor, using a sequence of operations involving a source of incident monochromatic optical radiation of different wavelengths.
Abstract: The deep level (''''trap'''') impurity concentration, as a function of distance from a P-N junction in a semiconductor, is determined by a modified photocapacitance technique. This technique utilizes a sequence of operations involving a source of incident monochromatic optical radiation of different wavelengths (for emptying or filling a predetermined proportion of the deep levels of their captured charge carriers) and involving a cycling of a reverse voltage bias applied to the junction. The difference in electrical capacitance of the junction as measured before and after the optical irradiation of the junction, as a function of reverse voltage bias, is a measure of the concentration of deep levels as a function of distance from the P-N junction. The deep level concentration on both the P and the N side of the junction can thereby be determined.

20 citations


Journal ArticleDOI
TL;DR: In this article, the minority-carrier diffusion length on either side of a GaP pn junction was determined from measurements of the short-circuit current under uv excitation.
Abstract: The minority‐carrier diffusion length on either side of a GaP p‐n junction have been determined from measurements of the short‐circuit current under uv excitation. The uv lines at 3.41 and 3.53 eV are extracted from an Ar laser and are focused to a spot 10 μ in diameter. The uv spot is scanned along the angle‐lapped surface of the junction to obtain the variation of short‐circuit current as a function of distance normal to the junction from which the diffusion length is derived. The technique provides a determination of diffusion lengths as short as 0.13 μ with an accuracy of 15%. The technique is straightforward and should be useful in the evaluation of GaP and other semiconductor material containing p‐n junctions.

13 citations


Patent
W Heywang1, G Winstel1, K Zschauer1
06 Oct 1971
TL;DR: In this paper, a semiconductor diode for an injection laser characterized by a pn junction which has a lower threshold value for the diode current and/or which diode is capable of continuous operation at room temperature or above.
Abstract: A semiconductor diode for an injection laser characterized by a pn junction which has a lower threshold value for the diode current and/or which diode is capable of continuous operation at room temperature or above. The radiation producing range or zone of the pn junction has a variation in the concentration of doping with the variation being spatial and periodic. Variations have a maximum concentration of doping in a range of about 1016 through 1020 parts per cubic centimeter, a ratio of maximum concentration to minimum concentration of at least 2:1, and a distance between maximum concentrations, in the order of between 10 and 500 atomic distances in the lattice of the crystal. The variations in the concentration of the doping provides one or more interference bands in the forbidden band located between the conduction band and the valence band. An interference band is adjacent the edge of either the valence or the conduction band and the doping substance is selected in such a way that the transition probability for transit between the conduction band or valence band and the adjacent interference band is essentially larger than for inter-band recombination. To produce the semiconductor material for the diode, the doping material concentration is varied during the growth of the crystal. For example, if the crystal is grown from a gas phase by an epitaxial deposition, the concentration of doping material in the gas phase is varied with respect to the desired periodicity and with respect to the speed and time for the growth of the crystal. If the crystal is formed by epitaxial deposition of the material from the liquid phase, the variation in doping is caused by variations in the cooling speed with respect to the speed of the growth of the crystal. The periodic doping can be varied also by selection of the rate of cooling by selection of speed of rotation and by excentricity of the crystal pulled from a melt or by growing the crystal with a spiraling growth.

13 citations


Patent
29 Dec 1971
TL;DR: In this article, the diffusion of the junction and oxidation of the surface take place concurrently in a single heating step which takes place after the step of cutting or etching mesas in the semiconductor structure.
Abstract: A novel method for producing improved PN junctions of the diffusion type, having wide applicability in the field of semiconductor devices. PN junctions produced by the method of this invention possess superior characteristics, including reduced leakage, higher breakdown voltage and reduced surface inversion effects. The present invention substantially reduces the level of contaminants which, heretofore, were typically trapped in the vicinity of PN diffusion junctions, adversely affecting the quality of the junctions. In this novel method, diffusion of the junction and oxidation of the surface take place concurrently in a single heating step which takes place after the step of cutting or etching mesas in the semiconductor structure.

13 citations


Patent
P Castrucci1, E Grochowski1, M Hess1, G Maheras1, W North1 
22 Feb 1971
TL;DR: In this paper, a monolithic integrated circuit structure composed of the monocrystalline semiconductor substrate having a surface crystallographic orientation substantially parallel to a plane with a plurality of semiconductor devices within the substrate is described.
Abstract: A method for fabricating a semiconductor device which is composed of a monocrystalline semiconductor body having a surface crystallographic orientation substantially parallel to a plane and having a PN junction formed in the body. The body has an insulator coating, such as silicon dioxide, over the PN junction. The surface state density at the semiconductorinsulator interface is very low. This low density is believed to be a reason for the increased beta in the oriented material semiconductor device. Further, the device has a low defect density and few dopant precipitate sites even at high dopant levels. A monolithic integrated circuit structure composed of the monocrystalline semiconductor substrate having a surface crystallographic orientation substantially parallel to a plane with a plurality of semiconductor devices within the substrate is described. The devices may be isolated from one another by PN junctions. The tolerance in a given isolated device, between the PN junction and the nearest region having a different conductivity is less then approximately 0.3 mils. This very close spacing allows substantially greater compactness of semiconductor devices within a monocrystalline semiconductor body than has ever been previously accomplished.

12 citations


Patent
T Sujide1, T Wada1, S Nakanama1
10 Feb 1971
TL;DR: A semiconductor memory element for use in a memory device having high speed data read out is provided on a substrate of an opposite conductivity as mentioned in this paper, where a first electrode is in ohmic contact with the semiconductor region and a second electrode is coupled to the region through a rectifying barrier such as a Schottky barrier or a PN Junction
Abstract: A semiconductor memory element for use in a memory device having high speed data read out A semiconductor region of one conductivity type is provided on a substrate of an opposite conductivity A first electrode is in ohmic contact with the semiconductor region and a second electrode is coupled to the semiconductor region through a rectifying barrier such as a Schottky barrier or a PN Junction

Patent
Ross Bernd1
18 May 1971
TL;DR: In this paper, an integral semiconductor diode laser is designed for increased heat-dissipation efficiency. But the diode element is sandwiched between, and is integral with, layers of semi-insulating semiconductor material.
Abstract: An integral semiconductor diode laser designed for increased heat-dissipation efficiency. A diode element is sandwiched between, and is integral with, layers of semiinsulating semiconductor material. Opposed cleaved surfaces are provided on the device cutting across the diode PN junction and defining a laser cavity through which the PN junction extends. In preparation, a layer of high conductivity semiconductor material is disposed integral with a layer of semiinsulating semiconductor material and the semiinsulating material is grooved to expose portions of the surface of the high conductivity material. Semiconductor material of one conductivity type is then deposited on the exposed high conductivity material, followed by the provision of semiconductor material of opposite conductivity type to form PN junctions within the grooves. The top surface is then lapped to provide coplanarity between the semiinsulating and diode element materials. Electrical contacts are then disposed on the top, coplanar surface and bottom, high conductivity surface.

Journal ArticleDOI
S.C. Choo1
TL;DR: In this article, exact numerical solutions have been obtained for a practical diffused-junction silicon diode at forward bias voltages such that the current through the diode is mainly governed by space-charge recombination.
Abstract: Exact numerical solutions have been obtained for a practical diffused-junction silicon diode at forward-bias voltages such that the current through the diode is mainly governed by space-charge recombination. A comparison has been made of these solutions with the analytical solutions based on the representation of the diffused junction by a linearly-graded junction. It is shown that, as applied to the linearly-graded junction, the Sah-Noyce-Shockley theory of space-charge recombination, which assumes a linear electrostatic potential variation across the space-charge region, gives closed-form solutions which agree to within ∼ 40 per cent with the exact numerical solutions over the range of bias voltages considered. Considerably better agreement, to within ∼ 15 per cent, can be obtained, however, by employing in the calculation of the recombination rate, an improved electrostatic potential distribution resulting from the first iteration of the linearized Poisson's equation as given in Sah's linearly-graded-junction theory. In this case, the solution for the recombination current is no longer available in closed form; however, it can be readily obtained by a simple numerical integration.

Journal ArticleDOI
TL;DR: In this article, the radial light intensity Br across a diode with an outer annular contact with calculated values shows reasonable agreement if a linear relationship between Br and J r is assumed, and the voltage losses in the thick, fully contacted region are estimated and shown to be very small.
Abstract: For some diodes such as pn junction lamps, one region is normally only partially contacted and bounded by a very shallow junction. This can cause considerable voltage losses across the face of the forward biased junction and hence a fall in current density flow into the junction. This current density is calculated for diodes of circular geometry for (i) central circular, and (ii) outer annular contact to the thin region as a function of radial distance, the other region being fully contacted at the back. The current density is assumed to be given by J r = J 0 exp (qV/βkT) where V is the variable local forward bias voltage which results in the thin region being a resistive transmission line with an exponential leakage to ground. Analytic solutions are obtained for J r and these are plotted for realistic geometries and diode parameters. Comparisons of measured values of radial light intensity Br across a diode with an outer annular contact with calculated values shows reasonable agreement if a linear relationship between Br and J r is assumed. In addition to the current I0 flowing into the active area of the diode, the current injected beneath the contact to the thin region, whose resulting light emission is obscured, is also calculated. The voltage losses in the thick, fully contacted region are estimated and shown to be very small.

Patent
I Kalish1, H Khajezadeh1
07 Jun 1971
TL;DR: An improved zener diode for monolithic integrated circuits includes a first diffused region of one type conductivity having two portions, one of which portions has a significantly higher maximum impurity concentration than the other portion as discussed by the authors.
Abstract: An improved zener diode for monolithic integrated circuits includes a first diffused region of one type conductivity having two portions, one of which portions has a significantly higher maximum impurity concentration than the other portion. A second diffused region of opposite type high conductivity is disposed within both portions of the first region and is separated from each by a PN junction, the PN junction between the second region and the lower conductivity portion being at a significantly greater depth than the PN junction between the second region and the high impurity concentration portion. The electrical contact to the second region is made only over the lower impurity concentration portion where the PN junction is at a significantly greater depth.

Journal ArticleDOI
TL;DR: The voltage intercept of the inverse capacitance squared versus voltage curve, for reverse and slight forward bias, has been measured for a variety of alloyed p-n junction diodes made in two ways as discussed by the authors.
Abstract: The voltage intercept of the inverse capacitance squared versus voltage curve, for reverse and slight forward bias, has been measured for a variety of alloyed p-n junction diodes made in two ways : normally, so that the substrate was the weakly doped side of the junction ; and abnormally, so that the alloyed aide of the junction was the more weakly doped. Junction capacitance measurements indicate that the intercept varies only with effective weak-side doping concentration. Results are compared with various theoretical expressions from the literature, and also (favourable) to a new approach which considers the ‘ middle ’ of the junction capacitor to be the intrinsic point (zero not mobile charge) rather than the metallurgical junction.

Patent
23 Feb 1971
TL;DR: In this article, a semiconductor arrangement is described in terms of a first conductivity body largely formed of a material of the opposite conductivity type, and appropriate means are provided to apply a voltage across this PN junction so as to create a space charge region which extends for a distance therefrom.
Abstract: A semiconductor arrangement includes a semiconductor body largely formed of a material of a first conductivity type. Within this material of the first conductivity type a first zone is formed of material of the opposite conductivity type so as to form a PN junction, and appropriate means are provided to apply a voltage across this PN junction so as to create a space charge region which extends for a distance therefrom. Also within the material of the first conductivity type is formed a second zone of material of the opposite conductivity type. The second zone is spaced at such a distance from the PN junction that it will be contacted by the space charge region under appropriate conditions. Appropriate means are provided to give an indication of such a contact of the second zone.

Patent
05 Apr 1971
TL;DR: In this article, a high Q microalloy varactor having an abrupt PN junction and a Q in the order of 50-100 at 1 GHZ was constructed by using a shallow N type conductivity epitaxial region.
Abstract: A high Q microalloy varactor having an abrupt PN junction and a Q in the order of 50-100 at 1 GHZ, and the following method for constructing the same. A shallow N type conductivity epitaxial region is deposited atop a low resistivity N + type conductivity parent wafer. A plurality of aluminum dots is provided over the N type conductivity region, and the structure is sintered at 700*C in an inert atmosphere to form, under each aluminum dot, a multiplicity of microscopic masses of P conductivity type. Thereafter, a portion of the epitaxial region is etched away to define a mesa structure. In a subsequent heating step a highly uniform P growth region is formed beneath each aluminum dot by the process of alloy regrowth, thereby forming an abrupt PN junction. Additional etching, heating, passivation, annealing, and dicing steps are all carried out.

Patent
Coleman M1, Ctrodes1
06 Oct 1971
TL;DR: In this article, an electro optical device comprising a single body of semi-insulating semiconductor material having a semi insulating semiconductivity of approximately 108 ohm-centimeters, preferably gallium arsenide.
Abstract: There is disclosed an electro optical device comprising a single body of semi insulating semiconductor material having a semi insulating semiconductivity of approximately 108 ohm-centimeters, preferably gallium arsenide. Gallium arsenide in this conductivity range exhibits a photo conductivity characteristic in which there is a relatively linear variance of resistivity with impinging photons. A PN junction is formed in one portion of the substrate and, responsive to electric signals applied across the junction, emits photons affecting the resistivity of the semi insulating layer. Contact to the photo resistive layer can be connected in a circuit as either a switch or a variable resistor, depending upon the level of signals applied across the PN junction.

Patent
08 Feb 1971
TL;DR: In this article, a semiconductor diode was proposed in which a zone of another conductance type was inserted into the surface of the zone of one conductance and a ring-shaped region of the other conductance was enclosed by a ring shape.
Abstract: In a semiconductor diode in which a zone of another conductance type is inserted into the surface of a zone of one conductance type, the zone of the other conductance type is enclosed by a ring-shaped region of the other conductance type, the depth of penetration of the ring-shaped region being less than the depth of penetration of the zone of the other conductance type. Due to appropriate doping of the ring-shaped region only the middle portion of the PN junction which possesses a curvature, participates in the electrical breakdown. The semiconductor diode according to the present invention has improved characteristic data.

Journal ArticleDOI
TL;DR: In this article, the continuity equation for the minority carriers, considering the actual field variation in the diffused region of a photodiode with a complementary-error function impurity distribution, has been solved in terms of a power series.
Abstract: The continuity equation for the minority carriers, considering the actual field variation in the diffused region of a photodiode with a complementary-error-function impurity distribution, has been solved in terms of a power series. The essential parameters, such as excess minority-carrier profile, short-circuit current, surface loss and collection efficiency have been calculated.

Journal ArticleDOI
TL;DR: In this paper, a technique is described for fabricating a novel type of cold cathode comprising an array of electron emitters formed from a single p-n junction of silicon carbide.
Abstract: A technique is described for fabricating a novel type of cold cathode comprising an array of electron emitters formed from a single p-n junction of silicon carbide. Two methods are described for developing emission from such a cathode, one of which involves running the cathode under reverse bias and the other heating under forward bias. The latter method appears more suitable for collectively activating a multi-emitter cathode, since it enables a high level of emission to be obtained in a relatively short time. The former method is slow and attempts to increase the rate of activation result in breakdown of the emitting elements. The effectiveness of these two methods has been assessed in terms of the emission and junction characteristics. Life tests show the activated cathode to be remarkably stable, although it is found to exhibit appreciable but reversible changes in emission level in the presence of certain contaminants.

Journal ArticleDOI
TL;DR: In this paper, a small-signal analysis of a p-n junction in breakdown is presented, where the space charge region consists of two layers, one a constant avalanche multiplication layer and the other a drift layer.
Abstract: A small-signal analysis of a p-n junction in breakdown is presented. The space-charge region consists of two layers, one a constant avalanche multiplication layer and the other a drift layer. The ionization rates and drift velocities for electrons and holes are considered to be different but the respective ratios are assumed to be constant and independent of field within the normal range of operation of the diode. The diode admittance and negative Q are plotted against frequency for silicon, germanium and GaAs for two structures having avalanche regions of different widths including one resembling a Read-type structure.

Journal ArticleDOI
TL;DR: In this article, the authors measured the delay time before the onset of second breakdown at the collector-base junctions of four types of silicon n-p-n planar transistors and found that the dependence of delay time on input power was found to obey a relationshiop of the form pτn = constant.
Abstract: The delay time before the onset of second breakdown was measured at the collector-base junctions of four types silicon n-p-n planar transistors The dependence of delay time on input power was found to obey a relationshiop of the form pτn = constant The value of n increased slightly, and the value of the constant decreased, with decreasing collector doping For all four types of transistors, n was close to 05, and when a curve of the form pτ12 = constant was fitted to the experimental data, the constant could be related to the temperature at which the collector impurity concentration becomes equal to the intrinsic carrier concentration

Patent
16 Sep 1971
TL;DR: The FLIP-FLOP as discussed by the authors is a semiconductor laser diode with two opposite parallel mirror end faces normal to its PN junction, which can be formed in a single semiconductor wafer by applying an optical pulse to one of the mirror faces.
Abstract: A semiconductor laser diode has two opposite parallel mirror end faces normal to its PN junction. With a forward current flowing through the PN junction, the application of an optical pulse to one of the mirror faces causes a sustained coherent light to be emitted through the other mirror face. When a coherent light from a similar diode falls upon the first diode, the latter terminates its emission. The pulse is again applied to the first diode to emit the coherent light from it. Thus both diodes form a FLIP-FLOP. Those two diodes may be formed in a single semiconductor wafer.

Patent
W Kraft1
15 Mar 1971
TL;DR: A low ohmic contact for a semiconductor device is made to a pconductivity type region by diffusing some n conductivity type phosphorous into said region before the contact metal is applied to said region.
Abstract: A low ohmic contact for a semiconductor device is made to a pconductivity type region by diffusing some n conductivity type phosphorous into said region before the contact metal is applied to said region. The amount of phosphorous is kept at a minimum to prevent the formation of an unwanted pn junction.

Patent
30 Jun 1971
TL;DR: In this article, a continuous groove is formed extending from a major surface of the semi-conductor body through the junction and terminating in the high resistivity layer, which is inclined to an axis normal to the major surface so that the part of the high resistance layer enclosed by it decreases in cross-section towards the bottom of the groove.
Abstract: 1,237,414 Semi-conductor devices TOKYO SHIBAURA ELECTRIC CO Ltd 15 Nov, 1968 [11 April, 1968], No 54316/68 Heading H1K In a semi-conductor device comprising a PN junction between high and low resistivity layers a continuous groove is formed extending from a major surface of the semi-conductor body through the junction and terminating in the high resistivity layer The groove is inclined to an axis normal to said major surface so that the part of the high resistivity layer enclosed by it decreases in cross-section towards the bottom of the groove The silicon controlled rectifier shown in Fig 1 is made by diffusing gallium into a high resistivity N type wafer 3 to form a P type layer into which a gold-antimony member 6 is alloyed to form N type cathode zone 5 After ultrasonically bonding gate wire 7 to the P type layer adjacent the cathode and aluminium soldering tungsten anode 8 to the P layer on the other face the wafer periphery is rendered conical by blasting with an air jet containing entrained alumina particles while rotating the body Then groove 9 is similarly cut using a suitably angled jet If desired the wafer face on which the cathode is formed is depressed at its centre Another embodiment consists of a bilateral 5 zone switch with its outermost zones short circuited to the neighbouring inner zones by the anode and cathode contacts (Fig 5, not shown) The function of the groove is to increase the breakdown voltage of the junction

Patent
22 Feb 1971
TL;DR: In this paper, the use of minority carrier storage effect in the PN junction between the base and collector of a transistor by suitably and selectively switching potentials applied to the base, emitter and collector is discussed.
Abstract: Writing and read-out are accomplished by use of minority carrier storage effect in the PN junction between the base and collector of a transistor by suitably and selectively switching potentials applied to the base, emitter and collector of the transistor. In addition the potential application across the base-emitter junction is influenced by the stored minority carriers so that the current flowing between the collector and emitter may be controlled, and a longer retention of information is permitted. A single transistor element stores a single bit of information.

Patent
13 Oct 1971
TL;DR: In this paper, a transistor is formed in a Si wafer of N conductivity material consisting of a collector, base, and emitter base junctions, and the oxide mask also passivates the surface portions of the junctions.
Abstract: 1,249,812. Semi-conductor devices. FERRANTI Ltd. 13 May, 1970 [29 May, 1969], No. 27138/69. Heading H1K. A transistor 10 formed in a Si wafer of N conductivity material comprises a N conductivity collector 11, a P conductivity base 12 adjacent a major surface 13, and a N conductivity emitter 14 extending to the surface; the base and emitter being formed by diffusion through a Si oxide mask 15. The collector, base, and emitter base junctions comprise depletion layers 16, 17, and the oxide mask also passivates the surface portions of the junctions. Annular and circular apertures 18, 19 for base and emitter contacts are etched through the oxide layer, and a gold collector electrode 20 is provided on opposite face 21. The oxide layer 15 tends to lower the resistivity of the surface of annular portion 22 of the collector, and to diminish the thickness of the surface portions of the collector-base junction depletion layer, but base contact 23 in aperture 18 is connected to a field electrode 24 on the oxide layer overlying the collector portions 22, which is maintained at a potential difference thereto, producing an electric field across the oxide layer and counteracting the reduction in thickness of the depletion layer. This increases the breakdown value of the collector-base junction. The base and emitter contacts 23, 25 in apertures 18, 19 and the field electrode 24 are formed by selectively etching an aluminium layer deposited on the apertured oxide layer 15, and the field electrode 24 is connected to base contact 23 by a narrow aluminium neck or a small diameter wire 26 spanning a minor part of the surface of the depletion layer of PN junction 16, to avoid instability thereof.

Journal ArticleDOI
TL;DR: In this paper, the small signal admittance characteristics of a narrow diffused p-n junction diode with gaussian and complementary error function impurity profile are obtained through a piecewise exponential approximation of the non-homogeneously doped region, which effectively takes into account the built-in field and mobility variations.
Abstract: The small signal admittance characteristics of a narrow diffused p-n junction diode with gaussian and complementary error function impurity profile are obtained through ‘piecewise exponential approximation’ of the non-homogeneously doped region, which effectively takes into account the built-in field and mobility variations. The results show that a single exponential model usually assumed for the evaluation of diffused devices results in an overestimate of the admittance parameters specially when there is considerable grading of impurities. When the diffused region is narrow the surface recombination velocity characterizing the non-ideality of the contact has significant influence on the admittance parameters. It is seen that the contributions to the admittance from the diffused and homogeneous regions are comparable in magnitude.