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Showing papers on "p–n junction published in 1982"


Patent
23 Sep 1982
TL;DR: A Field Emitter Array comprising a semiconductor substrate with an emitter surface formed by a plurality of emitter pyramids for emitting an electron current is described in this paper, where the magnitude of the electron current emitted by each emitter pyramid is controlled by a reverse-biased p-n junction associated with each pyramid.
Abstract: A Field Emitter Array comprising a semiconductor substrate with an emitterurface formed thereon A plurality of emitter pyramids is disposed on the emitter surface for emitting an electron current The magnitude of the electron current emitted by each emitter pyramid I max , is controlled by a reverse-biased p-n junction associated with each emitter pyramid where I max =j sat X A p-n , j sat being the saturation current density and A p-n being the area of the reverse-biased p-n junction associated with each emitter pyramid A grid, positively biased relative to the emitter surface and the emitter pyramids, is disposed above the emitter surface for creating an electric field that induces the emission of the electron current from the emitter tips

147 citations


Patent
15 Apr 1982
TL;DR: In this article, a new method of semiconductor operation has been conceived, developed and applied to produce a revolutionary new semiconductor design, which is that of merging depletion regions for purposes of operation, isolation and control of channel current in a junction field-effect transistor.
Abstract: A new method of semiconductor operation has been conceived, developed and applied to produce a revolutionary new semiconductor design. The method is that of merging depletion regions for purposes of operation, isolation and control of channel current in a junction field-effect transistor. Using this method depletion regions are made to merge with suitable biasing in an intervening layer interposed between the gate and channel of a junction field-effect device and the interaction of the depletion regions is used for isolation and coupling to alter the associated depletion region in the channel of the junction field-effect device. A number of embodiments are disclosed of the new junction field-effect transistor controlled by merged depletion regions. In each embodiment a channel of one conductivity type material is formed in a semiconductor body of opposite type material. A gate region of the same conductivity type material as the channel is placed near enough to the channel so that when the gate junction is reversed bias, the gate depletion region merges with the channel junction depletion region in the intervening layer. When the two depletion regions have merged, the gate controls the channel current in a manner similar to conventional devices. Because the output and input and control connections are of the same conductivity type material, no metal contacts or interconnections are required. The lack of need for metal interconnects makes the device better suited to integrated circuits than any other device. In addition, the depletion regions surrounding the gate and channel isolate the gate and channel from other semiconductor regions of the same conductivity type and thus isolation regions are not required for the junction field-effect transistor controlled by mergers depletion regions. Consequently, use of the invention can result in the densest form of logic available today. Such devices hold the promise of improved performance in almost every semiconductor device application and can be used in almost every application where MOS and junction field-effect devices are now used.

88 citations


Journal ArticleDOI
Federico Capasso1
TL;DR: In this article, a channeling avalanche photodiode (APD) is proposed, where electrons and holes are spatially separated and impact ionize in layers of different band gap.
Abstract: A novel avalanche photodiode (APD) concept, the channeling APD, is proposed. Using a new interdigitated p-n junction structure, electrons and holes are spatially separated and impact ionize in layers of different band gap. Thus the effective ionization-rates ratio can be made extremely high (κ = α/β > 100), while maintaining a high gain, by a proper choice of the band gap difference. In the limit of large κ, this device mimics a channeltron photomultiplier. This structure can be fabricated using most III-V lattice matched heterojunctions, including long-wavelength materials for fiber-optical communications ( 1.3 \leq \lambda µm). The design of three channeling APD's using Al 0.45 Ga 0.55 As/ GaAs, InP/In 0.53 Ga 0.47 As, and AlAs 0.08 Sb 0.92 /GaSb heterojunctions is discussed in detail. Other important features of this structure are the unique capacitance-voltage characteristic, which may be important in varactor diode applications, and the interdigitized geometry which allows the depletion of large volumes of semiconductor materials doped to levels as high as 1017/cm3. This novel semiconductor device may find interesting applications also for FET's and integrated p-i-n-FET receivers and may be used for studies of high-field transport phenomena (e.g., drift velocities) over a wide range of electric fields.

55 citations


Patent
16 Feb 1982
TL;DR: In this article, a light emitting diode is manufactured in such a manner than an N type Ga0.7Al0.3As layer and a PN junction is formed between layers 12 and 13 by liquid phase epitaxial growth.
Abstract: PURPOSE:To improve light emitting efficiency and the characteristics of modulation by a method wherein a PN junction of a light emitting diode is prepared through liquid-phase epitaxial growth, and a semi-insulating semiconductor layer and an active layer of a FET are formed through a molecular beam epitaxial method in the semiconductor device controlling the light emitting output of the diode by the input signals of the FET connected in series. CONSTITUTION:The light emitting diode is manufactured in such a manner than an N type Ga0.8Al0.2As layer 12 and a P type Ga0.9Al0.1 As layer 13 are laminated and deposited on an N type GaAs substrate 11 through the slide board type liquid-phase epitaxial growth method and the PN junction is formed between the layers 12 and 13. A P type Ga0.7Al0.3As layer 14 is further grown on the layer 13 in a liquid phase in order to decrease contact resistance. The element is admitted into another device and grown through the molecular beam epitaxial growth method, but an N type or undoped GaAs layer 15 is shaped previously in order to prevent contact with air and the discontinuance of the layer 14 at that time. A GaAs layer 16 is grown through the molecular epitaxial growth method and used as the semi-insulating semiconductor layer, and an N type CaAs layer 17 functioning as the active layer of the FET is grown on the layer through the same method.

42 citations


Patent
12 May 1982
TL;DR: In this paper, a new solar cell structure is provided which will increase the efficiency of polycrystalline solar cells by suppressing or completely eliminating the recombination losses due to the presence of grain boundaries.
Abstract: A new solar cell structure is provided which will increase the efficiency of polycrystalline solar cells by suppressing or completely eliminating the recombination losses due to the presence of grain boundaries. This is achieved by avoiding the formation of the p-n junction (or other types of junctions) in the grain boundaries and by eliminating the grain boundaries from the active area of the cell. This basic concept can be applied to any polycrystalline material; however, it will be most beneficial for cost-effective materials having small grains, including thin film materials.

37 citations


Patent
03 Mar 1982
TL;DR: In this article, an additional N + region is provided in a P type substrate adjacent to a protective N + resistor region with an insulating layer and metal layer interposed between the N+ region and the resistor region.
Abstract: An additional N + region is provided in a P type substrate adjacent to a protective N + resistor region with an insulating layer and metal layer interposed between the N + region and the N + resistor region. The N + resistor region, the oxide layer, the polysilicon layer and N + region constitute an MOS transistor, respectively corresponding to a drain region, a gate insulating layer, a gate electrode and a source region of the MOS transistor. When a very high excessive voltage that otherwise would destroy the PN junction between the substrate and the resistor region is applied to the input terminal, the MOS transistor is rendered conductive and the excessive voltage is absorbed.

31 citations


Patent
22 Feb 1982
TL;DR: In this article, a gate protection element is formed of a polycrystalline silicon layer which is provided on the base region through an insulating film and includes at least one pn junction.
Abstract: A semiconductor integrated circuit device is provided to include a vertical type MOSFET and a gate protection element for the MOSFET. The vertical type MOSFET is made up of a silicon layer of n-type conductivity formed on an n+ -type silicon substrate, a base region of p-type conductivity formed in the surface of the silicon layer of n-type conductivity, an n+ -type source region provided in the base region, and a gate electrode formed on a portion of the base region through a gate insulating film. The silicon substrate serves as the drain. The gate protection element is formed of a polycrystalline silicon layer which is provided on the base region through an insulating film and includes at least one pn junction. By virtue of forming the gate protection element over the base region rather than directly over the substrate, a more stable operation is achieved.

25 citations


Journal ArticleDOI
TL;DR: In this paper, the first channeling photodetector with an ultralow capacitance (≂0.06 pF) was reported. But the operation of this photodiode was limited to very low power levels (20 pW).
Abstract: We report on the operation of the first channeling photodetector. This device can be operated as an ultrahigh sensitivity photocapacitive detector; large capacitance variations (≂1 pF) have been induced by very low power levels (≂20 pW). In addition this structure may be used as a low punch through voltage pin photodiode with an ultralow capacitance (≂0.06 pF) largely independent of the detector area and of the doping level of the layers. Finally this device represents the first step towards the implementation of the recently disclosed low noise avalanche photodiode with separated electron and hole avalanche regions.

24 citations


Patent
06 Aug 1982
TL;DR: In this article, a method for making contact to a narrow width PN junction region in any desired semiconductor body is described, where a substantially vertical conformal conductive layer is formed over the desired PNP junction region.
Abstract: A method for making contact to a narrow width PN junction region in any desired semiconductor body is described. A substantially vertical conformal conductive layer is formed over the desired PN junction region. The body is heated at a suitable temperature to cause a dopant to diffuse from the vertical conductive layer into the semiconductor body to form the narrow width PN junction region. A substantially horizontal conductive layer makes contact to the substantially vertical layer so as to have the horizontal conductive layer in electrical contact to the PN junction region. Electrical contact can be made to the horizontal conductive layer at any convenient location. A lateral PNP transistor is one type of very small device that can be made using the method of the present invention.

23 citations


Patent
10 Sep 1982
TL;DR: A diode having a Schottky barrier which permits bidirectional passage of minority carriers as well as majority carriers through the provision of a Bidirectional conducting Schittky electrode was introduced in this paper.
Abstract: A diode having a Schottky barrier which permits bidirectional passage of minority carriers as well as majority carriers through the provision of a bidirectional conducting Schottky electrode that substitutes for the conventional Schottky electrode used in Schottky diodes or for the low-high electrode in Pn junction diodes.

22 citations


Journal ArticleDOI
TL;DR: In this article, the authors derived a simple expression for the capacitance C(V) associated with the transition region of a p-n junction under a forward bias by phenomenological reasoning.
Abstract: The derivation of a simple expression for the capacitance C(V) associated with the transition region of a p-n junction under a forward bias is derived by phenomenological reasoning. The treatment of C(V) is based on the conventional Shockley equations, and simpler expressions for C(V) result that are in general accord with the previous analytical and numerical results. C(V) consists of two components resulting from changes in majority carrier concentration and from free hole and electron accumulation in the space-charge region. The space-charge region is conceived as the intrinsic region of an n-i-p structure for a space-charge region markedly wider than the extrinsic Debye lengths at its edges. This region is excited in the sense that the forward bias creates hole and electron densities orders of magnitude larger than those in equilibrium. The recent Shirts-Gordon (1979) modeling of the space-charge region using a dielectric response function is contrasted with the more conventional Schottky-Shockley modeling.

Journal ArticleDOI
TL;DR: In this paper, an expression for the forward current induced open circuit voltage decay of a p-n junction diode with a finite base width is derived, including the effects of recombination in the emitter and the built-in drift field in the base which may arise due to a nonuniform impurity profile.
Abstract: An expression for the forward current induced open circuit voltage decay of a p‐n junction diode with a finite base width is derived. The expression includes the effects of recombination in the emitter and the built‐in drift field in the base which may arise due to a nonuniform impurity profile. The voltage decay rate is dependent on the base thickness, base drift field, emitter dark saturation current, the effective surface recombination velocity at the back contact, and the minority carrier lifetime in the base. The effects of the drift field in the emitter, emitter lifetime, and surface recombination velocity at the emitter surface are completely taken into account by the emitter saturation current. Experimentally observed voltage decay plots for thin base hyperabrupt varactor diodes with retrograded impurity gradients in the base are reported. It is shown that the experimental results can be interpreted satisfactorily using the above theory. The values of the minority‐carrier lifetime in the base are determined from the experimental results.

Journal ArticleDOI
P.J. Anthony1
TL;DR: In this article, the effects of the electric fields at p-n junctions were investigated and shown to significantly alter diffusion behavior near the junction at the growth temperature, and thus affect dopant uniformity and junction placement for some commonly occurring epitaxial growth conditions.
Abstract: Concentration profiles of diffusing species in semiconductors are calculated including the effects of the electric fields at p-n junctions. The junction electric field can significantly alter diffusion behavior near the junction at the growth temperature, and thus affect dopant uniformity and junction placement for some commonly occurring epitaxial growth conditions. The junction electric field affects diffusion in the same manner as the internal electric field that results from a dopant concentration gradient. The field can produce diffusion profiles with either enhanced or retarded diffusion rates at the junction and pile-up or depletion of the diffusing species near the junction. Several experimental examples for diffusion of Mg across a p-n junction in (Al, Ga). As during growth by liquid phase epitaxy are presented.

Journal ArticleDOI
TL;DR: In this article, an analytic expression for the tempoerature coefficient of the open circuit voltage has been derived in general, which may be applied to different kinds of p−n junction solar cells.
Abstract: An analytic expression for the tempoerature coefficient of the open‐circuit voltage has been derived in general, which may be applied to different kinds of p‐n junction solar cells. Based on the dominance of the saturation dark current density, the simplified expression have also been developed and justified by experimental measurements. It has been shown that the negative temperature coefficient of the open‐circuit voltage is decreased with the increasing light level and the interaction between minority carriers and the high‐low junction. Hence, the temperature coefficient of the open circuit voltage is good measure for providing a guide to test the effectivness of a high‐low junction in a back‐surface‐field (BSF) solar cell. Moreover, based on the measured temperature coefficient of the open‐circuit voltage from the BSF solar cells fabricated on thin epitaxial substrate, a new method for measuring the effective energy‐gap narrowing in the highly doped emitter has been proposed and studied. It has shown that the effective energy‐gap narrowing measured is in good agreement with the eempirical expression proposed by Slotboom.

Journal ArticleDOI
TL;DR: In this paper, a model for a polycrystalline thin film silicon p-n junction solar cell with preferential doping along the grain boundaries was introduced and detailed numerical calculations have been done for the effect of doping depths along grain boundaries on the performance of the cell under AM1 conditions.
Abstract: A model has been introduced for a polycrystalline thin film silicon p-n junction solar cell with preferential doping along the grain boundaries. Detailed numerical calculations have been done for the effect of doping depths along the grain boundaries, for different grain sizes, on the performance of the cell under AM1 conditions. The results indicate that preferential doping of grain boundaries leads to significant improvement of the cell performance.

Patent
18 Nov 1982
TL;DR: In this paper, the problem of short-wavelength diffusion-tail response is avoided by interposing between the window and active layers a barrier layer of higher bandgap than that of the window layer, which prevents high-energy photocarriers generated in the window layers from diffusing to the PN junction.
Abstract: A heterojunction photodiode with improved wavelength-selectivity and risetime. The problem of short-wavelength diffusion-tail response is avoided by interposing between the window and active layers a barrier layer of higher bandgap than that of the window layer, which prevents high-energy photocarriers generated in the window layer from diffusing to the PN junction. In one embodiment, n-type substrate, active, barrier, and window layers are initially grown, and the window layer is coated with an opaque oxide. A window is opened in the oxide layer, and a p-type dopant is diffused heavily through the opening, through the window layer, and partly into the barrier layer. A PN junction is thus formed in the barrier layer, its depletion region extending through the remaining n-type region of the barrier layer and into the active layer, where photocarriers are generated by photons passing through the window-opening.

Journal ArticleDOI
TL;DR: In this article, an ion implantation technique was developed for the simultaneous formation of a shallow Si p−n junction and a shallow silicide/Si ohmic contact, where a p−Si substrate was coated with a thin layer of W, then with alternating layers of Si and W.
Abstract: An ion implantation technique has been developed for the simultaneous formation of a shallow Si p‐n junction and a shallow silicide/Si ohmic contact. A p‐Si substrate is coated with a thin layer of W, then with alternating layers of Si and W. Bombardment of the coated substrate with As+ ions causes formation of WSi2 from the W and Si layers, dispersion of contaminant atoms at the interface between the first W layer and the substrate, and implantation of As atoms in the substrate. Subsequent thermal annealing produces a shallow WSi2/Si ohmic contact and simultaneously activates the implanted As donors to form a shallow p‐n junction located directly below the contact. Mesa diodes with good junction characteristics have been fabricated by using this technique.

Journal ArticleDOI
TL;DR: In this paper, the forward current voltage, the forward rate of change of junction voltage with temperature, and the reverse capacitance voltage characteristics of a pn junction were measured using three simple experimental exercises suitable for one or more laboratory periods.
Abstract: This paper describes three simple experimental exercises suitable for one or more laboratory periods in which the students measure the forward current voltage, the forward rate of change of junction voltage with temperature, and the reverse capacitance voltage characteristics of a pn junction. Using these data the students determine the energy band gap of the semiconductor, the diffusion potential, the ideality factor, and the degree of abruptness of the junction. For these experiments we use junctions fabricated with Ge, Si, GaAs0.6P0.4, and GaP semiconductors. For each of these semiconductors the measured energy band gap is found to be within 5% of the accepted values and the measured junction parameters are consistent with expected values.

Journal ArticleDOI
TL;DR: In this paper, the minority-carrier diffusion length in the base region of p+−n (n+−p) junction solar cells has been deduced from the relative spectral response in the long wavelength.
Abstract: The minority-carrier diffusion length in the base region of p+−n (n+−p) junction solar cells has been deduced from the relative spectral response in the long wavelength. The doping and temperature dependences of minority-carrier diffusion length have also been characterized. It has been shown that the minority-carrier diffusion length is slightly increased with increasing temperature and is decreased with increasing doping concentration. Based on the known minority-carrier diffusivity as functions of doping concentration and temperature, the doping and temperature dependences of minority-carrier lifetimes have been deduced. It has been verified that the empirical relationship between minority-carrier lifetime and doping concentration deduced by other method is in good agreements with our experimental measurements. Moreover, it has been shown that the minority-carrier lifetime is increased with increasing temperature, which is consistent with that measured by the open-circuit voltage decay (OCVD) method.

Journal ArticleDOI
TL;DR: In this paper, the drift current density components J cp and J cn in the n-type heavily doped emitter region of p−n+ junction silicon solar cells at 300 K were investigated using the simplified models of heavily-doped semiconductors proposed in previous papers.

Patent
01 Jul 1982
TL;DR: In this article, the induced photo current flowing around the short circuit interacts with the magnetic field so as to bend the filament, forming a connection with one or more adjacent fixed contacts.
Abstract: An electrical contact unit comprises a flexible semiconductor, e.g. silicon, filament carrying contacts and having a shorted pn junction. The filament is mounted in a magnetic field. When light is directed on to the junction, e.g. from an optical fiber, the induced photo current flowing around the short circuit interacts with the magnetic field so as to bend the filament so as to establish connection with one or more adjacent fixed contacts.

Patent
30 Jul 1982
TL;DR: In this paper, a semiconductor device for controlling a current comprises a pn junction formed of a high resistivity region and a relatively low resistivity regions, a graded distribution of dislocation density is formed in the high resistivities region and decreases with an increase in distance from the pn junctions.
Abstract: A semiconductor device for controlling a current comprises a pn junction formed of a high resistivity region and a relatively low resistivity region, a graded distribution of dislocation density is formed in the high resistivity region and decreases with an increase in distance from the pn junction, also graded distribution of lifetime killer concentration is formed in the high resistivity region and decreases with an increase in distance from the pn junction in correspondence with the graded distribution of dislocation density

Journal ArticleDOI
TL;DR: In this article, general analytic solutions for static current-voltage characteristics of quasineutral regions of nonilluminated semiconductor bipolar devices under the following assumptions are presented: (a) the quasinutral region has a graded shallow-level impurity concentration producing a constant built-in electric (drift) field; (b) minority carriers injected into this region stay at concentrations low enough to avoid violation of low-injection conditions; (c) the minority-carrier lifetime of this region depends on position in accordance with a power-law dependence on the shallow
Abstract: We present general analytic solutions for static current‐voltage characteristics of quasineutral regions of nonilluminated semiconductor bipolar devices under the following assumptions: (a) the quasineutral region has a graded shallow‐level impurity concentration producing a constant built‐in electric (drift) field; (b) minority carriers injected into this region stay at concentrations low enough to avoid violation of low‐injection conditions; (c) the minority‐carrier lifetime of this region depends on position in accordance with a power‐law dependence on the shallow‐level donor concentration, a dependence that is consistent with the longest minority‐carrier lifetimes measured and with the physical chemistry of divacancy‐donor reactions at high temperatures. The solutions presented are apparently the first that include assumption (c). Modified Bessel functions of the first and second kind appear in these solutions. From a pheonomenological standpoint, the solutions may account for defect centers associate...

Patent
24 Jun 1982
TL;DR: An irradiation-stable, temperature-compensated Zener diode and a process for producing the diode was described in this article. But the process was not described in detail.
Abstract: An irradiation-stable, temperature-compensated Zener diode and a process for producing the Zener diode. The diode includes a first pn junction having metallic impurities diffused into the corresponding type n region, a second pn junction with a type n region differing from that of the first pn junction, the two junctions being interconnected so that the first junction is forward-biased while the second junction is reversed-biased. Two metal layers acting as electrical contacts are deposited on each p region and there are two insulating layers.

Patent
Yannis Tsividis1
10 May 1982
TL;DR: In this paper, each pair of PN junction diodes (D,; D2) is separately dynamically biased by a different clocked current source arrangement (C1, M2; C2, M5).
Abstract: Each of a pair of PN junction diodes (D,; D2) is separately dynamically biased by a different clocked current source arrangement (C1, M2; C2, M5). The resulting diode voltage drops (V1 and V2) are fed through a weighted difference amplifier (A; C3, C4, C5, C6) to produce a voltage reference VOUT which is relatively insensitive to temperature variations of the semiconductor body in which the PN junction diodes are integrated.

Journal ArticleDOI
TL;DR: In this article, a high injection theory of open circuit voltage decay in a p - n junction diode is given, which takes into account the saturation of junction voltage at high injections and coupling between emitter and base of the diode.
Abstract: A high injection theory of open circuit voltage decay in a p - n junction diode is given. The theory takes into account the saturation of junction voltage at high injections and coupling between emitter and base of the diode. The results are in qualitative agreement with the available experimental results. In particular the theory explains the plateau which has been observed in most experimental results on the open circuit voltage decay at high injections.

Journal ArticleDOI
TL;DR: In this paper, a lateral pnp bipolar transistors have been fabricated using Be implantation to define the emitter and collector areas, which can be adjusted with the annealing temperature and time.
Abstract: Lateral pnp bipolar transistors have been fabricated using Be implantation to define the emitter and collector areas. The base area (1 - 2 µm wide) has been protected against Be ions during implantation by SiO 2 and photoresist. The lateral straggling and diffusion during the anneling process reduces the base width, which can be adjusted with the annealing temperature and time. Between the active n-GaAs layer and substrate, a n-Ga 0.7 Al 0.3 As layer is deposited. The Be ions penetrating the GaAs/GaAlAs interface form a pn junction in the GaAlAs layer below the emitter and collector area. This reduces the current by several orders of magnitude through the parasitic emitter-substrate (base) diode compared to a GaAs pn junction, due to the higher band gap. For these devices with an effective base width of 0.5 µm, a current gain of 10 in common emitter configuration has been obtained.

Journal ArticleDOI
TL;DR: In this paper, a scanning electron microscope (SEM) operating in the elec-tron beam induced current (EBIC) mode has been used to determine the depths and uniformities of p- n junctions in a variety of Pb- salt diode lasers.
Abstract: A scanning electron microscope (SEM) operating in the elec-tron- beam induced current (EBIC) mode has been used to determine the depths and uniformities of p- n junctions in a variety of Pb- salt diode lasers Pb- salt materials with 20K band gap values ranging from 44 meV to 450 meV have been investigated This includes the ternary alloy systems Pb1−xCdxS(with 0 ≤ x ≤ 0048), PbS1-xSex (with 0 ≤ x ≤ l), Pb1−xSnxSe (with O ≤ x ≤ O10),and Pb1-xSnxTe (with x = 025) With typical carrier concentrations in the 1018 – 1019 cm− 3 range, the junction depths were found to be independent of temperature between 77K and 300K Small band gap devices exhibited EBIC signals strongly dependent on T, while devices with band gap values above 130 meV at 77K exhibited relatively little such temperature dependence to 300K This non- destructive technique is capable of providing junction depth and uniformity information of all the Pb-salt materials, and is useful for estimating minority car-rier diffusion lengths at various temperatures The method is also useful for investigating some of the more complex confinement heterostructures in these materials


Journal ArticleDOI
TL;DR: In this article, the p-n junction in a ferroelectric semiconductor has been considered and the behavior singularities of the pyroelectric current in a p n junction has been studied.
Abstract: Properties of the p-n junction in a ferroelectric semiconductor have been considered. In cases where the spontaneous polarization and the p-n junction field are of opposite directions the polarization distribution has two different stable states with a jumping transition between them, the p-n junction capacity showing both temperature and bias voltage hysteresis. In this case the potential distribution is nonmonotone. The behavior singularities of the pyroelectric current in a p-n junction ferroelectric semiconductor have been studied.