Showing papers on "p–n junction published in 2004"

Carbon nanotube p-n junction diodes

Abstract: We demonstrate a single-walled carbon nanotube p-n junction diode device. The p-n junction is formed along a single nanotube by electrostatic doping using a pair of split gate electrodes. By biasing the two gates accordingly, the device can function either as a diode or as an ambipolar field-effect transistor. The diode current–voltage characteristics show forward conduction and reverse blocking characteristics, i.e., rectification. For low bias conditions, the characteristics follow the ideal diode equation with an ideality factor close to one.

Profiling the Thermoelectric Power of Semiconductor Junctions with Nanometer Resolution

Abstract: We have probed the local thermoelectric power of semiconductor nanostructures with the use of ultrahigh-vacuum scanning thermoelectric microscopy. When applied to a p-n junction, this method reveals that the thermoelectric power changes its sign abruptly within 2 nanometers across the junction. Because thermoelectric power correlates with electronic structure, we can profile with nanometer spatial resolution the thermoelectric power, band structures, and carrier concentrations of semiconductor junctions that constitute the building blocks of thermoelectric, electronic, and optoelectronic devices.

Lateral interband tunneling transistor in silicon-on-insulator

Abstract: We report on a lateral interband tunneling transistor, where the source and drain form a heavily doped lateral pn junction in a thin Si film on a silicon-on-insulator (SOI) substrate. The transistor action results from the control of the reverse-bias tunneling breakdown under drain bias VD by a gate voltage VG. We observe gate control over tunneling drain current ID at both polarities of VG with negligible gate leakage. Systematic ID(VG,VD) measurements, together with numerical device simulations, show that in first approximation ID depends on the maximum junction electric field Fmax(VG,VD). Excellent performance is hence predicted in devices with more abrupt junctions and thinner SOI films. The device does not have an inversion channel and is not subject to scaling rules of standard Si transistors.

Universal tunneling behavior in technologically relevant P/N junction diodes

Abstract: Band-to-band tunneling was studied in ion-implanted P/N junction diodes with profiles representative of present and future silicon complementary metal–oxide–silicon (CMOS) field effect transistors. Measurements were done over a wide range of temperatures and implant parameters. Profile parameters were derived from analysis of capacitance versus voltage characteristics, and compared to secondary-ion mass spectroscopy analysis. When the tunneling current was plotted against the effective tunneling distance (tunneling distance corrected for band curvature) a quasi-universal exponential reduction of tunneling current versus, tunneling distance was found with an attenuation length of 0.38 nm, corresponding to a tunneling effective mass of 0.29 times the free electron mass (m0), and an extrapolated tunneling current at zero tunnel distance of 5.3×107 A/cm2 at 300 K. These results are directly applicable for predicting drain to substrate currents in CMOS transistors on bulk silicon, and body currents in CMOS transistors in silicon-on-insulator.

Examination apparatus for biological sample and chemical sample

Abstract: A wireless sensor chip suitable for the compact, high-sensitive, and low-cost examination apparatus for easily examining a biological material such as gene at low cost is provided. A sensor chip is formed on an SOI substrate, and an n type semiconductor layer on which a pMOS transistor is formed and a p type semiconductor layer on which an nMOS transistor is formed are isolated by a pn junction. Therefore, the p type semiconductor layer at the outermost portion (chip edge portion to be in contact with solution) is set to floating, and the maximum potential and the minimum potential of the chip are supplied to an n type semiconductor layer and a p type semiconductor layer inside the outermost portion, respectively. Also, the chip is covered with an ion impermeable insulating film for reducing the penetration of positive ions through the oxide layer.

Experimental analysis and theoretical model for anomalously high ideality factors in ZnO/diamond p-n junction diode

Abstract: High-quality heterojunctions between p-type diamond single-crystalline films and highly oriented n-type ZnO films were fabricated by depositing the p-type diamond single-crystal films on the Io-type diamond single crystal using a hot filament chemical vapor deposition, and later growing a highly oriented n-type ZnO film on the p-type diamond single-crystal film by magnetron sputtering. Interestingly, anomalously high ideality factors (n≫2.0) in the prepared ZnO/diamond p–n junction diode in the interim bias voltage range were measured. For this, detailed electronic characterizations of the fabricated p–n junction were conducted, and a theoretical model was proposed to clarify the much higher ideality factors of the special heterojunction diode.

Semiconductor device containing dielectrically isolated PN junction for enhanced breakdown characteristics

Abstract: A semiconductor device includes a field shield region that is doped opposite to the conductivity of the substrate and is bounded laterally by dielectric sidewall spacers and from below by a PN junction. For example, in a trench-gated MOSFET the field shield region may be located beneath the trench and may be electrically connected to the source region. When the MOSFET is reverse-biased, depletion regions extend from the dielectric sidewall spacers into the “drift” region, shielding the gate oxide from high electric fields and increasing the avalanche breakdown voltage of the device. This permits the drift region to be more heavily doped and reduces the on-resistance of the device. It also allows the use of a thin, 20 Å gate oxide for a power MOSFET that is to be switched with a 1V signal applied to its gate while being able to block over 30V applied across its drain and source electrodes, for example.

High-speed light Modulation in avalanche breakdown mode for Si diodes

Abstract: The light emission process from a p-n junction in the forward-bias region is slow to respond to modulation signals due to the indirect band structure of silicon Experimental results for a reverse-bias region showing light modulation in the range of tens of gigahertz are observed for the first time For such a light emitter, the limiting speed of light modulation is shown to be determined by the transit time of the minority carriers across the junction during the filament formation of breakdown currents, which has been demonstrated by simulation of the propagation of a shockwave-like pattern in the breakdown field

Doping profiles in PN diode optical modulators

Abstract: High speed optical modulators can be made of a lateral PN diode formed in a silicon optical rib waveguide, disposed on a SOI or other silicon based substrate. A PN junction is formed at the boundary of the P and N doped regions. The depletion region at the PN junction overlaps with the center of a guided optical mode propagating through the waveguide. Electrically modulating a lateral PN diode causes a phase shift in an optical wave propagating through the waveguide. Each of the doped regions can have a stepped or gradient doping profile within it or several doped sections with different doping concentrations. Forming the doped regions of a PN diode modulator with stepped or gradient doping profiles can optimize the trade off between the series resistance of the PN diode and the optical loss in the center of the waveguide due to the presence of dopants.

A conjugated polymer pn junction.

Abstract: Dopant counterion diffusion has made the conjugated polymer pn homojunction a challenging target for decades. We report the electrochemical fabrication of a polyacetylene pn homojunction based on internally compensated forms where the dopant counterions are covalently bound to the polymer backbone. After drying under vacuum, the pn junction exhibits diode behavior with the ratio of the forward to reverse current at 2 V being 7. Despite such modest diode behavior, the fabricated pn junction is significant because it demonstrates the utility of internal compensation in the fabrication of metastable interfaces between dissimilarly doped conjugated polymers.

Semiconductor laser apparatus and manufacturing method thereof

Abstract: A semiconductor laser apparatus includes a substrate, a vertical-cavity surface-emitting semiconductor laser diode (VCSEL) including a first and second mirror layers of a first and second conduction types, respectively, an active region between the first and second mirror layers, a first and second electrode layers electrically connected with the first and second mirror layers, respectively, and at least one Zener diode including a first and second semiconductor regions of a first and second conduction types, respectively, and a third and fourth electrode layers electrically connected with the first and second semiconductor regions, respectively. The second semiconductor region is formed in a portion of the first semiconductor region and forms a PN junction with the first semiconductor region. The VCSEL and the Zener diode are formed on the substrate. The first and second electrode layers are electrically connected with the fourth and third electrode layers, respectively.

Solid state imaging device

Abstract: PROBLEM TO BE SOLVED: To provide a solid state imaging device which can minimize a pixel size without reducing a saturated charge quantity (Qs) or without reducing sensitivity. SOLUTION: The solid state imaging device 1 includes a pixel 20 having a photodiode 3 and a transistor and formed on a semiconductor substrate 2, the transistor for constituting the pixel 20 formed on the front surface of the semiconductor substrate, and a pn junction formed between the high density regions of the photodiode 3 provided in the semiconductor substrate 2. Further, the part of the pn junction of this photodiode 3 is formed to extend to the lower part of the transistor formed on the front surface of the semiconductor substrate 2. COPYRIGHT: (C)2005,JPO&NCIPI

Nonpolar a-plane p-type GaN and p-n Junction Diodes

Abstract: Growth and electrical characteristics of Mg-doped p-type nonpolar (112¯0) a-plane GaN films, grown on (11¯02) r-plane sapphire substrates via metalorganic chemical vapor deposition, were investigated as a function of growth rate, the ammonia to trimethylgallium flow ratio (V/III ratio), and the growth temperature. The electrical conductivity of the films exhibited a strong dependence on the growth parameters. Secondary-ion-mass-spectroscopy measurements indicated that more Mg was incorporated at higher growth rate and at lower growth temperatures. The Mg concentration in the films increased linearly with the Mg flow. A maximum hole concentration of 6.8×1017cm−3 was achieved at room temperature for a Mg concentration of 7.6×1019cm−3, corresponding to 0.9% ionization. Further increase in the Mg concentration resulted in increased surface roughness as well as a significant decrease in the hole concentration. p-n junction diodes were fabricated using nonpolar a-plane GaN, and the current-voltage characteristi...

Nanowhiskers with PN Junctions, Doped Nanowhiskers, and Methods for Preparing Them

Abstract: Nano-engineered structures are disclosed, incorporating nanowhiskers of high mobility conductivity and incorporating pn junctions. In one embodiment, a nanowhisker of a first semiconducting material has a first band gap, and an enclosure comprising at least one second material with a second band gap encloses said nanoelement along at least part of its length, the second material being doped to provide opposite conductivity type charge carriers in respective first and second regions along the length of the of the nanowhisker, whereby to create in the nanowhisker by transfer of charge carriers into the nanowhisker, corresponding first and second regions of opposite conductivity type charge carriers with a region depleted of free carriers therebetween. The doping of the enclosure material may be degenerate so as to create within the nanowhisker adjacent segments having very heavy modulation doping of opposite conductivity type analogous to the heavily doped regions of an Esaki diode. In another embodiment, a nanowhisker is surrounded by polymer material containing dopant material. A step of rapid thermal annealing causes the dopant material to diffuse into the nanowhisker. In a further embodiment, a nanowhisker has a heterojunction between two different intrinsic materials, and Fermi level pinning creates a pn junction at the interface without doping.

Semiconductor device and method of manufacturing same

Abstract: A high-speed, low-power-consumption semiconductor device has a thin-film Si layer with a source/drain formed therein. The thin-film Si layer is curved from a region directly below a gate electrode toward a region near the source/drain. The curved thin-film Si layer develops strains in a channel region disposed directly below the gate electrode sandwiched by the source/drain in the thin-film Si layer, for thereby increasing a carrier mobility. A cavity is defined below the curved thin-film Si layer for reducing a parasitic capacitance due to a pn junction.

Design and fabrication of rugged FRED

Abstract: An improved Fast Recovery Diode comprises a main PN junction defining a central conduction region for conducting high current in a forward direction and a peripheral field spreading region surrounding the central conduction region for blocking high voltage in the reverse direction. The main PN junction has an avalanche voltage equal to or lower than an avalanche voltage of the peripheral field spreading region so substantially the entire said main PN junction participates in avalanche conduction. This rugged FRED structure can also be formed in MOSFETS, IGBTS and the like.

Approximate analytical solution to the space charge problem in nanosized Schottky diodes

Abstract: An analysis is given of the space charge region that is induced in a semiconductor by a circular Schottky contact Using the depletion approximation, the resulting free-boundary problem for Poisson’s equation is formulated and approximately solved in oblate spheroidal coordinates Expressions are derived for the boundary of the space charge region and the related depletion potential Calculations of the thickness of the Schottky barrier as a function of the diode size, down to the nanometer range, show good agreement with published results obtained numerically

PN diode optical modulators fabricated in strip loaded waveguides

Abstract: High speed optical modulators can be made of a lateral PN diode formed in a strip loaded optical waveguide on a SOI or other silicon based substrate. A PN junction is formed at the boundary of the P and N doped regions. The depletion region at the PN junction overlaps with the center of a guided optical mode propagating through the waveguide. Electrically modulating a lateral PN diode causes a phase shift in an optical wave propagating through the waveguide. Due to differences in fabrication methods, forming strip loaded waveguides with consistent properties for use in PN diode optical modulators is much easier than fabricating similar rib waveguides.

Light-Emitting Semiconductor Component Comprising a Protective Diode

Abstract: A light-emitting semiconductor component which contains a sequence of semiconductor layers ( 2 ) with an area of p-doped semiconductor layers ( 4 ) and n-doped semiconductor layers ( 3 ) between which a first pn junction ( 5 a, 5 b ) is formed. The pn junction ( 5 a, 5 b ) is subdivided into a light-emitting section ( 7 ) and a protective-diode section ( 8 ) in a lateral direction by means of an insulating section ( 6 ). An n-doped layer ( 9 ), which forms a second pn junction ( 10 ) which acts as a protective diode along with the p-doped area ( 4 ), is applied to the p-doped area ( 4 ) in the area of the protective-diode section ( 8 ), the first pn junction ( 5 b ) in the protective-diode section ( 8 ) having a larger area than the first pn junction ( 5 a ) in the light-emitting section ( 7 ). The protective-diode section ( 8 ) protects the light-emitting semiconductor component from voltage pulses due to electrostatic discharges (ESD).

Lighting or light-receiving semiconductor module and method of its manufacture

Abstract: A semiconductor module comprises twenty five semiconductor devices for example, having photoelectric conversion function and arranged in a 5X5 matrix through an electrical connection mechanism comprising six connection lead, wherein the semiconductor devices, in each column are connected in series and the semiconductor devices, in each row are connected in parallel, Furthermore a positive electrode terminal and a negative electrode terminal are buried in a light transmission member of transparent synthetic resin and project to the outside. The semiconductor device has a diffusion layer a pn junction and one planar face on the surface of a spherical p semiconductor crystal for example wherein a positive electrode, crystal and a negative electrode, facing the positive electrode through the center are formed on the planar face.

Realization of organic pn-homojunction using a novel n-type doping technique

Abstract: We present a novel n-type doping technique for organic semiconductors using the metal complex bis(terpyridine)ruthenium as a strong donor. Owing to its low oxidation potential, the reduced neutral form of the donor complex allows an electron transfer to the matrix. This enables n-type conduction that has been seldom reported in metallophthalocyanine systems doped with organic compounds. The n-type zinc-phthalocyanine layers are characterized by the conductivity and the field-effect measurements. By sequential coevaporation of p- and n-doped layers, we have prepared the first stable and reproducible organic homojunction of zinc-phthalocyanine. The diode exhibits surprisingly high built-in voltage attractive e.g. for organic solar cell applications. The temperature dependence of the current-voltage characteristics does not follow the standard Shockley theory of pn-junctions. We explain the behavior of the ideality factor and the saturation current by deviations from the classical Einstein relation at low temperatures.

Estimating junction temperature of high-flux white LEDs

Abstract: Performance of white light LEDs has improved significantly over the past few years. White LEDs are typically created by incorporating a layer of phosphor over the GaN-based blue emitter. Heat at the p-n junction seems to be the major factor that influences light output degradation in these devices. In an earlier paper, the principal authors of this manuscript demonstrated that the junction temperature of white LEDs could be measured from the (W/B) ratio, where W represents the total radiant energy of the white LED spectrum, and B represents the radiant energy within the blue emission peak. In that earlier study, the concept was verified using commercially available 5-mm type white LEDs. The goal of the study presented here was to evaluate whether the (W/B) ratio could be used to estimate junction temperature of new high-flux white LEDs. The results show that (W/B) ratio is proportional to the junction temperature of the high-flux white LED; however, the proportionality constants are different for the different white LED types.

Polychromatic LED's and related semiconductor devices

Abstract: A semiconductor device is provided comprising a first potential well located within a pn junction and a second potential well not located within a pn junction. The potential wells may be quantum wells. The semiconductor device is typically an LED, and may be a white or near-white light LED. The semiconductor device may additionally comprise a third potential well not located within a pn junction. The semiconductor device may additionally comprise absorbing layers surrounding or closely or immediately adjacent to the second or third quantum wells. In addition, graphic display devices and illumination devices comprising the semiconductor device according to the present invention are provided.

Semiconductor component having a pn junction and a passivation layer applied on a surface

Abstract: The invention relates to a semiconductor component having a semiconductor body (100) and at least one pn junction present in the semiconductor body (100) and an amorphous passivation layer (70) arranged at least in sections on a surface (101) of the semiconductor body (100), the following holding true for the minimum Ds,min of an interface state density Ds at the junction between the passivation layer (70) and the semiconductor body (100): D s , min ≥ N S , Bd E g where NS,Bd is the breakdown charge and Eg is the band gap of the semiconductor material used for the semiconductor body (100).

Bipolar junction transistor and fabricating method

Abstract: A bipolar junction transistor (BJT) includes a dielectric layer formed on a predetermined region of a substrate, an opening formed in the dielectric layer and a portion of the substrate being exposed, a heavily doped polysilicon layer formed on a sidewall of the opening to define a self-aligned base region in the opening, an intrinsic base doped region formed within the substrate and in a bottom of the opening by implanting through the self-aligned base region, a spacer formed on the heavily doped polysilicon layer to define a self-aligned emitter region in the opening, and an emitter conductivity layer being filled with the self-aligned emitter region and a PN junction being formed between the emitter conductivity layer and the intrinsic base doped region.

Photovoltaic Properties of Organic p–n Junction Devices Consisting of Phthalocyanine and n-Type Porphyrin Deposited on an n-Type TiO2 Layer

Abstract: We have investigated the photovoltaic properties of organic p–n junction photovoltaic cells deposited on an n-type TiO2 layer. The p-type and n-type compounds used were donor-like metallo-phthalocyanine (ZnPc or CuPc) and acceptor-like metal-free (or Zn) 5,10,15,20-tetra (4-pyridyl) porphyrin (H2TPyP or ZnTPyP). The p or n-type characteristics of each material were interpreted in terms of the photovoltaic and the rectification properties of the organic semiconductors sandwiched between a wide gap n-type semiconductor TiO2 and Au. The characteristics of materials was summarized as (n-type) H2TPyP > ZnTPyP > CuPc > ZnPc (p-type). We then investigated the photovoltaic properties of an organic p–n junction on TiO2 composed of ITO/TiO2/H2TPyP (x nm)/ZnPc (50 nm)/Au structure. It was found that the photovoltaic properties in this structure were optimized when the thickness of the H2TPyP layer, x, was 6 nm. The quantum efficiency was improved considerably, especially at the Soret band of H2TPyP (x=6 nm). The open circuit voltage VOC was also improved up to 0.7–0.8 V which is larger than the 0.45 V of an ITO/TiO2/ZnPc/Au device.