Showing papers on "p–n junction published in 2010"

Gate-activated photoresponse in a graphene p-n junction

Abstract: We study photodetection in graphene near a local electrostatic gate, which enables active control of the potential landscape and carrier polarity. We find that a strong photoresponse only appears when and where a p-n junction is formed, allowing on-off control of photodetection. Photocurrents generated near p-n junctions do not require biasing and can be realized using submicron gates. Locally modulated photoresponse enables a new range of applications for graphene-based photodetectors including, for example, pixilated infrared imaging with control of response on subwavelength dimensions.

Organic single-crystalline p-n junction nanoribbons.

Abstract: This article focuses on the growth and transport properties of organic single-crystalline p-n junction nanoribbons. The development of organic nanoelectronics requires the fabrication of organic nanometer-sized p-n junctions for high-performance devices and integrated circuits. Here we demonstrate the formation of single-crystalline p-n junction nanoribbons of organic semiconductors by selective crystallization of copper hexadecafluorophthalocyanine (F(16)CuPc, n-type) on copper phthalocyanine (CuPc, p-type) single-crystalline nanoribbons. The crystallization of F(16)CuPc onto CuPc requires several parameters, including similar molecular structures, similar lattice constants, and pi-stacking along the nanoribbon axis. Ambipolar transport of the p-n junction nanoribbons was observed in field-effect transistors with balanced carrier mobilities of 0.05 and 0.07 cm(2) V(-1) s(-1) for F(16)CuPc and CuPc, respectively. A basic p-n junction nanoribbon photovoltaic device showed current rectification under AM 1.5 simulated light. The discrete p-n junction nanoribbons may serve as ideal systems for understanding basic charge-transport and photovoltaic behaviors at organic-organic interfaces.

Controllable p-n Junction Formation in Monolayer Graphene Using Electrostatic Substrate Engineering

Abstract: We investigate electric transport in graphene on SiO2 in the high field limit and report on the formation of p-n junctions. Previously, doping of graphene has been achieved by using multiple electrostatic gates, or charge transfer from adsorbants. Here we demonstrate a novel approach to create p-n junctions by changing the local electrostatic potential in the vicinity of one of the contacts without the use of extra gates. The approach is based on the electronic modification not of the graphene but of the substrate and produces a well-behaved, sharp junction whose position and height can be controlled.

Gate dependent photocurrents at a graphene p-n junction

Abstract: We have used scanning photocurrent microscopy to explore the electronic characteristics of a graphene p-n junction fabricated by local chemical doping of a graphene sheet. The photocurrent signal at the junction was found to be most prominent for gate voltages between the two Dirac points of the oppositely doped graphene regions. The gate dependence of this signal agrees well with simulations based upon the Fermi level difference between the two differently doped sections. It is concluded that the photocurrent maps are dominated by the built-in electric field, with only a minor photothermoelectric contribution.

Assembled Organic/Inorganic p−n Junction Interface and Photovoltaic Cell on a Single Nanowire

Abstract: We have utilized a single organic/inorganic p−n junction nanowire composed of the inorganic semiconductor cadmium sulfide (CdS) and a conducting polymer polypyrrole (PPY) to successfully convert light energy into electricity. The organic/inorganic semiconductor nanowire exhibits a power conversion efficiency of 0.018% under an illumination intensity of 6.05 mW/cm2. The fundamental studies operated here will be helpful to understand photoinduced energy/charge transport in an organic/inorganic interface and might be also serve as promising building blocks for nanoscale power sources for developing nanoscale solar power conversion systems.

Chemical Vapor Deposition of α -Boron Layers on Silicon for Controlled Nanometer-Deep p + n Junction Formation

Abstract: Nanometer-thick amorphous boron (?-B) layers were formed on (100) Si during exposure to diborane (B2H6) in a chemical vapor deposition (CVD) system, either at atmospheric or reduced pressures, at temperatures down to 500°C. The dependence of the growth mechanism on processing parameters was investigated by analytical techniques, such as transmission electron microscopy (TEM) and secondary ion mass spectrometry (SIMS), in conjunction with extensive electrical characterization. In particular, devices fabricated by B deposition effectively demonstrated that p + doping of the silicon substrate can be achieved within 10 nm from the surface in a manner that is finely controlled by the B2H6 exposure conditions. High-quality, extremely ultrashallow, p + n junctions were fabricated, and their saturation current was tuned from high Schottky-like values to low deep pn junction-like values by the increasing of the deposited B layer thickness. This junction formation exhibited high selectivity, isotropy, spatial homogeneity, and compatibility with standard Si device fabrication.

Surface 210 nm light emission from an AlN p–n junction light-emitting diode enhanced by A-plane growth orientation

Abstract: (112¯0) A-plane AlN p–n junction light-emitting diode (LED) with a wavelength of 210 nm is demonstrated. The electroluminescence from the A-plane LED is inherently polarized for the electric field parallel to the [0001] c-axis due to a negative crystal-field splitting energy. The polarization ratio (electric-field component ratio of parallel and perpendicular to c-axis) is as high as 0.9. The radiation pattern of the A-plane LED shows higher emission intensity along the surface normal, while that of a conventional (0001) C-plane LED shows lower emission intensity along the surface normal. The different radiation patterns can be explained by the polarization property.

Vertically arrayed Si nanowire/nanorod-based core-shell p-n junction solar cells

Abstract: Vertically arrayed Si nanowire/nanorod-based core-shell p-n junction solar cells have been fabricated by a solid-state phosphorus diffusion to convert the shell of the boron-doped p-type Si nanowires to n-type, thus forming a core-shell p-n junction structure. The nanowires with a nanosphere defined diameter were fabricated by an Au-film assisted electrochemical etching method, enabling controlled junction formation. The Si nanowire arrays show superior optical properties over a wide range of spectrum. In addition, longer nanowires are more effective for light trapping and absorption which is more advantageous for efficient energy harvesting. The cells show a high energy conversion efficiency of 1.47%, a significant improvement from the previously reported Si nanowire-based core-shell junction solar cells where the core-shell junctions were formed by an oppositely doped Si deposition on preformed Si nanowires. The relatively high efficiency might be mainly attributed to the extremely low reflectivity of t...

Design and Realization of Wide-Band-Gap ( $\sim$ 2.67 eV) InGaN p-n Junction Solar Cell

Abstract: The design of coherently strained InGaN epilayers for use in InGaN p-n junction solar cells is presented in this letter. The X-ray diffraction of the epitaxially grown device structure indicates two InGaN epilayers with indium compositions of 14.8% and 16.8%, which are confirmed by photoluminescence peaks observed at 2.72 and 2.67 eV, respectively. An open-circuit voltage of 1.73 V and a short-circuit current density of 0.91 mA/cm2 are observed under concentrated AM 0 illumination from the fabricated solar cell. The photovoltaic response from the InGaN p-n junction is confirmed by using an ultraviolet filter. The solar cell performance is shown to be related to the crystalline defects in the device structure.

p–n-Junction-Based Flexible Dye-Sensitized Solar Cells

Abstract: In this paper, a new type of flexible working electrode, TiO 2 /Cul/Cu, is reported, in which the p-n junction of TiO 2 -Cul is introduced into dye-sensitized solar cells (DSSCs) for the first time. The devices give a high conversion efficiency of up to 4.73% under 1 sun illumination. The excellent performance is ascribed to the existence of the p-n junction, which forms a single directional pathway for electron transport which benefits the charge separation, and improves the efficiency of the flexible solar cells as a result.

Solar cell, method for manufacturing solar cell, and solar cell module

Abstract: Disclosed is a solar cell which is provided with: a semiconductor substrate having a light-receiving surface and a non-light-receiving surface; a PN junction section formed on the semiconductor substrate; a passivation layer formed on the light-receiving surface and/or the non-light-receiving surface; and power extraction electrodes formed on the light-receiving surface and the non-light-receiving surface. The solar cell is characterized in that the passivation layer includes an aluminum oxide film having a thickness off 40 nm or less. As a result of forming a aluminum oxide film having a predtermined thickness on the surface of the substrate, it is possible to achieve excellent passivation performance and excellent electrical contact between silicon and the electrode by merely firing the conductive paste, which is conventional technology. Furthermore, an annealing step, which has been necessary to achieve the passivation effects of the aluminum oxide film in the past, can be eliminated, thus dramatically reducing costs.

Junction Termination Extension Implementing Drive-in Diffusion of Boron for High-Voltage SiC Devices

Abstract: A novel method of graded junction termination extension (JTE) formation for high-voltage 4H-SiC power devices is presented. Unlike conventional multiimplantation or tapered thickness mask approaches utilizing several photolithography steps, the new termination technique utilizes a single mask with window areas varied laterally away from the main junction, a single-step boron implantation, and drive-in diffusion at elevated temperature. Numerical device simulations have been performed for the initial JTE structure and mask optimization. 4H-SiC p-i-n rectifiers with an active area of 1 mm × 1 mm were fabricated and characterized. The fabricated devices exhibited 2.5-kV blocking voltage, which is close to the theoretical value of an ideal parallel-plane p-n junction.

Current–Voltage Characteristics of Graphane p-n Junctions

Abstract: In contrast to graphene, which is a gapless semiconductor, graphane, the hydrogenated graphene, is a semiconductor with an energy gap. Together with the 2-D geometry, unique transport features of graphene, and the possibility of doping graphane, p and n regions can be defined so that 2-D p-n junctions become feasible with small reverse currents. This paper introduces a basic analysis to obtain the current-voltage characteristics of such a 2-D p-n junction based on graphane. As we show, within the approximation of Shockley's law of junctions, an ideal I-V characteristic for this p-n junction is to be expected.

Shallow-Etch Mesa Isolation of Graded-Bandgap “W”-Structured Type II Superlattice Photodiodes

Abstract: Shallow-etch mesa isolation (SEMI) of graded-bandgap “W”-structured type II superlattice (GGW) infrared photodiodes provides a powerful means for reducing excess dark currents due to surface and bulk junction related processes, and it is particularly well suited for focal-plane array fabrication. In the n-on-p GGW photodiode structure the energy gap is increased in a series of steps from that of the lightly p-type infrared-absorbing region to a value typically two to three times larger. The wider gap levels off about 10 nm short of the doping-defined junction, and continues for another 0.25 μm into the heavily n-doped cathode before the structure is terminated by an n +-doped InAs top cap layer. The increased bandgap in the high-field region near the junction helps to strongly suppress both bulk tunneling and generation–recombination (G–R) current by imposing a much larger tunneling barrier and exponentially lowering the intrinsic carrier concentration. The SEMI approach takes further advantage of the graded structure by exposing only the widest-gap layers on etched surfaces. This lowers surface recombination and trap-assisted tunneling in much the same way as the GGW suppresses these processes in the bulk. Using SEMI, individual photodiodes are defined using a shallow etch that typically terminates only 10 nm to 20 nm past the junction, which is sufficient to isolate neighboring pixels while leaving the narrow-gap absorber layer buried 100 nm to 200 nm below the surface. This provides for separate optimization of the photodiode’s electrical and optical area. The area of the junction can be reduced to a fraction of that of the pixel, lowering bulk junction current, while maintaining 100% optical fill factor with the undisturbed absorber layer. Finally, with the elimination of deep, high-aspect-ratio trenches, SEMI simplifies array fabrication. We report herein results from SEMI-processed GGW devices, including large-area discrete photodiodes, mini-arrays, and a focal-plane array. Current–voltage data show strong suppression of side-wall leakage relative to that for more deeply etched devices, as well as scaling of dark current with junction area without loss of quantum efficiency.

Photoelectrochemical Properties of the p−n Junction in and near the Surface Depletion Region of n-Type GaN

Abstract: Photoelectrochemical water splitting is expecting a new energy source to produce hydrogen from water. The photoilluminated electrode using a uniform semiconductor single crystal has been well analyzed, but the effect of that using a structural semiconductor is still obscure. The properties of one of the structural semiconductors with a p−n junction in and near a depletion region were investigated using the samples with thin p-type layers on n-type GaN in this article. The properties were also evaluated by the calculation based on the Poisson equation. Not only the band-edge energy of a semiconductor at the semiconductor−electrolyte interface but also the length of the depletion region and the band-edge energy profile affected the photocurrent density from the evaluation. The effect of the energy profile of the depletion region is also discussed.

Vertical junction field effect transistors and diodes having graded doped regions and methods of making

Abstract: Semiconductor devices and methods of making the devices are described. The devices can be junction field-effect transistors (JFETs) or diodes such as junction barrier Schottky (JBS) diodes or PiN diodes. The devices have graded p-type semiconductor layers and/or regions formed by epitaxial growth. The methods do not require ion implantation. The devices can be made from a wide-bandgap semiconductor material such as silicon carbide (SiC) and can be used in high temperature and high power applications.

Photovoltaic nanopillar radial junction diode architecture enhanced by integrating semiconductor quantum dot nanocrystals as light harvesters

Abstract: We propose and demonstrate colloidal quantum dot hybridized, radial p-n junction based, nanopillar solar cells with photovoltaic performance enhanced by intimately integrating nanocrystals to serve as light harvesting agents around the light trapping pillars By furnishing Si based nanopillar photovoltaic diodes with CdSe quantum dots, we experimentally showed up to sixfold enhancement in UV responsivity and ∼13% enhancement in overall solar conversion efficiency The maximum responsivity enhancement achieved by incorporation of nanocrystals in the nanopillar architecture is found to be spectrally more than four times larger than the responsivity enhancement obtained using planar architecture of the same device

Semiconductor device and manufacturing method thereof

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device in which a variation in a Zener voltage caused by a concentration of an epitaxial layer is eliminated as much as possible to provide a desired Zener voltage, and to provide a method for manufacturing especially a Zener diode of low breakdown strength at a high yield. SOLUTION: A vertical type semiconductor device includes a semiconductor substrate at least whose surface constitutes a first conductive type semiconductor layer, a first diffusion region which is formed on the semiconductor surface and has the first conductive type being the same conductive type as the semiconductor layer, and a second high concentration surface diffusion region which has an area wider than the first conductive type diffusion region while being so formed as to partially overlap, and has a second conductive type. The second high concentration diffusion region constitutes a diode formation region which forms PN junction together with the first diffusion region. A guard ring is also constituted which is so formed as to enclose the diode formation region and is composed of a third diffusion region having a second conductive type. COPYRIGHT: (C)2011,JPO&INPIT

Growth, electrical rectification, and gate control in axial in situ doped p-n junction germanium nanowires

Abstract: We report on vapor-liquid-solid growth and electrical properties of axial in situ doped p-n junction Ge sub-100 nm diameter nanowires. Room temperature four-point measurements show current rectification of two to three orders of magnitude depending on nanowire doping and diameter. We observe strong backgate control of reverse-bias current of up to three orders of magnitude and explain it by band-to-band tunneling modulated by the backgate-controlled electric field, as confirmed qualitatively via a quasi-three-dimensional Schrodinger–Poisson simulation.

Negative Terminal Capacitance of Light Emitting Diodes at Alternating Current (AC) Biases

Abstract: Measurement of obvious negative capacitance (NC) at large forward bias of light-emitting diodes (LEDs), using an alternating current (AC) small signal, together with direct current (DC) I-V plot, has shown that the NC grows exponentially with the forward applied voltage. The experimental results are unexpected and are in conflict with Shockley's p-n junction theory which only includes increasing diffusion capacitance and certainly no negative capacitance. The experiment also shows that the ideal factor of LEDs is about 4, which far exceeds the traditional theory value. However, these results support the comprehensive p-n junction theory presented by Hess. Using the framework of his theory, the NC could be interpreted distinctly.

Low-Temperature Annealing of Radiation-Induced Degradation in 4H-SiC Bipolar Junction Transistors

Abstract: Radiation hardness is tested for 4H-SiC n-p-n bipolar junction transistors designed for 1200-V breakdown voltage by implanting MeV protons and carbon ions at different doses and energies The current gain is found to be a very sensitive parameter, and a fluence as low as 1 × 107 cm-2 of 10 MeV 12C can be clearly detected in the forward-output characteristics, IC(VCE) At this low dose, no influence of ion radiation is seen in the open-collector characteristics, IB(VEB), or the reverse bias leakage and breakdown properties Moreover, by annealing the implanted devices at 420°C for 30 min, a complete recovery of the electrical characteristics is accomplished

Schottky diode and method of fabricating the same

Abstract: A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode contacting the first junction region. The first junction region may have a higher concentration of the first conductivity type than the well. A first device isolation region may be formed in the semiconductor substrate separating the schottky junction and the first ohmic junction. A well guard having a second conductivity type opposite to the first conductivity type may be formed in the well. At least a portion of the well guard may be formed under a portion of the schottky junction.

Semiconductor device including vertical transistor and horizontal transistor and method of manufacturing the same

Abstract: A semiconductor device includes a semiconductor substrate, a vertical transistor, a horizontal transistor, a lead, wire-bonding pads, and penetrating electrodes. The semiconductor substrate has first and second surfaces and includes a first surface portion adjacent to the first surface. The vertical transistor includes first and second electrodes on the first surface and a third electrode on the second surface. The horizontal transistor includes first, second, and third electrodes on the first surface. The vertical transistor and the horizontal transistor further include PN junction parts in the first surface portion. The lead is disposed to the first surface and is electrically coupled with the first electrode of the vertical transistor. The wire-bonding pads are disposed on the second surface. The second electrode of the vertical transistor and the first to third electrodes of the horizontal transistor are electrically coupled with the wire-boding pads through the penetrating electrodes.

ZnO-based photodetector with internal photocurrent gain

Abstract: The photoresponsive structures prepared by magnetron sputtering of ZnO on p-Si substrates followed by vacuum evaporation of semitransparent Ni film on ZnO surface are investigated. The obtained Ni/n-ZnO/p-Si structures show high sensitivity that sharply increases with increase in applied voltage. Under a bias voltage of 5 V, the responsivities at λ= 390 nm and λ= 850 nm were equal to 210 and 110 A/W, which correspond to quantum efficiencies of 655 and 165, respectively. It is assumed that the observed strong response is attributed to internal gain in the Ni/ n-ZnO/p-Si phototransistor structure containing Ni/n-ZnO Schottky contact as the emitter junction and n-ZnO/p-Si heterostructure as the collector junction. The response time of the device is ~10 -7 s. Alternative mechanisms of photocurrent multiplication in such structures are also discussed.

A Novel Method to Fabricate Silicon Nanowire p–n Junctions by a Combination of Ion Implantation and in-situ Doping

Abstract: We demonstrate a novel method to fabricate an axial p–n junction inside oriented short vertical silicon nanowires grown by molecular beam epitaxy by combining ion implantation with in-situ doping. The lower halves of the nanowires were doped in-situ with boron (concentration ~1018cm−3), while the upper halves were doubly implanted with phosphorus to yield a uniform concentration of 2 × 1019 cm−3. Electrical measurements of individually contacted nanowires showed excellent diode characteristics and ideality factors close to 2. We think that this value of ideality factors arises out of a high rate of carrier recombination through surface states in the native oxide covering the nanowires.

Producing method for crystalline silicon solar cell PN junction

Abstract: The invention discloses a preparation method of a crystalline silicon solar cell PN junction. The preparation method comprises the following steps: putting silicon slices in a quartz boat, and inserting only one silicon slice into each slot in the quartz boat; putting the quartz boat on a silicon carbide cantilever paddle of a diffusion furnace; boating in a three-stage manner; charging nitrogen gas into the diffusion furnace at a flow rate of 1-30ml/min after a door of the diffusion furnace is completely sealed, and maintaining the temperature at 700-900 DEG C; charging phosphorus oxychloride impurity source gas and oxygen at the same time in two steps, and then turning off a valve for charging the phosphorus oxychloride gas and the oxygen; charging the nitrogen gas at the flow rate of 1-30ml/min; and taking out the boat while setting the rotation speed of a step motor at 250-999mm/min. A crystalline silicon solar cell made from the PN junction prepared by double side diffusion is obviously improved in such aspects as open circuit voltage Voc, short circuit current Isc, shortwave response and the like.