p–n junction

About: p–n junction is a research topic. Over the lifetime, 7701 publications have been published within this topic receiving 108890 citations. The topic is also known as: p-n junction.

Modeling of InGaN p-n junction solar cells

Abstract: InGaN p-n junction solar cells with various indium composition and thickness of upper p-InGaN and lower n-InGaN junctions are investigated theoretically. The physical properties of InGaN p-n junction solar cells, such as the short circuit current density (JSC), open circuit voltage (Voc), fill factor (FF), and conversion efficiency (η), are theoretically calculated and simulated by varying the device structures, position of the depletion region, indium content, and photon penetration depth. The results indicate that an In0.6Ga0.4N solar cell, with optimal device parameters, can have a JSC ~31.8 mA/cm2, Voc ~0.874 volt, FF ~0.775, and η ~21.5%. It clearly demonstrates that medium-indium-content InGaN materials have the potential to realize high efficiency solar cells. Furthermore, the simulation results, with various thicknesses of the p-InGaN junction but a fixed thickness of the n-InGaN junction, shows that the performance of InGaN solar cells is determined by the upper p-InGaN junction rather than the n-InGaN substrate. This is attributed to the different amount of light absorption in the depletion region and the variation of the collection efficiency of minority carriers.

Mo- and Ti-silicided low-resistance shallow junctions formed using the ion implantation through metal technique

Abstract: Mo-and Ti-silicided junctions were formed using the ITM technique, which consists of ion implantation through metal (ITM) to induce metal-Si interface mixing and subsequent thermal annealing. Double ion implantation, using nondopant ions (Si or Ar) implantation for the metal-Si interface mixing and dopant ion (As or B) implantation for doping, has resulted in ultrashallow ( ≤ 0.1-µm) p+-n or n+-p junctions with ∼30-Ω sheet resistance for Mo-silicided junctions and ∼5.5-Ω sheet resistance for Ti-silicided junctions. The leakage current levels for the Mo-silicided n+-p junctions (0.1-µm junction depth) and the Mo-silicided p+-n junction (0.16-µm junction depth) are comparable to that for unsilicided n+-p junction with greater junction depth ( ∼0.25 µm).

Resistive switching mechanism in the one diode-one resistor memory based on p+-Si/n-ZnO heterostructure revealed by in-situ TEM.

Abstract: One diode-one resistor (1D1R) memory is an effective architecture to suppress the crosstalk interference, realizing the crossbar network integration of resistive random access memory (RRAM). Herein, we designed a p+-Si/n-ZnO heterostructure with 1D1R function. Compared with the conventional multilayer 1D1R devices, the structure and fabrication technique can be largely simplified. The real-time imaging of formation/rupture process of conductive filament (CF) process demonstrated the RS mechanism by in-situ transmission electron microscopy (TEM). Meanwhile, we observed that the formed CF is only confined to the outside of depletion region of Si/ZnO pn junction, and the formation of CF does not degrade the diode performance, which allows the coexistence of RS and rectifying behaviors, revealing the 1D1R switching model. Furthermore, it has been confirmed that the CF is consisting of the oxygen vacancy by in-situ TEM characterization.

Light amplifier using a semiconductor

Abstract: A light amplifier using a semiconductor, in which an elongated single semiconductor PN junction is used for amplifying an input light injected at an input face provided at one end of the PN junction along the junction plane of the PN junction. The semiconductor PN junction is driven by bias signals applied at a common ohmic electrode and a plurality of ohmic electrodes respectively provided at opposite sides of the PN junction with respect to the junction plane. A plurality of the ohmic electrodes are sequencially arranged overlying the PN junction in a longitudinal direction and are electrically isolated from one another, so that a plurality of discrete regions are provided in the PN junction corresponding to the respective electrodes. Two adjacent regions are employed as one unitary region and are driven by predetermined different forward bias currents to bias one of the two regions as an amplifying region and the other of the two regions as a saturable absorbing region. The amplifying region is disposed at the input side while the saturable absorbing region is disposed at the output side in each unitary region. The respective unitary regions are connected in cascade to provide a plurality of the unitary regions.