p–n junction

About: p–n junction is a research topic. Over the lifetime, 7701 publications have been published within this topic receiving 108890 citations. The topic is also known as: p-n junction.

ZnO/MgZnO p-n junction light-emitting diodes fabricated on sapphire substrates by pulsed laser deposition technique

Abstract: A ZnO/MgZnO p?n junction light-emitting diode employing a [ZnO/Mg0.1Zn0.9O] multiple quantum well active layer was fabricated on a c-plane sapphire substrate by the pulsed laser deposition technique. Phosphorous and gallium were used for p-type and n-type doping, respectively. Sapphire substrates were annealed in N2 ambient at 1200??C prior to the deposition of p-type ZnO layer. Structural characterization of the P-doped ZnO layer was performed and excellent lattice matching with sapphire was obtained. The ZnO/MgZnO-based LED showed efficient electroluminescence at room temperature with bias voltages ?7?V. The as-fabricated LEDs were found to be sensitive to ambient air and degraded after some hours, possibly due to the formation of a surface conduction layer. LEDs can be further reactivated by annealing at 400??C in ambient O2.

A novel substrate-assisted RESURF technology for small curvature radius junction

Abstract: A novel substrate-assisted (SA) RESURF technology aiming at improving off-state breakdown voltage (BV) of PN junction with small curvature radius is proposed and experimentally demonstrated in this paper. The SA RESURF technology not only realizes small curvature radius in the fingertip region, but also reduces electric field concentration in the curved metallurgical junction. Low-doped P-substrate, which increases depletion of the small curvature radius junction and reduces electric field concentration in the curved metallurgical junction, is adopted in the source fingertip region. Owing to the existence of low-doped P-substrate, the abrupt PN junction with small curvature radius is adjusted to low-doped PN junction with large curvature radius. The SA RESURF technology can be widely applied to lateral high voltage devices with small curved junction, especially to lateral super junction devices. A CBSLOP-LDMOS with the proposed SA RESURF technology has been developed. The experimental results show that the CBSLOP-LDMOS exhibits off-state BV of 700 V and specific on-resistance (R on, sp ) of 142 mΩ·cm2.

High breakdown active device structure with low series resistance

Abstract: Series resistance in the low impurity portion of a high breakdown PN junction of a three or four layer device is reduced by providing an increased impurity region at the junction of the same conductivity type as the low impurity portion and having an impurity profile such that the increased impurity region is depleted under reverse biasing before critical field is reached therein. The three layer device include insulated gate field effect transistors and bipolar devices and the four layer device is an SCR.

A simple hybrid inorganic-polymer photodiode

Abstract: A hybrid p–n junction was fabricated by using chemically synthesized cadmium sulfide (CdS) nanoparticles and spun films of poly (9-vinayl carbazole) (PVK). The junction appeared to be nearly ideal from the current–voltage measurements. The analysis of capacitance–voltage characteristics produced a value of nearly 1 V for the zero bias built-in barrier of the CdS/PVK junction. The high photoresponsivity in the order of 1.16 AW−1 at −2 V may be attributed to dissociation of loosely bound excitons at the CdS/PVK interface.

A memristive circuit model for p‐n junction diodes

Abstract: A new simple lumped circuit model for junction diodes is presented. The model contains only 4 elements; namely, 2 controlled current sources, a nonlinear capacitor, and a memristor. Each component bears a simple relationship with the physical operating mechanisms inside the diode. The model is shown capable of simulating realistically the diode's dynamic behaviours under reverse, forward, and sinusoidal operating modes. Both the storage time and the fall time of the diode can be accurately predicted. The model is also shown capable of mimicking various second order effects due to conductivity modulation. In particular, the model is shown to exhibit a predominantly capacitive incremental impedance under small forward bias and a predominantly inductive impedance under large forward bias. Moreover, it includes the standard two-capacitor model as a special case.