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p–n junction

About: p–n junction is a research topic. Over the lifetime, 7701 publications have been published within this topic receiving 108890 citations. The topic is also known as: p-n junction.


Papers
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Journal ArticleDOI
TL;DR: Amorphous Si p-n junctions with various doping profiles have been prepared by the glow discharge process to investigate the effect of the barrier profile on the electrical properties of the diodes as mentioned in this paper.
Abstract: Amorphous Si p-n junctions with various doping profiles have been prepared by the glow discharge process to investigate the effect of the barrier profile on the electrical properties of the diodes. The highest current densities, up to 40A/cm 2 , are obtained with n + -ν-p + structures. Under AM-I illumination photovoltaic p + -i-n + cells generate open circuit voltages of 0.7V and short-circuit currents up to 10mA/cm 2 , corresponding to efficiencies between 3 and 4%. The diode quality factors have also been investigated.

28 citations

Journal ArticleDOI
TL;DR: In this paper, a p-n junction was created by laser doping a silicon carbide wafer with aluminum (p-type) and nitrogen (n-type), and a broad electroluminescence peak was observed around 498.8 nm wavelength, characterizing the p−n junction as a blue light emitting diode.
Abstract: The high melting point and the limited diffusion of impurities in silicon carbide have greatly restricted the use of conventional ion implantation and furnace to incorporate and activate dopants. A laser doping technique overcomes these obstacles for doping silicon carbide and other wide band gap semiconductors. This paper presents the work on fabrication of p–n junction diodes and blue light emitting diodes using laser doping technique. A p–n junction was created by laser doping a silicon carbide wafer with aluminum (p-type) and nitrogen (n-type). Optical interferometer profilometer scan showed that there was no damage on the surface post laser doping. Secondary ion mass spectrometry (SIMS) was carried to estimate the dopant concentration and depth. The effects of laser doping on the current–voltage characteristics were studied. The junctions were characterized by capacitance–voltage and electroluminescence measurements. A broad electroluminescence peak was observed around 498.8 nm wavelength, characterizing the p–n junction as a blue light-emitting diode. (© 2007 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

28 citations

Journal ArticleDOI
TL;DR: In this paper, the authors focus on laser annealing of implanted with high phosphorus dose p-type germanium wafers using an Nd-YAG laser at 355 nm.

28 citations

Proceedings ArticleDOI
17 Sep 2000
TL;DR: The effect of energy contamination on device performance such as L/sub eff/, VT and I/sub DSAT/ is simulated using ISE TCAD and the level of contamination is measured for sub keV B implants in the Quantum Leap.
Abstract: Ultra shallow junctions <500 /spl Aring/ with steep profiles <8 nm/decade are required for device technologies /spl les/0.13 /spl mu/m as outlined by the recent ITRS Roadmap. For a p/sup +//n junction such profiles can be obtained using sub-keV B ion implantation since both the projected range and more importantly the transient enhanced diffusion are significantly reduced at lower energies. State-of-the-art high current implanters utilize a deceleration mode typically for sub 1 keV implantation in order to increase the beam current and production wafer throughput. Such a mode contains a very low level of energy contamination. This level is measured for sub keV B implants in the Quantum Leap and factors affecting the level of contamination are studied. Spike and soak annealing reduces the effect of the energy contamination on junction profile and depth. The effect of energy contamination on device performance such as L/sub eff/, VT and I/sub DSAT/ is simulated using ISE TCAD.

28 citations

Patent
08 Feb 1977
TL;DR: In this paper, a semiconductor wafer having a stacking fault was subjected to an annealing treatment in a non-oxidative atmosphere to eliminate the stacking fault, and a PN junction was formed in an area of the wafer from which the stacked fault was eliminated.
Abstract: In a method of making a semiconductor device, a semiconductor wafer having a stacking fault originally contained in the wafer or produced in the wafer through the thermal oxidation of the wafer surface is subjected to an annealing treatment in a non-oxidative atmosphere to eliminate the stacking fault. A PN junction is thereafter formed in an area of the wafer from which the stacking fault is eliminated.

28 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202314
202237
2021116
2020166
2019251
2018203