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p–n junction

About: p–n junction is a research topic. Over the lifetime, 7701 publications have been published within this topic receiving 108890 citations. The topic is also known as: p-n junction.


Papers
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Journal ArticleDOI
TL;DR: In this article, the forward currentvoltage characteristics of 4H-SiC p+n diodes with 5.5 kV voltage blocking capacity have been studied in the temperature range 297-640?K.
Abstract: Forward current-voltage characteristics of 4H-SiC p+-n diodes with 5.5 kV voltage-blocking capacity have been studied in the temperature range 297-640?K. `Classical' characteristics, described as a sum of the recombination current in the space charge region and the diffusion current in the base, have been observed for the first time at low current densities over the whole temperature range. Using data on the saturation diffusion current, the hole lifetime in the base is estimated to be about 10-9?s. This value is three orders of magnitude shorter than the hole lifetime measured in the same structures at high injection level. The possible reasons for such a discrepancy are discussed.

27 citations

Journal ArticleDOI
TL;DR: In this article, the forward-current-density JF/forwardvoltage VF characteristics of GaN Schottky-barrier diodes (SBDs) and p-n Diodes on free-standing GaN substrates were computationally and experimentally investigated.
Abstract: Forward-current-density JF/forward-voltage VF characteristics of vertical gallium-nitride (GaN) Schottky-barrier diodes (SBDs) and p-n diodes on free-standing GaN substrates were computationally, as well as experimentally, investigated. Based on the thermionic emission model, electron-drift mobility μn was used as a parameter to fit the JF-VF characteristics of both reported and fabricated GaN SBDs. At 300 K, μn was fitted to be 600 cm2/V ·s when electron concentration n was 1 × 1016 cm-3 and 750 cm2/V ·s when n was 5 ×1015 cm-3. Accordingly, the theoretical μn-n curve for a carrier compensation ratio of 0.90 was applied in the case of n-GaN layers on GaN substrates. With respect to GaN p-n diodes, the reported JF -VF characteristics were successfully fitted with dislocation-mediated carrier lifetimes in the high-injection region and with Shockley-Read-Hall lifetimes in the generation-recombination current region.

27 citations

Journal ArticleDOI
TL;DR: In this paper, a method of chemically p-doping films of thiol-capped PbS QDs was presented, which showed an improvement in the power conversion efficiency from 7.1% to 7.6%.
Abstract: Lead sulfide quantum dot (PbS QD) solar cell efficiencies have improved rapidly over the past years due in large part to intelligent band alignment considerations. A pn-junction can be formed by connecting PbS layers with contrasting ligands. However, the resulting doping concentrations are typically low and cannot be effectively controlled. Here, we present a method of chemically p-doping films of thiol capped PbS QDs. P-n junction solar cells with increased doping in the p-type layer show improved short circuit current and fill factor, leading to an improvement in the power conversion efficiency from 7.1% to 7.6%. By examining Schottky diodes, field effect transistors, and the absorption spectra of treated and untreated PbS QDs, we show that the improved efficiency is due to the increased doping concentration in the thiol capped QD layer and to denser packing of the PbS QD film.

26 citations

Patent
25 Aug 1999
TL;DR: In this article, a wide bandgap semiconductor single crystal is applied as a semiconductor substrate material of a surge absorber, and a surge absorption operation starting voltage is set by a punchthrough of a pn junction.
Abstract: A wide bandgap semiconductor single crystal is applied as a semiconductor substrate material of a semiconductor surge absorber, and a surge absorption operation starting voltage is set by a punchthrough of a pn junction, to obtain a semiconductor surge absorber with a repetitive operation and a high surge endurance.

26 citations

Patent
Masao Yamada1, Motoo Nakano1, George J. Collins1, Tetsuro Tamura1, Akira Takazawa1 
06 Jan 1994
TL;DR: In this article, an Si or SiC semiconductor layer is subjected to anodic oxidation in an HF solution to form a polycrystalline (Pn) layer, which is then immersed in pure water to shorten the reaction time and help bubbles separate from the surface of the porous region.
Abstract: An Si or SiC semiconductor layer is subjected to anodic oxidation in an HF solution to form a porous semiconductor layer. Without drying, the porous semiconductor layer is then immersed in pure water. Ultrasonic waves applied to the pure water shorten the reaction time and help bubbles separate from the surface of the porous region. The porous semiconductor layer is used for forming a pn junction, and carriers are injected into the pn junction.

26 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202314
202237
2021116
2020166
2019251
2018203