Topic
p–n junction
About: p–n junction is a research topic. Over the lifetime, 7701 publications have been published within this topic receiving 108890 citations. The topic is also known as: p-n junction.
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TL;DR: In this article, the junction parameters such as ideality factor, barrier height, and series resistance are determined using conventional forward bias I-V characteristics, the Cheung method, and Norde's function.
Abstract: Transparent and conducting ZnO and NiO films were used for fabrication of p–n junction by pulsed laser deposition. These films were characterized by X-ray diffraction (XRD), atomic force microscopy, UV–visible spectroscopy, and electrical techniques. XRD shows that ZnO films are highly orientated along the (0 0 2) direction, while NiO films have preferred orientation along the (1 1 1) direction. These films are very smooth with surface roughness of ∼1.2 nm. The optical transmittances of ZnO and NiO films are 87% and 64%, respectively. I–V characteristics of the ZnO–NiO junction show rectification. The junction parameters such as ideality factor, barrier height, and series resistance are determined using conventional forward bias I–V characteristics, the Cheung method, and Norde's function. There is a good agreement between the diode parameters obtained from these methods. The ideality factor of ∼4.1 and barrier height of ∼0.33 eV are estimated using current–voltage characteristics.
113 citations
Patent•
07 Mar 1983
TL;DR: In this paper, an electrical isolation mechanism is formed in a semiconductive body to separate islands of an upper zone of first type conductivity (N) in the body, and a path of first-type conductivity extending from the PN junction through another of the islands to its upper surface is created.
Abstract: In fabricating a PROM cell, an electrical isolation mechanism (44 and 32) is formed in a semiconductive body to separate islands of an upper zone (36) of first type conductivity (N) in the body. A semiconductor impurity is introduced into one of the islands to produce a region (48) of opposite type conductivity (P) that forms a PN junction laterally bounded by the island's side boundaries. A highly resistive amorphous semiconductive layer (58) which is irreversibly switchable to a low resistive state is deposited above the region in such a manner as to be electrically coupled to the region. A path of first type conductivity extending from the PN junction through another of the islands to its upper surface is created in the body to complete the basic cell.
113 citations
TL;DR: The design and numerical simulation results for a silicon waveguide modulator based on carrier depletion in a linear array of periodically interleaved PN junctions that are oriented perpendicular to the light propagation direction are presented.
Abstract: We present the design and numerical simulation results for a silicon waveguide modulator based on carrier depletion in a linear array of periodically interleaved PN junctions that are oriented perpendicular to the light propagation direction. In this geometry the overlap of the optical waveguide mode with the depletion region is much larger than in designs using a single PN junction aligned parallel to the waveguide propagation direction. Simulations predict that an optimized modulator will have a high modulation efficiency of 0.56 V.cm for a 3V bias, with a 3 dB frequency bandwidth of over 40 GHz. This device has a length of 1.86 mm with a maximum intrinsic loss of 4.3 dB at 0V bias, due to free carrier absorption. (C) 2009 Optical Society of America
112 citations
TL;DR: In this paper, a series of P-N junction photocatalysts, NiO/TiO 2, were prepared by incipient wetness impregnation and characterized by UV-vis spectroscopy, XRD and XPS.
111 citations
Book•
01 Jan 1987
TL;DR: In this article, the authors deal mainly with physical device models which are developed from the carrier transport physics and device geometry considerations, focusing mainly on silicon and gallium arsenide devices and including models of silicon bipolar junction transistors, junction field effect transistors (JFETs), MESFET, transferred electron devices, pn junction diodes and Schottky varactor dodes.
Abstract: This book deals mainly with physical device models which are developed from the carrier transport physics and device geometry considerations. The text concentrates on silicon and gallium arsenide devices and includes models of silicon bipolar junction transistors, junction field effect transistors (JFETs), MESFETs, silicon and GaAs MESFETs, transferred electron devices, pn junction diodes and Schottky varactor diodes. The modelling techniques of more recent devices such as the heterojunction bipolar transistors (HBT) and the high electron mobility transistors are discussed. This book contains details of models for both equilibrium and non-equilibrium transport conditions. The modelling Technique of Small-scale devices is discussed and techniques applicable to submicron-dimensioned devices are included. A section on modern quantum transport analysis techniques is included. Details of essential numerical schemes are given and a variety of device models are used to illustrate the application of these techniques in various fields.
111 citations