p–n junction

About: p–n junction is a research topic. Over the lifetime, 7701 publications have been published within this topic receiving 108890 citations. The topic is also known as: p-n junction.

High-voltage semiconductor component

Abstract: A semiconductor component having a semiconductor body comprises a blocking pn junction, a source zone of a first conductivity type and bordering on a zone forming the blocking pn junction of a second conductivity type complementary to the first conductivity type, and a drain zone of the first conductivity type. The side of the zone of the second conductivity type faces the drain zone forming a first surface, and in the region between the first surface and a second surface areas of the first and second conductivity type are nested in one another. The areas of the first and second conductivity type are variably so doped that near the first surface doping atoms of the second conductivity type predominate, and near the second surface doping atoms of the first conductivity type predominate. Furthermore a plurality of floating zones of the first and second conductivity type is provided.

Silicon-on-insulator diodes and ESD protection circuits

Abstract: A silicon-on-insulator (SOI) gated diode and non-gated junction diode are provided. The SOI gated diode has a PN junction at the middle region under the gate, and which has more junction area than a normal diode. The SOI non-gated junction diode has a PN junction at the middle region thereof, and then also has more junction area than a normal diode. The SOI diodes of the present invention improve the protection level offered for electrical overstress (EOS)/electrostatic discharge (ESD) due to the low power density and heating for providing more junction area than normal ones. The I/O ESD protection circuits, which comprise primary diodes, a first plurality of diodes, and a second plurality of diodes, all of which are formed of the present SOI diodes, could effectively discharge the current when there is an ESD event. And, the ESD protection circuits, which comprise more primary diodes, could effectively reduce the parasitic input capacitance, so that they can be used in the RF circuits or HF circuits. The proposed gated diode and non-gated diode can be fully process-compatiable to general partially-depleted or fully-depleted silicon-on-insulator CMOS processes.

Carrier generation-recombination in the space-charge region of an asymmetrical p-n junction

Abstract: The theory of generation-recombination in the space-charge region of a symmetrical p - n junction by Sah, Noyce and Shockley is extended to an asymmetrical junction. The role of junction asymmetry in determining the I–V characteristics of the junction is found to be enhanced by the capture asymmetry of donor-like (acceptor-like) recombination centers in an n + - p ( p + - n ) junction, but diminished in a p + - n ( n + - p ) junction. Where asymmetry effects are dominant at forward bias, the generation-recombination current is nearly independent of junction voltage, in contrast to the familiar exp( qV 2kT ) dependence predicted by the theory of Sah et al. Based on the presence of donor-like centers in an n + - p junction, a detailed discussion is given of the effects on the I–V characteristics at small forward bias due to variations in junction asymmetry, the capture asymmetry and energy level of the recombination centers. The theory is applied to InSb diodes, and previous analyses of generation-recombination current data on InSb diodes are examined.

Current rectification in a single GaN nanowire with a well-defined p–n junction

Abstract: This letter discusses Mg incorporation in GaN nanowires with diameters ∼35 nm, fabricated by vapor–liquid–solid synthesis in p-type nanowires. Turning on the Mg doping halfway through the synthesis produced nanowires with p–n junctions that showed excellent rectification properties down to 2.6 K. The nanowires are shown to possess good-quality, crystalline, hexagonal GaN inner cores surrounded by an amorphous GaN outer layer. Most wires grow such that the crystalline c axis is normal to the long axis of the nanowire. The temperature dependence of the current–voltage characteristics is consistent with electron tunneling through a voltage-dependent barrier.

Examination apparatus for biological sample and chemical sample

Abstract: A wireless sensor chip suitable for the compact, high-sensitive, and low-cost examination apparatus for easily examining a biological material such as gene at low cost is provided. A sensor chip is formed on an SOI substrate, and an n type semiconductor layer on which a pMOS transistor is formed and a p type semiconductor layer on which an nMOS transistor is formed are isolated by a pn junction. Therefore, the p type semiconductor layer at the outermost portion (chip edge portion to be in contact with solution) is set to floating, and the maximum potential and the minimum potential of the chip are supplied to an n type semiconductor layer and a p type semiconductor layer inside the outermost portion, respectively. Also, the chip is covered with an ion impermeable insulating film for reducing the penetration of positive ions through the oxide layer.