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p–n junction

About: p–n junction is a research topic. Over the lifetime, 7701 publications have been published within this topic receiving 108890 citations. The topic is also known as: p-n junction.


Papers
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Journal ArticleDOI
TL;DR: In this paper, a core-shell p-n junction solar cells were constructed by a solid-state phosphorus diffusion to convert the shell of the boron-doped p-type Si nanowires to n-type, thus forming a coreshell pn junction structure.
Abstract: Vertically arrayed Si nanowire/nanorod-based core-shell p-n junction solar cells have been fabricated by a solid-state phosphorus diffusion to convert the shell of the boron-doped p-type Si nanowires to n-type, thus forming a core-shell p-n junction structure. The nanowires with a nanosphere defined diameter were fabricated by an Au-film assisted electrochemical etching method, enabling controlled junction formation. The Si nanowire arrays show superior optical properties over a wide range of spectrum. In addition, longer nanowires are more effective for light trapping and absorption which is more advantageous for efficient energy harvesting. The cells show a high energy conversion efficiency of 1.47%, a significant improvement from the previously reported Si nanowire-based core-shell junction solar cells where the core-shell junctions were formed by an oppositely doped Si deposition on preformed Si nanowires. The relatively high efficiency might be mainly attributed to the extremely low reflectivity of t...

77 citations

Proceedings ArticleDOI
13 May 1996
TL;DR: In this paper, the authors present GaAs material and device-structure optimization studies that have led to achieve a open-circuit voltage of /spl sim/1 volt and a best solar cell efficiency of 18.2% under AM1.5G illumination, for a 4 cm/sup 2/ area GaAs cell on commercially available, cast, optical-grade polycrystalline Ge substrate.
Abstract: In this work, the authors present GaAs material and device-structure optimization studies that have led to achieve a open-circuit voltage of /spl sim/1 volt and a best solar cell efficiency of 18.2% under AM1.5G illumination, for a 4 cm/sup 2/ area GaAs cell on commercially-available, cast, optical-grade polycrystalline Ge substrate. This V/sub /spl infin// is almost 70 mV higher than on their previously-reported best GaAs cell on similar substrates. They discuss the growth of high-quality GaAs-AlGaAs layers, across the various crystalline orientations of a polycrystalline Ge substrate, important for obtaining good device performance. Optimization studies of the minority-carrier properties of GaAs layers on poly-Ge substrates have revealed that lifetime-spread across various grains can be reduced through the use of lower doping for the Al/sub 0.8/Ga/sub 0.2/As confinement layers. The cell-structure optimization procedures for improved V/sub /spl infin// and cell efficiency, include the use of thinner emitters, a spacer layer near the p/sup +/-n junction and an improved window layer. An experimental study of dark currents in these junctions, with and without the spacer, as a function of temperature (77 K to 288 K) is presented indicating that the spacer reduces the tunneling contribution to dark current.

77 citations

Patent
Peyman Hadizad1, Z.J. Shen1, Ali Salih1
09 May 1997
TL;DR: In this article, an edge termination structure is created by forming trench structures (14) near a PN junction, which extends a depletion region between a doped region and a body of semiconductor material or a semiconductor substrate of the opposite conductivity type away from the doped regions.
Abstract: An edge termination structure is created by forming trench structures (14) near a PN junction. The presence of the trench structures (14) extends a depletion region (13) between a doped region (12) and a body of semiconductor material or a semiconductor substrate (11) of the opposite conductivity type away from the doped region (12). This in turn forces junction breakdown to occur in the semiconductor bulk, leading to enhancement of the breakdown voltage of a semiconductor device (10). A surface of the trench structures (14) is covered with a conductive layer (16) which keeps the surface of the trench structures (14) at an equal voltage potential. This creates an equipotential surface across each of the trench structures (14) and forces the depletion region to extend laterally along the surface of semiconductor substrate (11). The conductive layers (16) are electrically isolated from an electrical contact (17) which contacts the doped region (12) and from the conductive layers (16) of neighboring trench structures (14).

77 citations

Journal ArticleDOI
TL;DR: In this article, a chemical vapor deposition (CVD) process has been used to produce device structures of n-and p-type 6H-SiC epitaxial layers on commercially produced single-crystal 6HSiC wafers.
Abstract: A chemical vapor deposition (CVD) process has been used to produce device structures of n- and p-type 6H-SiC epitaxial layers on commercially produced single-crystal 6H-SiC wafers. Mesa-style p-n junction diodes were successfully fabricated from these device structures using reactive ion etching, oxide passivation, and electrical contact metallization techniques. When tested in air, the 6H-SiC diodes displayed excellent rectification characteristics up to the highest temperature tested, 600 C. To observe avalanche breakdown of the p-n junction diodes, testing under a high-electrical-strength liquid was necessary. The avalanche breakdown voltage was 1000 V representing the highest reverse breakdown voltage to be reported for any CVD-grown SiC diode.

77 citations

Patent
28 Feb 1986
TL;DR: In this article, a monolithic, quantum well, multilayer photovoltaic cell comprises a p-n junction comprising a pregion on one side and an n-region on the other side, each of which regions comprises a series of at least three semiconductor layers, all p-type in the p-region and all n- type in the nregion; each of said series of layers comprising alternating barrier and quantum well layers.
Abstract: A monolithic, quantum well, multilayer photovoltaic cell comprises a p-n junction comprising a p-region on one side and an n-region on the other side, each of which regions comprises a series of at least three semiconductor layers, all p-type in the p-region and all n-type in the n-region; each of said series of layers comprising alternating barrier and quantum well layers, each barrier layer comprising a semiconductor material having a first bandgap and each quantum well layer comprising a semiconductor material having a second bandgap when in bulk thickness which is narrower than said first bandgap, the barrier layers sandwiching each quantum well layer and each quantum well layer being sufficiently thin that the width of its bandgap is between said first and second bandgaps, such that radiation incident on said cell and above an energy determined by the bandgap of the quantum well layers will be absorbed and will produce an electrical potential across said junction.

76 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202314
202237
2021116
2020166
2019251
2018203