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p–n junction

About: p–n junction is a research topic. Over the lifetime, 7701 publications have been published within this topic receiving 108890 citations. The topic is also known as: p-n junction.


Papers
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Journal ArticleDOI
TL;DR: In this article, the junction resistance of a tilted interface probed with separate split gates is shown to increase with tilt, in agreement with recent experimental evidence, showing that the tilt dependence arises because of the misalignment between modal density and the anisotropic transmission lobe oriented perpendicular to the tilt.
Abstract: Electrons in graphene follow unconventional trajectories at $p$-$n$ junctions, driven by their pseudospintronic degree of freedom. The prominent angular dependence of transmission is significant, capturing the chiral nature of the electrons and culminating in unit transmission at normal incidence (Klein tunneling). We theoretically show that such chiral tunneling can be directly observed from the junction resistance of a tilted interface probed with separate split gates. The junction resistance is shown to increase with tilt, in agreement with recent experimental evidence. The tilt dependence arises because of the misalignment between modal density and the anisotropic transmission lobe oriented perpendicular to the tilt. A critical determinant is the presence of specular edge scattering events that can completely reverse the angle dependence. The absence of such reversals in the experiments indicates that these edge effects are not overwhelmingly deleterious, making the premise of transport governed by electron ``optics'' in graphene an exciting possibility.

53 citations

Journal ArticleDOI
TL;DR: In this paper, the on-chip integration of a suspended p-n junction InGaN/GaN multiple quantum wells (MQWs) device and multiple waveguides on the same GaN-on-silicon platform is presented.
Abstract: We propose, fabricate, and characterize the on-chip integration of suspended p-n junction InGaN/GaN multiple quantum wells(MQWs) device and multiple waveguides on the same GaN-on-silicon platform. The integrated devices are fabricated via a wafer-level process and exhibit selectable functionalities for diverse applications. As the suspended p-n junction InGaN/GaN MQWs device operates under a light emitting diode(LED) mode, part of the light emission is confined and guided by the suspended waveguides. The in-plane propagation along the suspended waveguides is measured by a micro-transmittance setup. The on-chip data transmission is demonstrated for the proof-of-concept photonic integration. As the suspended p-n junction InGaN/GaN MQWs device operates under photodiode mode, the light is illuminated on the suspended waveguides with the aid of the micro-transmittance setup and, thus, coupled into the suspended waveguides. The guided light is finally sensed by the photodiode, and the induced photocurrent trace shows a distinct on/off switching performance. These experimental results indicate that the on-chip photonic integration is promising for the development of sophisticated integrated photonic circuits in the visible wavelength region.

53 citations

Patent
30 Mar 2005
TL;DR: In this paper, the current blocking mechanism of light emitting devices has been investigated and a Schottky contact between an ohmic contact (18) and the active region (14) of the device has been provided.
Abstract: Light emitting devices and methods of fabricating light emitting devices having a current blocking mechanism below the wire bond pad (22) are provided. The current blocking mechanism may be a reduced conduction region (30) in an active region (14) of the device. The current blocking mechanism could be a damage region of a layer on which a contact (18) is formed. The current blocking mechanism could be a Schottky contact between an ohmic contact (18) and the active region (14) of the device. A semiconductor junction, such as a PN junction could also be provided between the ohmic contact (18) and the active region (14).

53 citations

Journal ArticleDOI
TL;DR: In this paper, focused ion beam Ga+ implantation through Ti metal (ITM) and TiSi2 (ITS) layers, followed by rapid thermal annealing (RTA), has been investigated for application in self-aligned silicide technology.
Abstract: Focused ion beam Ga+ implantation through Ti metal (ITM) and TiSi2 (ITS) layers, followed by rapid thermal annealing (RTA), has been investigated for application in self‐aligned silicide technology. The Ga+ energy was varied from 25 to 50 keV at doses of 1×1013 and 1×1015 cm−2 followed by RTA at 600 °C for 30 s. Depth profiles of the Ga implants were obtained by performing secondary‐ion mass spectrometry. It was observed that higher‐energy and higher‐dose implants yielded good quality p+‐n junction characteristics. Diodes were fabricated to obtain the electrical properties of these silicided junctions. At higher implant energies (≥40 keV) and all doses, I‐V characteristics of ITS diodes showed 100 times lower leakage currents (Ir) than ITM diodes. For low‐energy (<40 keV)/high‐dose implantation the ITS diodes showed a slight improvement in Ir over the ITM diodes, whereas for low‐energy/low‐dose implantation the same Ir was observed.

53 citations

Journal ArticleDOI
G. L. Pearson1, B. Sawyer1
01 Nov 1952
TL;DR: A new type of p-n junction silicon diode has been prepared by alloying acceptor or donor impurities with n- or p-type silicon as discussed by the authors, with reverse currents as low as 10-10 amperes, rectification ratios as high as 108 at 1 volt and a Zener characteristic in which d(log I)/d(log V) may be an high as 1,500 over several decades of current.
Abstract: A new type of p-n junction silicon diode has been prepared by alloying acceptor or donor impurities with n- or p-type silicon. The unique features of this diode are: (a) reverse currents as low as 10-10 amperes, (b) rectification ratios as high as 108 at 1 volt, (c) a Zener characteristic in which d(log I)/d(log V) may be an high as 1,500 over several decades of current, (d) a stable Zener voltage which may be fixed in the production process at values between 3 and 1,000 volts, and (e) ability to operate at ambient temperatures as high as 300°C.

53 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202314
202237
2021116
2020166
2019251
2018203