p–n junction

About: p–n junction is a research topic. Over the lifetime, 7701 publications have been published within this topic receiving 108890 citations. The topic is also known as: p-n junction.

The $\hbox{nn}^{+}$ -Junction as the Key to Improved Ruggedness and Soft Recovery of Power Diodes

Abstract: The effects during reverse recovery of pin power diodes are determined by free carriers and their interaction with the electric field. A density of free carriers higher than the background doping will easily occur in space-charge regions during reverse recovery of high-voltage silicon devices. As a result, a high electric-field strength combined with avalanche generation occurs at the p-n junction. However, if a second region with high electric-field strength arises at the nn+-junction, the situation can become critical. If the second electric-field peak can be suppressed, it is possible to make diodes that are very rugged and show a significantly improved soft-recovery behavior.

High withstand voltage semiconductor device

Abstract: PURPOSE:To provide a high withstand voltage semiconductor device in which withstand voltage is enhanced while realizing high integration. CONSTITUTION:PN junction between an embedded collector region 3 and a collector withstand voltage region 4 is reversely biased and the depletion layer thereof reaches a side isolation insulator region 9 for dielectrically isolating the side face of the semiconductor withstand voltage region 4. A polysilicon region 8 contiguous to the collector withstand voltage region 4 while sandwiching the side face isolation insulator region 9 has a potential closer to that of a base region 5 than that of the embedded collector region 3. Consequently, the depletion layer in the collector withstand voltage region 4 between the side face of the base region 5 and the side face isolation insulator region 9 is affected by the low potential from both sides of the base region 5 and the polysilicon region 8 and concentration of electric field is relaxed in the vicinity of the corner part between the side face and the bottom face in the base region 5. Consequently, avalanche breakdown is suppressed at that part resulting in the enhancement of withstand voltage.

Surface-emitting light emitting device

Abstract: A surface-emitting, light emitting device has a columnar active region of one direct bandgap semiconductor and a surrounding confining region of a higher bandgap semiconductor. Contacts are made to the active and confining regions and a window is formed in the device in alignment with the active region to permit light emission from the device. The semiconductors are doped to establish a pn junction within a carrier diffusion length of the heterojunction between the active and confining regions, the pn junction extending the length of the active region. In use, light is emitted along the axis of the columnar active region in response to current passing radially across the pn junction.

Method of semiconductor solar energy device fabrication

Abstract: This disclosure relates to a semiconductor solar energy device which is of the PN-type and utilizes a dielectric anti-reflective coating on the side of the device that faces the sunlight. The fabrication techniques used in making this semiconductor device include the use of a rough or textured pyramid shaped silicon surface beneath the anti-reflective coating to increase solar cell efficiency. Also, ion implantation is used to form the PN junction in the device. The ion implanted region located on the side of the device that is subjected to the sunlight is configured in order to permit metal ohmic contact to be made thereto without shorting through the doped region during sintering of the metal contacts to the semiconductor substrate. The dielectric anti-reflective coating, in one embodiment, is a composite of silicon dioxide and silicon nitride layers. The device is designed to permit solder contacts to be made to the P and N regions thereof without possibility of shorting to semiconductor regions of opposite type conductivity.

Production of semiconductor device

Abstract: PURPOSE:To obtain a semiconductor device where a varactor diode and a PIN diode are stable and the junction having a density distribution is steps can be formed. CONSTITUTION:A P layer is formed on a N-type epitaxial wafer by epitaxial growth, and next, a P layer is formed from the P layer surface by thermal diffusion, or a N layer is formed on the P-type epitaxial wafer by epitaxial growth. Next, N layer is formed from the N layer surface by heat diffusion, thereby forming PN junction.