Showing papers on "Page layout published in 1982"

Hierarchical Top-Down Layout Design Method for VLSI Chip

Abstract: A new hierarchical top-down layout design system for custom VLSIs has been developed. A top-down global route assignment process reduces the redundant wiring area. Routing in a single path over the whole chip enables efficient chip area use.

LAMBDA: A quick, low cost layout design system for master-slice LSI s

Abstract: This paper describes an automatic/interactive layout design system for designing master-slice LSI chips, which places function blocks and gives wiring patterns on the chip. Since 100% routing is essential for master-slice layout design, it is urgently required to establish a strong CAD system, which significantly reduces the design time. The LAMBDA system has been developed to achieve complete net connectivity in as short a design time as possible, where efficient automatic procedures are implemented as well as highly interactive functions. The system adopts two-level hierarchy algorithms for placement and routing problems. Highly interactive functions are realized by exploiting human intelligence and the computer's high speed processing.

Computer Automated Page Layout (PLA) for Text-Graphic Materials: User's Guide.

Abstract: : This user's guide describes computer routines called PLA for automating the layout of highly illustrated pages describing equipment operation and maintenance procedures. This guide enables the relatively inexperienced author to prepare job performance aids and portions of procedure training aids. It describes how to (1) document procedures to be presented, (2) prepare data for use with PLA, and (3) run the PLA routines. (Author)