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Page layout

About: Page layout is a research topic. Over the lifetime, 2266 publications have been published within this topic receiving 23261 citations.


Papers
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Journal Article
TL;DR: In this paper, Dynamic layout problem is solved using Genetic algorithm, and this Dynamic Problem is restricted up to two-time periods only.
Abstract: In today's economy, manufacturing plants must be able to operate efficiently and respond quickly to changes in the product mix and demand.(1) Layout design has a significant impact on manufacturing efficiency. Initially, it was treated as a static decision but due to improvements in technology, it is possible to rearrange the manufacturing facilities in different scenarios. The Plant layout affects on the total cost in the industry. Nowadays Dynamic layout is becoming an important issue. Dynamic layout is the different layout at different time periods to satisfy the needs of industry; due to change in product, or reduced product life cycle, or change in demand. Layout problem is a quadratic assignment problem, and for larger size problems it becomes impossible to be solved. So, for solving this problem Meta heuristic algorithms are used. In this paper, Dynamic layout problem is solved using Genetic algorithm. This Dynamic Problem is restricted up to two-time periods only.

6 citations

Patent
18 Oct 1994
TL;DR: In this paper, an automatic page-up rule generation device is proposed, which can easily set a rule for automatically generating a page layout, based on the operation data and the master-slave relation in a page.
Abstract: PURPOSE: To provide an automatic page-up rule generation device which can easily set a rule for automatically generating a page layout. CONSTITUTION: This device consists of a material data base 19 which stores plural data (character data and image data) to be laid out, an instruction input means 15 for inputting operation data corresponding to operator's, instructions, a template generating means 18 which generates a template in hierarchical structure corresponding to the master-slave relation in a page, a display means 14, and an instruction generation part 20 which converts the template into a series of scripts. The template generating means 18 displays information for inputting the operation data on an interactive basis by the display means 14, sets the rule for automatically generating the page layout on the basis of the operation data, and integrates respective set rules in page units to generate the template.

6 citations

Patent
26 Aug 2015
TL;DR: In this paper, the authors provide compositions and methods for the collection of rare cells using an interspersed microstructure design, which is similar to the one described in this paper.
Abstract: The disclosure provides for compositions and methods for the collection of rare cells using an interspersed microstructure design.

6 citations

Journal ArticleDOI
TL;DR: In this article, the authors proposed a layout design method that considers not only the layout of bays, but also layout of guide path loops to minimize the total inter-bay flow distance of wafer cassettes.
Abstract: In this paper, we study the bay layout problem in a semiconductor fab. One unique characteristic of this bay layout problem is that bays are connected by two inter-bay guide path loops – a spine guide-path loop and a perimeter guide-path loop. To ensure bays can be correctly arranged on the floor and connected by both guide path loops, this dual-loop guide path configuration must be considered throughout the entire layout design procedure. To achieve this goal, we propose a layout design method that considers not only the layout of bays, but also the layout of guide path loops. Furthermore, to ensure the feasibility and quality of the layout results, the proposed layout method solves these two layout problems simultaneously. Since semiconductor fabs often have shortcuts set up on their spine guide path loops, the problem of setting up shortcuts is also studied here. The objective of the proposed layout method is to minimise the total inter-bay flow distance of wafer cassettes. Heuristic methods and mathem...

6 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202325
202273
202165
202093
2019124
201893