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Showing papers on "Parasitic capacitance published in 1970"


Journal ArticleDOI
TL;DR: In this article, a simple theory is given of the problem of stray capacitance in the Kelvin method and experimental results are presented which show the importance of its effects, and it is recommended that the stationary electrode should be connected to the input terminal of the detector, while the vibrating electrode and the walls of the vacuum chamber should both be earthed.
Abstract: A simple theory is given of the problem of stray capacitance in the Kelvin method and experimental results are presented which show the importance of its effects. These may cause differences of several tenths of a volt between the apparent contact potential difference and the true one. The magnitude of its effects is shown by these experiments to depend linearly on the following three factors: the cpd between the vibrating electrode and the walls of the vacuum chamber, the separation of the Kelvin electrodes and the amplitude of vibration. The simple theoretical approach correctly predicts the linear variation with the first of these factors. In order to reduce these effects to a minimum it is recommended that the stationary electrode should be connected to the input terminal of the detector, while the vibrating electrode and the walls of the vacuum chamber should both be earthed, and the vibrating electrode should preferably act as the reference surface.

35 citations


Patent
Marcian E. Hoff1
13 Mar 1970
TL;DR: In this article, the parasitic capacitance associated with the lead and gate of a metaloxide-semiconductors (MOS) device was used for dynamic storage in a random access memory.
Abstract: A cell readily adaptable for use in a random-access integrated circuit memory which utilizes metal-oxide-semiconductors (MOS) devices is disclosed. The cell is a dynamic storage device which utilizes the parasitic capacitance associated with the lead and gate of an MOS device for storage. The cell is adaptable for use in a memory which has a separate select-write line, select-read line, write data line and read data line, and is not particularly sensitive to the signal level on these lines as are previous cells.

26 citations


Patent
30 Jan 1970
TL;DR: In this paper, a humidity-sensitive capacitance transducer is connected in one leg of a modified Maxwell commutated DC bridge with the other legs formed of resistors, and a crystal-controlled oscillator actuates a pair of transistors to alternately connect the condition-sensitive transducers in a discharging circuit and in a charging circuit in the bridge network.
Abstract: A humidity-sensitive capacitance sensor or transducer is connected in one leg of a modified Maxwell commutated DC bridge with the other legs formed of resistors. The sensor continually senses the humidity condition and establishes a proportional output signal of the bridge in accordance with changes in capacitance over a small range on a suitable galvanometer. A crystal-controlled oscillator actuates a pair of transistors to alternately connect the condition-sensitive capacitance transducer in a discharging circuit and in a charging circuit in the bridge network. The capacitance transducer alternately charges and discharges with a null output at a given condition and a proportionate output in response to any deviation of the condition sensed by the capacitance sensor. A span adjustment and a charge reservoir capacitor are employed to facilitate the operation.

20 citations


Patent
25 Feb 1970
TL;DR: In this paper, a tunable resonant circuit includes a pair of inductors serially connected between input and output terminals, and the parallel combination of a third inductor and a voltage-responsive capacitance device are coupled from the junction of the pair of Inductive inductors to a point of reference potential.
Abstract: A tunable resonant circuit includes a pair of inductors serially connected between input and output terminals. The parallel combination of a third inductor and a voltage-responsive capacitance device are coupled from the junction of the pair of inductors to a point of reference potential.

14 citations


Patent
06 Oct 1970
TL;DR: In this paper, two series-connected transistor chains have an output terminal at their junction and are connected in series with a high-voltage power supply, which may include stray capacitance of the system.
Abstract: Two series-connected transistor chains have an output terminal at their junction and are connected in series with a high-voltage power supply. The output terminal is connected to ground through an output capacitor, which may include stray capacitance of the system. The base circuits of each of the transistor chains are transformer coupled to controlled amplitude oscillators which modulate the transistor outputs between given amplitudes. Control of the first transistor chain causes an increase in output by charging the output capacitor to given levels while control of the second transistor chain causes a decrease in voltage output to a minimum value by permitting discharge of the output capacitor. The output of the oscillators is controlled from an operational amplifier which is controlled, in turn, from a function generator.

13 citations


Journal ArticleDOI
TL;DR: High impedance source with shunt capacitance, discussing periodic output measurement using operational amplifier as mentioned in this paper, discussed the performance of high impedance source and shunt capacitor, discussed the characteristics of shunt.
Abstract: High impedance source with shunt capacitance, discussing periodic output measurement using operational amplifier

7 citations


Patent
18 Sep 1970
TL;DR: In this paper, the distributed capacitance at circuit nodes between conduction paths of interconnected field effect transistors of a memory decoder is maintained charged to a fixed value during the major portion of the memory operating time.
Abstract: The distributed capacitance at circuit nodes between conduction paths of interconnected field-effect transistors of a memory decoder is maintained charged to a fixed value during the major portion of the memory operating time. As one example, the distributed capacitance at a column of the memory may be connected to the charging source except for the brief intervals during which a location in that column is being accessed. Operation in this way improves both the speed and reliability of the decoder circuit.

7 citations


Patent
14 Dec 1970
TL;DR: A circuit for testing breakdown conditions of insulation in networks or circuitry where substantial amounts of stray capacitance exist between the conductor under test and return paths such as ground is described in this paper. But this circuit is not suitable for wireless networks.
Abstract: A circuit for testing breakdown conditions of insulation in networks or circuitry where substantial amounts of stray capacitance exist between the conductor under test and return paths such as ground. Measurement of real current flowing through the network under test permits high speed testing without concern for stray capacitance effects.

5 citations


Patent
16 Oct 1970
TL;DR: In this paper, a servoed transducer system uses differential sensing capacitors to detect the movement of a pivoted seismic mass, and the capacitors are electrically floating and using stray capacitance to a torque coil on the seismic mass to complete a pickoff sensor and detector circuit.
Abstract: A servoed transducer system uses differential sensing capacitors to detect the movement of a pivoted seismic mass. Electrostatic forces across the sensing capacitors are reduced by electrically floating the capacitors and using stray capacitance to a torque coil on the seismic mass to complete a pickoff sensor and detector circuit which generates an error signal in response to movement of the seismic mass. A servoamplifier maintains a constant current through the torque coil for a fixed error signal in order to rebalance the seismic mass.

5 citations


Patent
Seiji Sumi1, Isao Kaneda1
26 Feb 1970
TL;DR: In this paper, a nonlinear circuit consisting of first and second circuits is presented, where the first circuit comprises a power source, an inductance element L1 and a capacitance element C connected in an oscillating arrangement.
Abstract: A nonlinear circuit consisting of first and second circuits. The first circuit comprises a power source, an inductance element L1 and a capacitance element C connected in an oscillating arrangement. The second closed circuit comprises said capacitance element, an inductance element L2 and a voltage responsive switching element. The second closed circuit is controlled for operation under either oscillating or nonoscillating condition depending on the necessary output voltage.

4 citations


Proceedings ArticleDOI
K. Goser1
01 Jan 1970
TL;DR: In this article, an equivalent circuit for IGFETs displaying intrinsic cutoff frequencies can be derived from a physical model to describe the formation and disappearance of the channel, which may be useful in analysis of microwave circuits with FGETs and in the simulation of ICs where transistors with long channels or substrates with high doping levels are used.
Abstract: An equivalent circuit for IGFETs displaying intrinsic cutoff frequencies can be derived from a physical model to describe the formation and disappearance of the channel. Circuit may be useful in analysis of microwave circuits with IGFETs and in the simulation of ICs where transistors with long channels or substrates with high doping levels are used.

Journal ArticleDOI
TL;DR: A circuit is described that produces capacitance neutralization for double barreled microelectrodes by compensating for mutual capacitance between electrodes, while the other two adjustments neutralize the capacitance to ground of each electrode.
Abstract: A circuit is described that produces capacitance neutralization for double barreled microelectrodes. One adjustment compensates for mutual capacitance between electrodes, while the other two adjustments neutralize the capacitance to ground of each electrode.

Patent
10 Aug 1970
TL;DR: In this article, a method and apparatus for providing a pyroelectric detector with stray capacitance reducing shielding is described, where the detector is coupled to the output of the detector output signal amplifier through a suitable feedback network to maintain the housing at output signal potential.
Abstract: A method and apparatus for providing a pyroelectric detector with stray capacitance reducing shielding is disclosed herein. In order to minimize stray capacitance of the detector, the housing of the detector is coupled to the output of the detector output signal amplifier through a suitable feedback network to maintain the housing at output signal potential. The capacitive impedance between the housing and the various electrical leads is then apparently infinite.

Patent
21 Jul 1970
TL;DR: In this article, the authors propose a dynamic circuit arrangement which is operable by clock pulses, particularly a storage element or a shift register stage, and which comprises at least two capacitances, each capacitance having a charging circuit comprising a diode and a discharge circuit comprising two insulated gate or MOS field effect transistor whose controllable current paths are connected in series.
Abstract: A dynamic circuit arrangement which is operable by clock pulses, particularly a storage element or a shift register stage, and which comprises at least two capacitances, each capacitance having a charging circuit comprising a diode and a discharge circuit comprising two insulated gate or MOS field effect transistor whose controllable current paths are connected in series, in which the charging circuit of each capacitance is connected in series with the discharge circuit associated with the same capacitance.

Journal ArticleDOI
01 Dec 1970
TL;DR: In this paper, the authors derived analytical closed-form switching time expressions of a tunnel diode considering the voltage dependence of the diode junction capacitance and a small inductance that is always associated with the trigger circuit.
Abstract: Analytic closed-form switching time expressions of a tunnel diode are derived considering the voltage dependence of the diode junction capacitance and a small inductance that is always associated with the trigger circuit. The contribution due to the capacitance variation and that due to the inductance are expressed by a separate term added in the usual switching time results.


Patent
30 Sep 1970
TL;DR: In this article, an analogue storage circuit is presented, where an analogue voltage is stored on a capacitor by writing pulses from a low-impedance source applied through a transistor connected to the input and the capacitor via respective unilaterally conducting devices.
Abstract: 1,206,934. Analogue storage circuit. MINISTER OF TECHNOLOGY. 31 Oct., 1967 [2 Nov., 1966], No. 49091/66. Heading H3T. An analogue voltage is stored on a capacitor by writing pulses from a low-impedance source applied through a transistor connected to the input and the capacitor via respective unilaterally conducting devices, and is read out by means of pulses from a high-impedance source connected to the capacitor and to an output circuit via respective further unilaterally conductive devices. In Fig. 2 an analogue voltage at V in is transferred to the capacitor C1 by an enabling pulse on transistor Q4 which turns on Q3 and allows diodes D1 and D2 to conduct. The duration of the enabling pulse should be very much greater than the time-constant C1R1, and the latter should be less than the period of any variations in V in . To read out, a positive pulse is applied to the top of R2 so that diodes D3 and D4 and transistor Q2 are turned on and the voltage on C1 is transferred to V out . The duration of the read-out pulse should be much less than the time-constant of C1R2 (so that the read-out will be non-destructive), but longer than COR2 where CO is the stray capacitance between the base of Q2 and earth. This capacitance is discharged through diodes D6 and D7 and transistor Q6 by turning on the latter immediately before read out. The above circuit may be arranged in multiple to form a matrix, with transistor Q1 and resistor R3 common to all the circuits. Those in one row may be activated in succession by applying a long enabling pulse to transistor Q5 and a succession of shorter pulses to Q4, thus sampling V in at different instants in time. The bases of Q4 and Q5 in several rows may each be connected to a single stage of two separate ring counters (not shown), one selecting a row and the other a particular circuit in a row. Transistor Q2 may similarly be common to a row of circuits, read-out being enabled by a long positive pulse on the collector of Q2. This and R2 may be connected to ring counters as for Q4 and Q5. To maintain the voltage on C1 for a long time, the read-out voltage may be applied to a voltmeter having an output connected to a digital-to-analogue converter and the next highest voltage step impressed on C1. Transistors of opposite conductivity types may be used, with reversal of polarities of the diodes and supplies. Q2 may be a cathode-follower valve. The arrangement may be used to store information obtained during the ultrasonic testing of metallic objects.

Proceedings ArticleDOI
J.A. Schoeff1
01 Jan 1970
TL;DR: Polycrystalline silicon regions in the epitaxial layer of integrated circuits can perform isolation and buried-layer contact, and form surface elements such as field plates, capacitors, crossunders, and electrostatic shields as discussed by the authors.
Abstract: Polycrystalline silicon regions in the epitaxial layer of integrated circuits can perform isolation and buried-layer contact, and form surface elements such as field plates, capacitors, crossunders, and electrostatic shields. Recent experimental developments include new methods of selective growth and doping of these polycrystalline regions to provide very high voltage breakdown, low parasitic capacitance, and smooth surfaces with excellent pattern definition.

Journal ArticleDOI
TL;DR: In this article, a network is deve loped which can be used with a voltage variable capacitance diode (varicap) to obtain a variety of capacitance versus voltage characteristics.
Abstract: A network is deve loped which can be used with a voltage variable capacitance diode (varicap) to obtain a variety of capacitance versus voltage characteristics. This approach is useful when the shape of the capacitance versus voltage characteristic of available varicaps is not suitable for a particular application. A television color sub-carrier A.P.C. system is given as a practical example where this technique is used to produce symmetrical behavior with respect to hold-in and pull-in.

Journal ArticleDOI
TL;DR: In this paper, the parametric amplifier is analyzed in terms of its equivalent circuit, which consists of three resonant circuits with resonant frequencies W1 W2 and W3 known as signal, idling and pump respectively coupled to a nonlinear variable capacitance.
Abstract: In the present paper the parametric amplifier is analysed in terms of its equivalent circuit. Three resonant circuits with resonant frequencies W1 W2 and W3 known as signal, idling and pump respectively are coupled to a nonlinear variable capacitance. The charge in the non-linear capacitance is assumed to vary as a quadratic function of the voltage across it. Expressions for the parametric gain, net power gain, bandwidth and noise figure for the two cases of the negative conductance amplifier, one in which the signal and idling frequencies are well separated and the other in which the two frequencies are same, have been obtained.

Journal ArticleDOI
TL;DR: In this paper, an analysis of the packaged-diode-series resonant and antiresonant conditions of oscillation was carried out for coaxial-cavity avalanche transit-time oscillators.
Abstract: Analyses of the packaged-diode-series resonant and antiresonant conditions of oscillation show that the antiresonant condition exhibits frequency versus temperature stability which is greatly improved as compared with that of the resonant condition. Frequency variation with temperature in coaxial-cavity avalanche transit-time oscillators is predominantly due to diode junction capacitance and cavity-length changes with temperature. By operation of the oscillator in the antiresonant condition, the effects of both the diode junction capacitance and the cavity-length changes with temperature are greatly reduced as compared with those observed in the resonant condition of oscillation. (The circuit will oscillate for line lengths intermediate to resonance and antiresonance; however, the temperature coefficient will depend on the extent to which the element C/sub a/ is shunted by the line.)