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Parasitic capacitance

About: Parasitic capacitance is a research topic. Over the lifetime, 10029 publications have been published within this topic receiving 110331 citations.


Papers
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Proceedings ArticleDOI
Matsuura1, Tsukada, Ohba, Imaizumi, Sato, Ueda 
01 Jan 1988

41 citations

Proceedings Article
01 Jan 1999
TL;DR: In this paper, the key features of Infineons 75 GHz SiGe Bipolar production are presented, along with a detailed analysis of the performance of the SiGe bipolar production.
Abstract: This paper presents the key features of Infineons 75 GHz .SiGe Bipolar production

41 citations

Patent
20 Oct 1999
TL;DR: In this paper, a positive-negative type high frequency switching power supply unit was proposed to provide reliable switching with very low switching loss without being influenced by a leakage inductance of the load side, a parasitic capacitance and a parasitic inductance produced by a wiring line or the like, and a load condition.
Abstract: The invention provides a positive-negative type high frequency switching power supply unit which provides a high frequency output of an ideal sine waveform to allow reliable switching with very low switching loss without being influenced by a leakage inductance of the load side, a parasitic capacitance and a parasitic inductance produced by a wiring line or the like, and a load condition. The positive-negative type high frequency switching power supply unit includes an H-bridge switching circuit including four semiconductor switching elements connected in an H-bridge connection, a resonance circuit which resonates with a positive-negative pulse wave outputted from the H-bridge switching circuit, and a PWM control circuit for detecting a voltage and current of the resonance circuit by means of a pulse transformer and a current detector, respectively, and feeding back the voltage and current to the H-bridge switching circuit so that the four semiconductor switching elements may perform switching operations in a switching frequency higher than the resonance frequency of the resonance circuit in a fixed switching pattern of on/off states.

41 citations

Patent
22 Nov 1995
TL;DR: In this article, a method for calculating the parasitic capacitance in a semiconductor device is presented, where a layout file containing the shapes of the semiconductor devices is provided, and the dimensions of the layout file are then adjusted to wafer dimensions so as to reflect actual production devices.
Abstract: According to the present embodiment, a method for calculating the parasitic capacitance in a semiconductor device is disclosed. According to the preferred method, a layout file containing the shapes of a semiconductor device is provided. The dimensions of the layout file are then adjusted to wafer dimensions so as reflect actual production devices. The shapes of the layout file are then partitioned into simpler shapes, typically abutted rectangles, called tiles. Each tile is then decomposed into overlap and fringe capacitance components, each component having a uniform capacitance environment with respect to its capacitance elements. The parasitic capacitance of the semiconductor device can thus be accurately computed, with an efficient use of resources. Additionally the preferred embodiment is easily adaptable to a wide range of technology types.

41 citations

Journal ArticleDOI
TL;DR: In this paper, a high-voltage capacitance ratio bridge based on the current comparator principle is described and the inherent advantages of this bridge are high sensitivity and high accuracy without the necessity of a secondary balance.
Abstract: A high-voltage capacitance ratio bridge based on the current comparator principle is described. The inherent advantages of this bridge are high sensitivity and high accuracy without the necessity of a secondary balance. By suitable design the bridge is made direct reading in capacitance ratio and dissipation factor. It has a resolution of 1 ppm (part per million) and an accuracy of approximately 10 ppm. The highest capacitance ratio internally available with full resolution is 1,000/1. Design considerations and construction details are given. Possible applications are discussed.

41 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202364
2022156
2021179
2020344
2019380
2018382