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Parasitic capacitance

About: Parasitic capacitance is a research topic. Over the lifetime, 10029 publications have been published within this topic receiving 110331 citations.


Papers
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Patent
Helen Margaret Waite1
06 Jun 2000
TL;DR: In this paper, a radio frequency device has an input transistor from which a capacitance is seen, and a fast charging circuit for charging the capacitance, which reduces the switching-on time of the device.
Abstract: A radio frequency device has an input transistor from which a capacitance is seen, and a fast charging circuit for charging the capacitance. The input transistor receives a radio frequency signal. The capacitance is quickly charged when the device is switched from off to on and/or from low gain to high gain, thereby reducing the switching-on time of the device.

35 citations

Patent
13 Aug 1998
TL;DR: In this paper, the authors proposed an integrated circuit (IC) capacitor, which includes a first polysilicon layer, a super-jacent second polyicon layer and an overlying metal layer.
Abstract: An integrated circuit (IC) capacitor offers reduced sensitivity to parasitic capacitance, reduced-size, and increased noise immunity, such as for use in digital-to-analog converters (DACs), analog-to-digital converters (ADCs), switched-capacitor filters, and other IC circuits. The capacitor includes a first polysilicon layer, a superjacent second polysilicon layer separated from the first polysilicon layer by an insulator, and an overlying metal layer separated from the second polysilicon layer by an insulator. The metal layer provides a shield that is connected to a known voltage, or to the first polysilicon layer. When connected to the first polysilicon layer, the overlying metal layer also provides additional parallel capacitance, thereby reducing the integrated circuit area of the capacitor. In one example, the overlying metal layer is a second metal layer that is also used, together with a first metal layer, for interconnecting IC components.

35 citations

Journal ArticleDOI
TL;DR: In this article, the two-dimensional electron gas concentration and capacitance in double-heterojunction high-electron-mobility transistors (DH-HEMTs) are calculated as a function of gate voltage using simple iterative solutions of analytical equations.
Abstract: The two-dimensional electron gas concentration and capacitance in AlGaAs/GaAs/AlGaAs double-heterojunction high-electron-mobility transistors (DH-HEMTs) are calculated as a function of gate voltage using simple iterative solutions of analytical equations. The results show very good agreement with experimental data, as well as with characteristics predicted by complex numerical methods. The calculations are extended to predict the capacitance-voltage characteristics in the presence of parasitic conduction when the gate does not fully control the two-dimensional gas. The developed charge control and capacitance models are easy and inexpensive to run. They are therefore very useful for microwave circuit designs. Furthermore, they can be used for performance prediction and design optimization of DH-HEMTs. The influence of technological parameters, such as layer thickness and aluminum composition, on device performance are presented. >

35 citations

Patent
04 Feb 2011
TL;DR: In this article, a power converter with an arm including switching devices connected in parallel, realizing long lifespans of switching devices, is presented, where an inverter includes an upper and a lower arm, and gate drive circuits each driving the corresponding arm according to a gate control signal Gup_s indicating ON/OFF periods.
Abstract: The present invention aims to provide a power converter with an arm including switching devices connected in parallel, realizing long lifespans of switching devices. An inverter includes an upper and a lower arm, and gate drive circuits each driving the corresponding arm according to a gate control signal Gup_s indicating ON/OFF periods. Each arm includes switching devices connected in parallel. Each gate drive circuit includes: a switching gate control circuit 230 u bringing a switching device 210 u into conduction at the beginning of the ON period and bringing the same out of conduction within the ON period; and a conduction gate control circuit 231 u bringing switching devices 211 u and 212 u within a period from when the switching device 210 u is brought into conduction until the same is brought out of conduction, wherein the switching device 210 u has a lower parasitic capacitance than the switching devices 211 u and the 212 u.

35 citations

Patent
William L. Larson1
23 Jul 2003
TL;DR: In this article, the use of PIN diodes to shunt overvoltage away from internal circuit elements was proposed to protect against circuit damage due to over-voltage events while keeping capacitance low.
Abstract: A device and method of manufacture for a low capacitance overvoltage protection device. This is accomplished through the use of PIN diodes to shunt overvoltage away from internal circuit elements. PiN diodes are useful because they exhibit a low capacitance in reverse bias mode. Radio frequency integrated circuits and other integrated circuits operated at high frequency are sensitive to capacitance. This invention protects against circuit damage due to overvoltage events while keeping capacitance low through the use of PiN diodes.

35 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202364
2022156
2021179
2020344
2019380
2018382