Parasitic capacitance

About: Parasitic capacitance is a research topic. Over the lifetime, 10029 publications have been published within this topic receiving 110331 citations.

VLSI wiring capacitance

Abstract: Accurate prediction of device current and the capacitance to be driven by that current is key to the design of integrated logic and memory circuits. A finite-element algorithm is described which simulates the capacitance of structures with general shape in two or three dimensions. Efficient solution of the linear equations is provided by the incomplete Cholesky conjugate gradient method. The model is used to simulate the wiring capacitance of a 1.25-micrometer VLSI technology. The predicted capacitances of closely spaced first-metal polycide-gate and second-metal conductors used in this technology agree with measured results. The simulated three-dimensional capacitance of a second-metal line crossing a first-metal line is twice that found when estimated by two-dimensional models. The effect of line-to-line capacitance on the noise margin of logic circuits and on the signal in a dynamic RAM is examined. This capacitance presents a limit to wiring density for logic circuits and is a significant signal detractor in dynamic RAMs with closely spaced metal or diffused bit lines.

Analysis of stray capacitance in the Kelvin method

Abstract: We present a theoretical analysis of the Kelvin probe circuit taking into account both the parallel capacity induced by the connecting cables and fringing fields. We demonstrate a simple explicit solution for low modulation index e and suggest an optimized detection method for e close to unity. We extend the analysis to include stray capacitance terms for both the static‐ and vibrating‐plate earthed (spe, vpe) configurations and examine the variation in apparent contact potential difference Vapp as a function of the Kelvin probe mean spacing. This analysis is primarily intended for UHV applications where shielding problems, due either to connecting cables within the system or nonideal system configurations, e.g., imposed by sample mounting constraints, are nontrivial. Using a specially developed computer‐steered Kelvin probe and shield potential Vs coupled to a data acquisition system (DAS) we have tested the above model. We find Vapp to be linear with Vs and varies quadratically with mean spacing in both...

Novel grid-connected non-isolated converters for photovoltaic systems with grounded generator

Abstract: In the photovoltaic branch, transformerless inverters are nowadays the majority of the systems installed in Europe, mainly because of the higher level of efficiency and reduced cost and weight when compared with their counterparts with transformer, whether this concerns low- frequency or high-frequency models. Nevertheless, some limitations arise for the operation of such systems, mainly regarding the fact that normally the panel output cannot be grounded, what is, for example not allowed in USA. Non- grounded operation of panels composed of some new cells technologies can bring undesired effects like cell aging and efficiency reduction. In addition, security matters regarding leakage current due to the panel parasitic capacitance are also a common problem in such systems. In order to address such matters, this paper proposes a novel DC-DC converter for the application in transformerless photovoltaic systems. As main characteristic, it allows the grounding of the negative output of the photovoltaic array and provides a bipolar output voltage. Following the proposition of the circuit, the analysis and evaluation will be performed. A prototype was built and the experimental results are presented in the end.

A Versatile Active Circuit for Realising Floating Inductance, Capacitance, FDNR and Admittance Converter

Abstract: An active circuit suitable for realizing floating inductance, capacitance, FDNR and admittance converter depending on the selection of passive elements of the circuit is presented. The proposed circuit employs only two dual output second-generation current conveyors (DO-CCIIs) and does not require passive element matching. The proposed network has a grounded capacitor for the floating inductance and capacitance simulation. Frequency performance of the circuit is tested using SPICE.

A Review of Switching Oscillations of Wide Bandgap Semiconductor Devices

Abstract: Wide bandgap (WBG) devices offer the advantages of high frequency, high efficiency, and high power density to power converters due to their excellent performance. However, their low parasitic capacitance and fast switching speed also make them more susceptible to switching oscillations. The switching oscillations can cause voltage and current overshoots, shoot-through, electromagnetic interference, additional power loss, and even device damage, which can seriously affect the performance of power converters and systems. However, a comprehensive and in-depth overview is lacking on this topic. This article reviews the types, the causes and negative effects, the effects of parasitic parameters and suppression methods of these switching oscillations, which is helpful for practical engineering. First, the switching oscillations are divided into different types, and their causes and negative effects are reviewed. Then, the effects of different parasitic parameters on the switching oscillations are overviewed. It is found that due to the different physical structures of silicon carbide metal-oxide-semiconductor field-effect transistors, enhancement-mode gallium nitride high-electron mobility transistors (eGaN HEMTs), and cascode GaN HEMTs, the effects are also different. Finally, the main methods of suppressing the switching oscillations are summarized, and the advantages and disadvantages of these methods are presented. Furthermore, future research works on this topic and the conclusion of this paper are drawn, which will help readers deepen their understanding of the switching oscillations of WBG devices, and inspire readers to better use WBG devices for high-frequency and high-efficient power conversion.