Parasitic capacitance

About: Parasitic capacitance is a research topic. Over the lifetime, 10029 publications have been published within this topic receiving 110331 citations.

Double and triple charge pump for power IC: dynamic models which take parasitic effects into account

Abstract: An optimized design methodology for the double and triple charge pump is proposed. The circuits discussed given an output voltage greater than the supply voltage and are commonly used to power 1C or memory to allow the switching on of an MOS device. Theoretical models of charge pumps in the transient region are given. The models take parasitic capacitances and current leakage into account. They allow better knowledge of the circuit dynamics to be obtained and an optimized design to be achieved. >

Superconducting and Insulating Behavior in One-Dimensional Josephson Junction Arrays

Abstract: Experiments on one-dimensional small capacitance JosephsonJunction arrays are described. The arrays have a junctioncapacitance that is much larger than the stray capacitance ofthe electrodes, which we argue is important for observation ofCoulomb blockade. The Josephson energy can be tuned in situand an evolution from Josephson-like to Coulomb blockadebehavior is observed. This evolution can be described as asuperconducting to insulating, quantum phase transition. Inthe Coulomb blockade state, hysteretic current-voltagecharacteristics are described by a dynamic model which is dualto the resistively shunted junction model of classicalJosephson junctions.

A review of GaN HEMT broadband power amplifiers

Abstract: The unique material properties of GaN, wide bandgap, high thermal conductivity, high breakdown voltage, high electron mobility and the device properties of GaN HEMT (High Electron Mobility Transistor) namely low parasitic capacitance, low turn on resistance and high cut off frequencies make it a good choice to use in a power amplifier. During this era of wire- less communication with complex modulation schemes having high peak to average power ratio, maintaining the efficiency and linearity of power amplifier is a tough task. In this paper an extensive review of GaN HEMT based power amplifier is presented. First of all, GaN technology is described and compared with other semiconductor technologies. The different classes of power amplifier like class B, C, D, E, F and J with GaN is discussed. Efficiency and linearity enhancement techniques like envelope tracking, Doherty power amplifier and digital predistortion used in applications with high PAPR waveforms is described. The advantages of GaN MMIC (Microwave Monolithic Integrated Circuit) are reviewed. Finally different thermal management solutions used for GaN power amplifier to cope with its self heating phenomenon are explained.

Compact Model for Carbon Nanotube Field-Effect Transistors Including Nonidealities and Calibrated With Experimental Data Down to 9-nm Gate Length

Abstract: A semianalytical carbon nanotube field-effect transistor (CNFET) model based on the virtual-source model is presented, which includes series resistance, parasitic capacitance, and direct source-to-drain tunneling leakage. The model is calibrated with recent experimental data down to 9-nm gate length. Device performance of 22- to 7-nm technology nodes is analyzed. The results suggest that contact resistance is the key performance limiter for CNFETs; direct source-to-drain tunneling results in significant leakage due to low effective mass in carbon nanotubes and prevents further downscaling of the gate length. The design space that minimizes the gate delay in CNFETs subject to OFF-state leakage current (IOFF) constraints is explored. Through the optimization of the length of the gate, contact, and extension regions to balance the parasitic effects, the gate delay can be improved by more than 10% at 11- and 7-nm technology nodes compared with the conventional 0.7 × scaling rule, while the OFF-state leakage current remains below 0.5 μA/μm .

Device for measuring the relative position of two objects

Abstract: A device for measuring the relative position of two objects by variation of capacitance. The device comprises a capacitive detector of the differential type which has at least two first electrodes adapted to be mechanically connected to one of the objects and at least a second electrode adapted to be mechanically connected to the other object and forming with the first electrodes two capacitances which vary as a function of the relative position of the objects. These two capacitances are in a ratio which is only a function of this relative position. There is provided a circuit for determining the values of these capacitances. The measuring device further comprises switching means for selectively connecting said capacitances to the input of said value determining circuit so as to measure successively said capacitances and also the parasitic capacitance inherent in the measuring system.