Topic
Phase margin
About: Phase margin is a research topic. Over the lifetime, 3392 publications have been published within this topic receiving 38899 citations.
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TL;DR: In this article, a method for tuning the PI λ D μ controller is proposed to fulfill five different design specifications, including gain crossover frequency, phase margin, and iso-damping property of the system.
881 citations
TL;DR: The results in this paper can be used to predict the achievable rise time of the closed-loop system, which is useful for self-diagnosis—a desirable feature of ‘intelligent’ controllers.
543 citations
01 Dec 1976
TL;DR: Multi-loop linear-quadratic state-feedback regulators are shown to be robust against a variety of large dynamical, time-varying, and non-linear variations in open-loop dynamics, strengthening the link between classical and modern feed-back theory.
Abstract: Multiloop linear-quadratic state-feedback (LQSF) regulators are shown to be robust against a variety of large dynamical linear time-invariant and memoryless nonlinear time-varying variations in open-loop dynamics. The results are interpreted in terms of the classical concepts of gain and phase margin, thus strengthening the link between classical and modern feedback theory.
518 citations
TL;DR: In this paper, the authors present a 1-V analog op-amp with rail-to-rail input and output ranges, which achieves 1.3 MHz unity gain and 57/spl deg/ phase margin for a 22pF load capacitance.
Abstract: This paper addresses the difficulty of designing 1-V capable analog circuits in standard digital complementary metal-oxide-semiconductor (CMOS) technology, Design techniques for facilitating 1-V operation are discussed and 1-V analog building block circuits are presented. Most of these circuits use the bulk-driving technique to circumvent the metal-oxide-semiconductor field-effect transistor turn-on (threshold) voltage requirement. Finally, techniques are combined within a 1-V CMOS operational amplifier with rail-to-rail input and output ranges. While consuming 300 /spl mu/W, the 1-V rail-to-rail CMOS op amp achieves 1.3-MHz unity-gain frequency and 57/spl deg/ phase margin for a 22-pF load capacitance.
408 citations
TL;DR: An algorithm based on determining a set of global stability regions corresponding to the fractional orders lambda and mu in the range of (0, 2) and choosing the biggest global stability region in this set is presented.
Abstract: This technical note presents a solution to the problem of stabilizing a given fractional-order system with time delay using fractional-order PllambdaDmu controllers. It is based on determining a set of global stability regions in the (kp, Ki, Kd)-space corresponding to the fractional orders lambda and mu in the range of (0, 2) and then choosing the biggest global stability region in this set. This method can be also used to find the set of stabilizing controllers that guarantees prespecified gain and phase margin requirements. The algorithm is simple and has reliable result which is illustrated by an example, and, hence, is practically useful in the analysis and design of fractional-order control systems.
387 citations