Topic
Phase-shift mask
About: Phase-shift mask is a research topic. Over the lifetime, 2088 publications have been published within this topic receiving 18058 citations.
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24 Jul 1996TL;DR: In this article, a discussion of the expected technologies, specifications, improvement of the process in manufacturing 1 Gb DRAM reticles are presented, as well as the expected methods such as DUV, phase shift mask (PSM), off-axis illumination (OA1), optical proximity correction (OPC), and combinations of these methods are considered.
Abstract: As the requirement of the more tightened design rule has been emerged, e-beam direct writing and x-ray lithography have been considered as next generation technology . However, due to the rapid development in photolithography, it will be employed in manufacturing 1 Gb DRAM. To overcome present optical lithographic technology, several possible techniques such as deep ultraviolet (DUV), phase shift mask (PSM), off-axis illumination (OA1), optical proximity correction (OPC), and combinations of these methods are considered. The advanced mask technology play a key role in these technologies and the tendency will be dramatically increased in near future. Although the resolution of 4X reticle for 0.18 μm device is 0.72 μm, the feature size less than 0.72 μm is necessary for wafer process latitude. Therefore, critical dimension (CD) linearity below 0.72 μm is needed for 1 Gb reticle, and the minimum resolution less than 0.3 μm should be resolved for the OPC patterns. At low acceleration voltage, however, both the CD linearity and the minimum resolution are so severely affected by electron scattering that small beam size, thin resist, and dose correction will be needed for reducing this effect. In order to satisfy the higher resolution, high acceleration voltage system should be employed. In addition, as the field size of device increases and process latitude on the wafer decreases, CD uniformity and defect control will be considered more serious than now. In this paper, discussion of the expected technologies, specifications, improvement of the process in manufacturing 1 Gb DRAM reticles are presented.
4 citations
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29 Jun 2006
TL;DR: In this article, a phase shift mask has a phase region to shift a phase of exposure light formed on a transparent substrate, and a light shielding film is formed on the side wall of the phase shift region so as to form a single dark pattern.
Abstract: PROBLEM TO BE SOLVED: To provide a phase shift mask and a method for forming a pattern, wherein a finer pattern can be formed than before and asymmetric intensity of exposure light is not caused. SOLUTION: The phase shift mask has a phase shift region to shift a phase of exposure light formed on a transparent substrate. A light shielding film is formed on a side wall of the phase shift region so as to form a single dark pattern by the phase shift region and the light shielding film laid on the side wall. COPYRIGHT: (C)2006,JPO&NCIPI
4 citations
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24 Feb 1993TL;DR: In this article, a phase shift mask (reticle) applied by a phase shifting method and imparting a predetermined phase difference is used to obtain an aligner and a method for manufacturing a semiconductor element in which a pattern image of high resolution is obtained by maintaining environmental conditions desirably when a pattern is exposed on a wafer surface by using a phase shifter.
Abstract: PURPOSE:To obtain an aligner and a method for manufacturing a semiconductor element in which a pattern image of high resolution is obtained by maintaining environmental conditions desirably when a pattern is exposed on a wafer surface by using a phase shift mask (reticle) applied by a phase shifting method and imparting a predetermined phase difference. CONSTITUTION:A aligner exposes a phase shift mask 2 provided with a phase shift film 22 for imparting a predetermined phase difference to a passed luminous flux to part of a transparent part of a pattern having the transparent part and an opaque part to an object 6 to be exposed, and comprises control means 8 for controlling environmental conditions in an atmosphere of the mask.
4 citations
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21 Aug 2000TL;DR: In this paper, the first data biased pattern has at least some first resolution spacing falling between a discrete finite resolution spacing of which a writing tool used to fabricate the mask is capable of achieving.
Abstract: Disclosed are methods of forming alternating phase shift circuitry fabrication masks, methods of forming circuitry fabrication masks having a subtractive alternating phase shift region, and alternating phase shift masks. In one implementation, a method of forming an alternating phase shift circuitry fabrication mask incudes combining circuitry pattern data biasing and wet undercut etching of light transmissive substrate material adjacent phase shift regions of the mask in fabricating the mask. In one implementation, a method of forming an alternating phase shift circuitry fabrication mask includes combining circuitry pattern data biasing and wet undercut etching of light transmissive substrate material adjacent phase shift regions of the mask effective to achieve a first data biased pattern when using the mask to fabricate circuitry of a desired circuit pattern on another substrate. The first data biased pattern has at least some first resolution spacing falling between a discrete finite resolution spacing of which a writing tool used to fabricate the mask is capable of achieving.
4 citations
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19 Aug 2008
TL;DR: In this article, a halftone phase shift mask and a light shielding band light shielding film are used to satisfy both patterning accuracy and light shielding performance in using a hard mask.
Abstract: PROBLEM TO BE SOLVED: To satisfy both patterning accuracy and light shielding performance in using a hard mask and a light shielding band light shielding film in common relating to a method of manufacturing a halftone phase shift mask and a method of manufacturing a semiconductor device. SOLUTION: The manufacturing method includes: a process of sequentially forming a halftone film 2 and a hard mask-cum-light shielding film 3 on a transparent substrate 1; a process of forming a film decrease compensating light shielding film 4 on the hard mask-cum-light shielding film 3; a process of selectively eliminating the film decrease compensating light shielding film 4 on a main circuit region 6; a process of forming a pattern on the hard mask-light shielding film 3 exposed to the main circuit region 6 to form a hard mask 7; a process of etching the halftone film 2 with the hard mask 7 as a mask to form a halftone film pattern 8; and a process of leaving the film decrease compensating light shielding film 9 in the light shielding band area in the periphery of the main circuit region 6 in eliminating the hard mask 7. COPYRIGHT: (C)2010,JPO&INPIT
4 citations