Phased array

About: Phased array is a research topic. Over the lifetime, 19428 publications have been published within this topic receiving 229231 citations. The topic is also known as: Phased Array Radar, PAR.

Near-Field Imaging of Phased Array Metasurfaces

Abstract: Phased-antenna metasurfaces can impart abrupt, spatially dependent changes to the amplitude, phase, and polarization of light and thus mold wavefronts in a desired fashion. Here we present an experimental and computational near-field study of metasurfaces based on near-resonant V-shaped antennas and connect their near- and far-field optical responses. We show that far fields can be obtained from limited, experimentally obtained knowledge of the near fields, paving the way for experimental near-field characterization of metasurfaces and other optical nanostructures and prediction of their far fields from the near-field measurements.

Compressive sensing applied to radar systems: an overview

Abstract: Modern radar systems tend to utilize high bandwidth, which requires high sampling rate, and in many cases, these systems involve phased array configurations with a large number of transmit–receive elements. In contrast, the ultimate goal of a radar system is often to estimate only a limited number of target parameters. Thus, there is a pursuit to find better means to perform the radar signal acquisition as well as processing with much reduced amount of data and power requirement. Recently, there has been a great interest to consider compressive sensing (CS) for radar system design; CS is a novel technique which offers the framework for sparse signal detection and estimation for optimized data handling. In radars, CS enables the achievement of better range-Doppler resolution in comparison with the traditional techniques. However, CS requires the selection of suitable (sparse) signal model, the design of measurement system as well as the implementation of appropriate signal recovery method. This work attempts to present an overview of these CS aspects, particularly when CS is applied in monostatic pulse-Doppler and MIMO type of radars. Some of the associated challenges, e.g., grid mismatch and detector design issues, are also discussed.

A $Ku$ -Band Two-Antenna Four-Simultaneous Beams SiGe BiCMOS Phased Array Receiver

Abstract: This paper presents a Ku-band SiGe BiCMOS phased array receive chip capable of forming four-simultaneous beams from two antenna inputs. The design is based on the all-RF architecture with 4-bit active phase shifters and 4-bit variable gain amplifiers in each channel. The four-beam chip results in a gain of 4-6 dB per channel at 13-15 GHz, a noise figure of 10-11 dB, a worst case input P1 dB of -14.3 dBm per channel (input third-order intercept point of -7 dBm), and an rms phase and gain error of 40 dB at 13-15 GHz. The chips can operate over an instantaneous bandwidth of > 1 GHz at any frequency from 13 to 15 GHz, and the four beams can be at the same frequency if required. With all digital control circuitry and electrostatic discharge protection for all I/O pads, the chip occupies an area of 2.4 × 4.3 mm2 and consumes 520 mA at 3.5-V supply voltage. To our knowledge, this is the first demonstration of an all-RF phased array silicon chip capable of producing four-simultaneous beams from two different antennas or four-simultaneous beams of different polarizations from a dual polarization antenna. The application areas are in satellite communications and defense systems.

A 60-GHz band CMOS phased array transmitter utilizing compact baseband phase shifters

Abstract: A 60-GHz band phased array transmitter is developed based on 90-nm CMOS process featuring compact baseband phase shifters with ideally zero power consumption. The phase shifter changes an RF signal phase every π/2 by switching baseband signal paths. The transmitter has 6 RF front-ends and 6 phase shifters to implement beam steering function for a 1 × 6 array antenna system. Each of the RF front-ends exhibits typically a power of 0 dBm at 1-dB compression point, a conversion gain of 15 dB, and a 3-dB bandwidth of 600 MHz. By controlling phase shifters, the beam steering from 0 to 60 degree is observed. The chip size is 5 mm × 2.5 mm. The circuit consumes 960 mW at 1.0 V supply.

A thirty two element phased-array transceiver at 60GHz with RF-IF conversion block in 90nm flip chip CMOS process

Abstract: A 60 GHz 32 element bidirectional phase-darray TX/RX chip with a 2 bit phase shifter and IF converter to/from 12GHz, using 90nm CMOS process, is described. The array features 12.5 dB gain, noise figure (NF) of 11 dB, IP1dB of −17dbm for RX, and total output Psat of +8dBm for TX, drawing 390 mA from a 1.3-V supply. The RMS amplitude and phase error of the phase shifter is 0.8dB and 5° max respectively from 57 to 66 GHz. The paper emphasizes the flip-chip assembly technology selected and its impact on performance, and the phase and amplitude errors resulted by physical impairments such as the finite isolation between different chains. Special test structures were designed to measure bump isolation and insertion loss (IL). The designed architecture together with the compact layout results in a die area of 14.5mm2 for the full array. To our knowledge, this is the first report on a large bidirectional 60 GHz array, with the lowest reported chip power consumption and size.