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Showing papers on "Photomask published in 2003"


Patent
15 Jul 2003
TL;DR: In this article, a method of generating patterns of a pair of photomasks from a data set defining a circuit layout to be provided on a substrate includes identifying critical segments of the circuit layout on the substrate.
Abstract: A method of generating patterns of a pair of photomasks from a data set defining a circuit layout to be provided on a substrate includes identifying critical segments of the circuit layout to be provided on the substrate. Block mask patterns are generated and then legalized based on the identified critical segments. Thereafter, phase mask patterns are generated, legalized and colored. The legalized block mask patterns and the legalized phase mask patterns that have been colored define features of a block mask and an alternating phase shift mask, respectively, for use in a dual exposure method for patterning features in a resist layer of a substrate.

207 citations


Patent
20 Mar 2003
TL;DR: In this paper, a photomask for eliminating antenna effects in an integrated circuit and integrated circuit manufactured with the photomasks are disclosed, which includes a substrate and a patterned layer formed on at least a portion of the substrate.
Abstract: A photomask for eliminating antenna effects in an integrated circuit and integrated circuit manufactured with the photomask are disclosed. The photomask includes a substrate and a patterned layer formed on at least a portion of the substrate. The patterned layer may be formed using a mask pattern file created by analyzing a pattern in a mask layout file to identify a region including an antenna ratio less than a first design rule. A feature located in the identified region is moved based on a second design rule from a first position to a second position in the mask layout file to create a space in the identified region. A grounding feature is placed in the space and automatically connected to a gate feature in the mask layout file such that the antenna ratio is increased to greater than or approximately equal to the first design rule.

184 citations


Patent
18 Apr 2003
TL;DR: In this article, a method and apparatus for etching a metal layer disposed on a substrate, such as a photolithographic reticle, is provided, including positioning the reticle in a first orientation on a reticle support in a processing chamber.
Abstract: Method and apparatus for etching a metal layer disposed on a substrate, such as a photolithographic reticle, are provided. In one aspect, a method is provided for processing a photolithographic reticle including positioning the reticle in a first orientation on a reticle support in a processing chamber, wherein the reticle comprises a metal photomask layer formed on an optically transparent substrate, and a patterned resist material deposited on the metal photomask layer, etching the metal photomask layer in the first orientation, positioning the reticle in at least a second orientation, and etching the metal photomask layer in the at least second orientation.

162 citations


Patent
Danny Rittman1, Micha Oren1
03 Mar 2003
TL;DR: In this paper, a photomask for reducing power supply voltage fluctuations in an integrated circuit and integrated circuit manufactured by the same is disclosed, which includes a substrate and a patterned layer formed on at least a portion of the substrate.
Abstract: A photomask for reducing power supply voltage fluctuations in an integrated circuit and integrated circuit manufactured by the same are disclosed. The photomask includes a substrate and a patterned layer formed on at least a portion of the substrate. The patterned layer may be formed using a mask pattern file created by analyzing a pattern in a mask layout file to identify a region in the pattern to add one or more decoupling capacitors. Once the region is identified, a feature located in the identified region is moved based on a design rule from a first position to a second position in the mask layout file to create a space in the identified region. The decoupling capacitors are placed in the space in the identified region.

154 citations


Journal ArticleDOI
TL;DR: Here, the inexpensive fabrication of photoresist patterns that contain features of multiple and/or smoothly varying heights are demonstrated, which offer a low-cost alternative to present gray-scale photolithography approaches.
Abstract: The ability to produce three-dimensional (3D) microstructures is of increasing importance in the miniaturization of mechanical or fluidic devices, optical elements, self-assembling components, and tissue-engineering scaffolds, among others. Traditional photolithography, the most widely used process for microdevice fabrication, is ill-suited for 3D fabrication, because it is based on the illumination of a photosensitive layer through a “photomask” (a transparent plate that contains opaque, unalterable solid-state features), which inevitably results in features of uniform height. We have devised photomasks in which the light-absorbing features are made of fluids. Unlike in conventional photomasks, the opacity of the photomask features can be tailored to an arbitrary number of gray-scale levels, and their spatial pattern can be reconfigured in the time scale of seconds. Here we demonstrate the inexpensive fabrication of photoresist patterns that contain features of multiple and/or smoothly varying heights. For a given microfluidic photomask, the developed photoresist pattern can be predicted as a function of the dye concentrations and photomask dimensions. For selected applications, microfluidic photomasks offer a low-cost alternative to present gray-scale photolithography approaches.

148 citations


Patent
21 Oct 2003
TL;DR: In this article, the authors used direct write nanolithography to repair and fabrication of photomask repair, including use of scanning probe microscopic tips for deposition of ink materials including solgel and metallic inks.
Abstract: Photomask repair and fabrication with use of direct-write nanolithography, including use of scanning probe microscopic tips for deposition of ink materials including solgel and metallic inks. Additive methods can be combined with substractive methods. Holes can be filled with nanostructures. Height of the nanostructure filling the hole can be controlled without losing control of the lateral dimensions of the nanostructure. Chrome-on-Glass masks can be used and fabricated, as well as more advanced masks including masks for nanoimprint nanolithography.

99 citations


Journal ArticleDOI
29 Aug 2003-Analyst
TL;DR: The fabrication of a microfluidic device featured with a multi-height "sandbag" structure for particle entrapment and peripheral microchannels was described, indicating the robustness of the elastic PDMS structures for analytical operation.
Abstract: We have developed a method for fabricating microfluidic devices with multi-height structures using single step photolithography. The whole fabrication process is executed by conventional printed circuit board (PCB) technology without the need of having access to clean room facilities. Specifically designed "windows" and "rims" architectures were printed on films that were used as photomasks. Different levels of protruding features on the PCB master were produced by exposing a photomask followed by chemical wet etching. Poly(dimethylsiloxane) (PDMS) was then moulded against the positive relief master to generate microfluidic structures. In this report, we described the fabrication of a microfluidic device featured with a multi-height "sandbag" structure for particle entrapment and peripheral microchannels. Controlled immobilization of biological cells and immunocytochemcial staining assays were performed to demonstrate the applicability of the microfluidic device for cellular analysis. The integrity of the microdevice remained stable under applied pressure, indicating the robustness of the elastic PDMS structures for analytical operation. The simple microfabrication process requires only low-cost materials and minimal specialized equipment and can reproducibly produce mask lines of about 20 microm in width, which is sufficient for most microfluidic applications.

78 citations


Patent
05 Dec 2003
TL;DR: In this article, a photomask for patterning features for an integrated circuit, including masked features having interior nonprinting windows, is described, where the interior non-printing window is an alternating phase shifter, while the area surrounding the masked features transmits light unshifted.
Abstract: Aspects of the present invention provide for a novel photomask for patterning features for an integrated circuit, the photomask including masked features having interior nonprinting windows. In some embodiments, the interior nonprinting window is an alternating phase shifter, while the area surrounding the masked features transmits light unshifted. In other embodiments, the interior nonprinting window transmits light unshifted, while the area surrounding the masked features is an alternating phase shifter. Thus any arrangement of features can be patterned with no phase conflict.

76 citations


Proceedings ArticleDOI
24 Mar 2003
TL;DR: A physical model based mask layout verification system consisting of an efficient wafer-patterning simulator that is able to solve the process physical equations for optical imaging and resist development and hence can achieve high degree accuracy required by mask verification tasks is demonstrated.
Abstract: The proliferation and acceptance of reticle enhancement technologies (RET) like optical proximity correction (OPC) and phase shift masking (PSM) have significantly increased the cost and complexity of sub-100 nm photomasks. The photomask layout is no longer an exact replica of the design layout. As a result, reliably verifying RET synthesis accuracy, structural integrity, and conformance to mask fabrication rules are crucial for the manufacture of nanometer regime VLSI designs. In this paper, we demonstrate a physical model based mask layout verification system. The new system consists of an efficient wafer-patterning simulator that is able to solve the process physical equations for optical imaging and resist development and hence can achieve high degree accuracy required by mask verification tasks. It is able to efficiently evaluate mask performance by simulating edge displacement errors between wafer image and the intended layout. We show the capabilities for hot spot detection, line width variation analysis, and process window prediction capabilities with a sample practical layout. We also discuss the potential of the new physical model simulator for improving circuit performance in physical layout synthesis.

72 citations


Proceedings ArticleDOI
22 Apr 2003
TL;DR: In this paper, an attenuated phase shift mask (attPSM) was periodically exposed on a 193 nm scanner and the relationship between the number of exposures (i.e., energy passed through the mask during exposures) versus defect growth was developed.
Abstract: Defect formation on advanced photomasks used for DUV lithography has introduced new challenges at low k/sub 1/ processes industry wide. Especially at 193 nm scanner exposure, the mask pattern surface, pellicle film and the enclosed space between the pellicle and pattern surface can create a highly reactive environment. This environment can become susceptible to defect growth during repetitive exposure of a mask on DUV lithography systems due to the flow of high energy through the mask. Due to increased number of fields on the wafer, a reticle used at a 300 mm wafer fab receives roughly double the number of exposures without any cool down period, as compared to the reticles in a 200 mm wafer fab. Therefore, 193 nm lithography processes at a 300 mm wafer fab put lithographers and defect engineers into an area of untested mask behavior. During the scope of this investigation, an attenuated phase shift mask (attPSM) was periodically exposed on a 193 nm scanner and the relationship between the number of exposures (i.e., energy passed through the mask during exposures) versus defect growth was developed. Finally, chemical analysis of these defects was performed in order to understand the mechanism of this "growth".

70 citations


Journal ArticleDOI
TL;DR: A method of fabricating protein patterned chips was developed which can be utilized as a powerful tool for performing bioassays in a high-throughput manner by utilizing the nitroveratryloxycarbonyl (NVOC) group as a photolabile protecting group for protein patterning.

Journal ArticleDOI
TL;DR: The technical improvement in photomask quality achieved by photoplotting is discussed, and differences in the resolution that can be obtained with photomasks with features in the 8-100-microm size range are demonstrated.
Abstract: This paper extends rapid prototyping for several types of lithography to the 8−25-μm size range, using transparency photomasks prepared by photoplotting. It discusses the technical improvement in photomask quality achieved by photoplotting, compared to the currently used image setting, and demonstrates differences in the resolution that can be obtained with photomasks with features in the 8−100-μm size range. These high-resolution photomasks were used to microfabricate microelectrodes, microlenses, and stamps for microcontact printing, following methods described previously.

Journal ArticleDOI
TL;DR: In this article, a simple fabrication method of domain-inverted gratings in MgO:LiNbO/sub 3/ is demonstrated, where ultraviolet (UV) light irradiation reduces the voltage for inversion.
Abstract: A new and simple fabrication method of domain-inverted gratings in MgO:LiNbO/sub 3/ is demonstrated. It was found that ultraviolet (UV) light irradiation reduces the voltage for inversion. Domain-inverted gratings of /spl sim/15 /spl mu/m period were fabricated by voltage application at room temperature under irradiation of UV light periodically-patterned using a photomask.

Patent
05 Sep 2003
TL;DR: In this paper, a method of attenuating phase shift mask blanks for use in lithography is described. But this method requires the mask blank to be pre-computed.
Abstract: The present invention relates to attenuating phase shift mask blanks for use in lithography, a method of fabricating such a mask blank.

Patent
06 Apr 2003
TL;DR: In this paper, level-set functions are used to optimize the contours of a defined photomask, when used in photolithographic process, to print a wafer pattern faithful to the target pattern.
Abstract: Photomask patterns are represented using contours defined by level-set functions. Given target pattern, contours are optimized such that defined photomask, when used in photolithographic process, prints wafer pattern faithful to target pattern. Optimization utilizes “merit function” for encoding aspects of photolithographic process, preferences relating to resulting pattern (e.g. restriction to rectilinear patterns), robustness against process variations, as well as restrictions imposed relating to practical and economic manufacturability of photomasks.

Patent
22 Jul 2003
TL;DR: In this article, a photomask for use in photolithography has substrate, a main pattern at one side of the substrate, and a transparency-adjusting layer at the other side.
Abstract: A photomask for use in photolithography has substrate, a main pattern at one side of the substrate, and a transparency-adjusting layer at the other side of the substrate. The transparency-adjusting layer has a characteristic that allows it to change the intensity of the illumination incident on the main pattern during the exposure process accordingly. In manufacturing the photomask, a first exposure process is carried out on a wafer using just the substrate and main pattern. The critical dimensions of elements of the pattern formed on the wafer as a result of the first exposure process are measured. Differences between these critical dimensions and a reference critical dimension are then used in designing a layout of the transparency-adjusting layer in which the characteristic of the layer is varied to compensate for such differences.

Patent
01 Dec 2003
TL;DR: An optical proximity correction (OPC) method for correcting a photomask layout has been proposed in this article, where a rule-based OPC by taking account of the assist feature bias is used to compute a target bias of the photOMask layout.
Abstract: An optical proximity correction (OPC) method for correcting a photomask layout. The photomask layout has at least a photomask pattern. The steps of the OPC method include collecting an assist feature bias of a predetermined assist feature, performing a rule-based OPC by taking account of the assist feature bias to compute a target bias of the photomask layout, outputting a corrected photomask layout according to the target bias, and adding the predetermined assist feature to the corrected photomask layout.

Patent
21 Jul 2003
TL;DR: In this paper, a reaction chamber is formed by a base, side walls and a photomask, which polymerizes one or more regions of the liquid layer to form a polymeric layer.
Abstract: A process and apparatus for making polymeric layers. A layer of liquid (20) including a photopolymerizable precursor is formed between a substrate (17) and a photomask (12). A reaction chamber is formed by a base (15), side walls (16) and photomask (12) polymerizes one or more regions of the liquid layer (20) to form a polymeric layer.

Journal ArticleDOI
TL;DR: In this article, a method for the fabrication of optical structures in GaAs substrates using UV holographic lithography in SU-8 resist, pro-cessed to fabricate a mask, followed by chemically assisted ion-beam etching (CAIBE).
Abstract: We develop a method for the fabrication of optical structures in GaAs substrates using UV holographic lithography in SU-8 resist, pro- cessed to fabricate a mask, followed by chemically assisted ion-beam etching (CAIBE) The technique is based on simple processing steps without procedures of mask transfer, enabling easy fabrication of optical structures A predevelopment relief behavior is investigated to optimize the processing parameter to form an etching mask in SU-8 By adjusting both exposure dose and time in the postexposure bake (PEB), an SU-8 mask with a flexible duty cycle and high profile quality can be easily produced Furthermore, an optical structure with a rectangular shaped profile and a 1-mm period in a GaAs substrate is produced by optimizing the processing parameters during the CAIBE process © 2003 Society of

Patent
12 Sep 2003
TL;DR: In this article, a femtosecond pulse width laser was used to repair a defect on a reflective photomask, and a control unit connected to the laser to control an ablation of the defect.
Abstract: A method of selectively ablating an undesired material from a substrate includes providing a substrate with two regions; providing laser pulses; tuning a wavelength of the laser pulses to match a desired wavelength characteristic of a material and directing the tuned laser pulses onto the substrate; and controlling a pulse duration, wavelength, or both, of the laser pulses to ablate the undesired material without damaging the substrate or any adjacent material. In another embodiment, an apparatus for repairing a defect on a reflective photomask includes a femtosecond pulse width laser; a harmonic conversion cell; a filter for passing a selected EUV harmonic of the laser light; a lens arrangement configured to direct the selected EUV harmonic of the laser light onto the photomask; and a control unit connected to the laser to control an ablation of the defect on the reflective photomask.

Patent
22 Apr 2003
TL;DR: In this paper, an improvement is provided in the photolithographic patterning of a photoresist layer by pattern-wise exposure to short-wavelength ultraviolet light through a pattern-bearing photomask which is dustproof protected by mounting a framed pellicle thereon.
Abstract: An improvement is provided in the photolithographic patterning of a photoresist layer by pattern-wise exposure to short-wavelength ultraviolet light through a pattern-bearing photomask which is dustproof protected by mounting a framed pellicle thereon. With an object to overcome the troubles therein due to absorption of short-wavelength ultraviolet light by oxygen and the interaction of atmospheric oxygen in the space surrounded by the photomask and the framed pellicle with the energy of the short-wavelength ultraviolet, the framed pellicle is provided in the frame with at least two gas-passage openings through which the air inside is replaced with nitrogen in conducting the ultraviolet exposure. The openings are preferably covered with a filter member and covered further with a covering member having a gas nozzle which is connected to a feed source of an inert gas such as nitrogen.

Proceedings ArticleDOI
Yuri Granik1
26 Aug 2003
TL;DR: In this article, a variable bias model is applied to the dry etching in mask fabrication, which can be used to characterize and explain etch behavior in terms of microloading and etch aperture effects.
Abstract: Microloading in photomask fabrication is a key parameter in process optimization. A Variable Bias Model has been successfully used in explaining etch proximity behavior during wafer etching. This model recently became part of the VT5 model suit. In this study, we apply variable bias modeling to the dry etching in mask fabrication. A special etch test pattern is used to characterize etch bias under various process conditions. We show that etch proximity is adequately described by two proximity parameters: density and separation. The model coefficients depend on the process parameters and can be used to characterize and explain etch behavior in terms of microloading and etch aperture effects. Ability to explain mask etching is important for accurate OPC modeling. While some modeling methodologies consider mask and wafer processes as a single "black box," we found that more accurate OPC models are generated by building separate models for mask-making, optical, and wafer processing steps. We show how variable etch model can be used to compensate for iso-dense mask bias and how this step fits into OPC flow.

Patent
14 May 2003
TL;DR: In this article, the remaining defects are removed by using a configuration in which irradiation with a laser beam is performed from below with a to-be-machined surface directed downward, and irradiation is performed in an atmosphere containing a halogenated hydrocarbon gas (as an example, ethyl iodide).
Abstract: In a laser machining method for removing remaining defects on a photomask, there has been problems to be resolved that damage is formed at the portion of the substrate where the defect has been removed, thus resulting in degraded quality of machining. In a laser machining method for removing remaining defects on a photomask by a method of laser machining, the remaining defects are removed by using a configuration in which irradiation with a laser beam is performed from below with a to-be-machined surface directed downward, and irradiation with a laser beam in an atmosphere containing a halogenated hydrocarbon gas (as an example, ethyl iodide).

Patent
12 Feb 2003
TL;DR: In this article, a photomask (PM1) including part of an opaque resist pattern (3a) in addition to an opaque pattern (2a) is used to transfer an integrated circuit pattern to a wafer by exposure.
Abstract: The period of time required for the development or manufacture of an integrated circuit is decreased. A photomask (PM1) including part of an opaque resist pattern (3a) in addition to an opaque pattern (2a) is used to transfer an integrated circuit pattern to a wafer by exposure.

Patent
Byoung-taek Lee1
01 Apr 2003
TL;DR: A reflection photomask includes a reflection layer on a substrate, an absorber pattern on the reflection layer, and a capping layer on the reflect layer as discussed by the authors, which may be selected to decrease the reflectivity of the reflection image by less than about 20%.
Abstract: A reflection photomask includes a reflection layer on a substrate, an absorber pattern on the reflection layer, and a capping layer on the reflection layer. The capping layer may be selected to decrease a reflectivity of the reflection photomask by less than about 20% of the reflectivity of the reflection layer.

Journal ArticleDOI
TL;DR: The measured results show that the fabricated elliptical microlenses in a 256 x 512 array have excellent surface and dimensional qualities in terms of smoothness and uniformity and it is shown that the optical parameters of the MLAs can be accurately controlled.
Abstract: A simple reflow technique is employed for the fabrication of elliptical refractive microlens arrays (MLAs) on a low-cost inorganic-organic SiO2/ZrO2 sol-gel glass. The measured results show that the fabricated elliptical microlenses in a 256 × 512 array have excellent surface and dimensional qualities in terms of smoothness and uniformity. It is also shown that the optical parameters of the MLAs, such as the focal length and aperture dimension, can be accurately controlled. The proposed technique requires only an ordinary binary photomask for pattern transfer. Furthermore, the sol-gel material is found to be feasible for high-volume production, because the fabrication of MLAs can be implemented by use of cheap sol-gel materials without an etching step.

Patent
03 Dec 2003
TL;DR: A photomask blank having a film of at least one layer formed on a substrate is manufactured by forming a film on the substrate and irradiating the film with light from a flash lamp as discussed by the authors.
Abstract: A photomask blank having a film of at least one layer formed on a substrate is manufactured by forming a film on a substrate and irradiating the film with light from a flash lamp. A photomask is manufactured from the thus manufactured photomask blank by forming a patterned resist on the film on the blank by photolithography, etching away those portions of the film which are not covered with the resist, and removing the resist. The photomask blank and photomask have minimized warpage and improved chemical resistance.

Patent
17 Dec 2003
TL;DR: In this paper, a method for fabricating a photomask for an integrated circuit was proposed, which includes a substrate with at least one trench, providing a prepatterned surface at the bottom of the trench, and providing a multilayer coating over the substrate.
Abstract: A method for fabricating a photomask for an integrated circuit. The method includes, for example, providing a substrate with at least one trench, providing a prepatterned surface at the bottom of the trench, and providing a multilayer coating over the substrate. As a result, the multilayer coating forms a reflection region on the surface of the substrate outside the trench and a non-reflection region in the trench. The invention additionally provides a corresponding photomask.

Patent
11 Sep 2003
TL;DR: In this paper, the authors proposed a method to cleanly and absolutely remove particles present in several or less number on a photomask by a method except for cleaning, by using dynamic or electromagnetic interaction or chemical reaction between the probe 2 of a scanning probe microscope having high positioning accuracy and the particle 1 on the photOMask.
Abstract: PROBLEM TO BE SOLVED: To cleanly and absolutely remove particles present in several or less number on a photomask by a method except for cleaning SOLUTION: Particles influencing transfer are cleanly and absolutely removed from a photomask by using dynamic or electromagnetic interaction or chemical reaction between the probe 2 of a scanning probe microscope having high positioning accuracy and the particle 1 on the photomask COPYRIGHT: (C)2005,JPO&NCIPI

Patent
29 Oct 2003
TL;DR: In this paper, a photomask assembly and a method for protecting the assembly from contaminants generated during a lithography process are disclosed. But they do not specify a method to prevent airborne molecular contaminants from contaminating the pellicle assembly.
Abstract: A photomask assembly and method for protecting the photomask assembly from contaminants generated during a lithography process are disclosed. A photomask assembly includes a pellicle assembly formed from a pellicle frame and a pellicle film coupled to a first surface of the pellicle frame. The pellicle frame further includes an inner wall and an outer wall. A photomask is coupled to a second surface of the pellicle frame opposite the pellicle film. A molecular sieve that prevents airborne molecular contaminants (AMCs) generated during a lithography process from contaminating the photomask is associated with the pellicle assembly.