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Showing papers on "Photomask published in 2007"


BookDOI
09 Jul 2007
TL;DR: A glossary of manufacturing terms acronyms used in semiconductor manufacturing standards and specifications units of measure and conversion tables useful constants can be found in this paper, along with a detailed overview of process control in-line metrology in-situ metrology yield modelling yield management electrical, physical and chemical characterization failure analysis.
Abstract: Overview of semiconductor devices introduction to semiconductor equipment silicon materials surface preparation ion implantation dopant diffusion oxidation silicidation rapid thermal processing overview of interconnect chemical vapourdeposition alternate interlevel dielectrics polymide dielectrics physical vapour deposition chemical-mechanical polish optical lithography photoresist materials and processing x-ray lithography electron-beam lithography photomask fabrication plasma etching equipment reliability overview of process control in-line metrology in-situ metrology yield modelling yield management electrical, physical and chemical characterization failure analysis. Appendices: glossary of manufacturing terms acronyms used in semiconductor manufacturing standards and specifications units of measure and conversion tables useful constants.

572 citations


Patent
29 Jun 2007
TL;DR: In this article, the authors proposed a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost.
Abstract: An object is to provide a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost A method for manufacturing a semiconductor device includes the following steps: forming a semiconductor film; irradiating a laser beam by passing the laser beam through a photomask including a shield for shielding the laser beam; subliming a region which has been irradiated with the laser beam through a region in which the shield is not formed in the photomask in the semiconductor film; forming an island-shaped semiconductor film in such a way that a region which is not irradiated with the laser beam is not sublimed because it is a region in which the shield is formed in the photomask; forming a first electrode which is one of a source electrode and a drain electrode and a second electrode which is the other one of the source electrode and the drain electrode; forming a gate insulating film; and forming a gate electrode over the gate insulating film

323 citations


Patent
09 Aug 2007
TL;DR: In this paper, a method for processing a photolithographic reticle includes providing a reticle having a metal photomask layer formed on an optically transparent substrate and an imprinted resist material deposited on the metal photOMask layer.
Abstract: Methods for etching a metal layer using an imprinted resist material are provided. In one embodiment, a method for processing a photolithographic reticle includes providing a reticle having a metal photomask layer formed on an optically transparent substrate and an imprinted resist material deposited on the metal photomask layer, etching recessed regions of the imprinted resist material to expose portions of the metal photomask layer in a first etching step, and etching the exposed portions of the metal photomask layer through the imprinted resist material in a second etching step, wherein at least one of the first or second etching steps utilizes a plasma formed from a processing gas comprising oxygen, halogen and chlorine containing gases. In one embodiment, the process gas is utilized in both the first and second etching steps. In another embodiment, the first and second etching steps are performed in the same processing chamber.

154 citations


Patent
29 Oct 2007
TL;DR: In this article, a plasma etch chamber with a substrate support member has at least two optical components disposed therein for use in endpoint detection, which is achieved by the use of various optical measurement techniques for monitoring at different locations of the photomask.
Abstract: Apparatus and method for endpoint detection are provided for photomask etching. The apparatus provides a plasma etch chamber with a substrate support member. The substrate support member has at least two optical components disposed therein for use in endpoint detection. Enhanced process monitoring for photomask etching are achieved by the use of various optical measurement techniques for monitoring at different locations of the photomask.

65 citations


Patent
12 Mar 2007
TL;DR: A photomask blank is composed of a transparent substrate, a light-shielding film deposited on the substrate and comprising a metal or metal compound susceptible to fluorine dry etching as mentioned in this paper.
Abstract: A photomask blank comprises a transparent substrate, a light-shielding film deposited on the substrate and comprising a metal or metal compound susceptible to fluorine dry etching, and an etching mask film deposited on the light-shielding film and comprising another metal or metal compound resistant to fluorine dry etching. When the light-shielding film is dry etched to form a pattern, pattern size variation arising from pattern density dependency is reduced, so that a photomask is produced at a high accuracy.

55 citations


Patent
11 Jan 2007
TL;DR: In this paper, a model of an exposure lithography system for chip fabrication is adapted to accommodate the band limited mask pattern as an input which is input into the model to obtain an aerial image of the mask pattern that is processed with a photoresist model yielding a resist-modeled image.
Abstract: A method for identifying lithographically significant defects. A photomask is illuminated to produce images that experience different parameters of the reticle as imaged by an inspection tool. Example parameters include a transmission intensity image and a reflection intensity image. The images are processed together to recover a band limited mask pattern associated with the photomask. A model of an exposure lithography system for chip fabrication is adapted to accommodate the band limited mask pattern as an input which is input into the model to obtain an aerial image of the mask pattern that is processed with a photoresist model yielding a resist-modeled image. The resist-modeled image is used to determine if the photomask has lithographically significant defects.

51 citations


Patent
14 Nov 2007
TL;DR: In this article, a method for preparing a mask pattern database for proximity correction is presented, where the first photomask pattern is corrected for proximity effects in a proximity correction process and a second set of data is accessed comprising information about second device features.
Abstract: The present application is directed a method for preparing a mask pattern database for proximity correction. The method comprises receiving data from a design database. Mask pattern data describing a first photomask pattern for forming first device features is generated. The first photomask pattern is to be corrected for proximity effects in a proximity correction process. A second set of data is accessed comprising information about second device features, wherein at least a portion of the second set of data is relevant to the proximity correction process. The second set of data is manipulated so as to improve the proximity correction process, as compared with the same proximity correction process in which the second set of data was included in the mask pattern database without being manipulated. At least a portion of the mask pattern data and at least a portion of the manipulated second set of data is included in the mask pattern database.

48 citations


Proceedings ArticleDOI
TL;DR: In this paper, a detailed description of whole wafer templates, imprinting processes, and etch processes that have been employed to create a whole-wafer archetype process through hard mask patterning is presented.
Abstract: Imprint lithography has been shown to be an effective technique for the replication of nano-scale features1. When the imprint material is a UV cross linkable liquid, it is possible to perform the patterning process at room temperature and ambient pressure, which enables good pattern fidelity, short processing times, and reduced process defectivity2. Imprinting whole wafers using drop on demand dispense techniques offers improved throughput and nanopatterning over wafer topography which can exceed 10 μm. Template fabrication of arbitrary whole wafer patterns offers unique challenges for 1x feature fabrication. The resolution and pattern area of the imprint approach is strictly dependent on the ability to create a 1X master template. This paper provides a detailed description of whole wafer templates, imprint patterning processes, and etch processes that have been employed to create a whole wafer archetype process through hard mask patterning. Particular attention is given to high volume manufacturing focused on whole wafer template fabrication, throughput and pattern fidelity. Step and Flash Imprint Lithography (S-FILTM) makes use of templates that can be fabricated with the same patterning and etch transfer processes that are used for manufacturing phase-shifting photo masks. In the case of whole wafer templates the master die pattern is fabricated using conventional techniques. The replicate template carries the full wafer die pattern imprinted by step and repeat using the master. The S-FIL/R process can be used for patterning the replicate template3. The structure, pattern fidelity and critical dimension uniformity of the master and replicate templates and patterned wafer is shown to be within measurement errors.

44 citations


Patent
10 May 2007
TL;DR: Aiming at improving productivity of the semiconductor devices and at improving the product yield, a method of the present invention fabricates a semiconductor device by using, as a mask, a first photomask 106 having a first rectangular pattern 104 a obtained by dividing a mask pattern, and a second photmask 108 having a second rectangular pattern 210 b obtained by separating the mask pattern as mentioned in this paper.
Abstract: Aiming at improving productivity of the semiconductor devices and at improving the product yield, a method of the present invention fabricates a semiconductor device by using, as a photomask, a first photomask 106 having a first rectangular pattern 104 a obtained by dividing a mask pattern, and a second photomask 108 having a second rectangular pattern 104 b obtained by dividing the mask pattern, wherein the method includes a first step processing a sacrificial film formed on a semiconductor substrate, using the first photomask 106 to thereby form therein a first rectangular pattern 104 a; a second step processing the sacrificial film using the second photomask 108 to thereby form therein a second rectangular pattern 104 b; and a third step etching the film formed on the semiconductor substrate, using, as a mask, the sacrificial film processed as having the rectangular pattern 104 a and the second rectangular pattern 104 b formed therein.

41 citations


Journal ArticleDOI
TL;DR: In this paper, the authors illustrate how control of the folding order can generate complex three-dimensional objects from metal-oxide bilayers using this approach, relying on the fact that narrower structures are released from the substrate first, it is possible to create multi-axis loops and interlinked objects with several sequential release steps.
Abstract: Recently, techniques known as 'micro-origami' or 'strain architecture' have emerged for the fabrication of out-of-plane micro- and nanostructures by relaxation of a pair of strain-mismatched thin films. Applications of such structures include optical reflectors, actuators and micropositioners. We illustrate how control of the folding order can generate complex three-dimensional objects from metal-oxide bilayers using this approach. By relying on the fact that narrower structures are released from the substrate first, it is possible to create multi-axis loops and interlinked objects with several sequential release steps, using a single photomask. The structures remain planar until released by XeF2 dry silicon etching, making it possible to integrate them with other MEMS and microelectronic devices early in the process.

39 citations


Journal ArticleDOI
Kazuya Yamamura1
TL;DR: In this paper, numerically controlled local wet etching (NC-LWE) is proposed for fabricating ultraprecision optics or finishing functional materials. But the method is not suitable for high dimensional materials.

Journal ArticleDOI
TL;DR: In this article, the authors apply rigorous EMF simulation for the exploration of several aspects of the imaging performance of different binary and 6% attenuated mask stacks at the limits of dry, water immersion, and high index or oil immersion lithography.
Abstract: As smaller feature sizes and hyper-numerical apertures (>1.0) are approached, rigorous electromagnetic field (EMF) simulation of light diffraction from the mask predicts a more pronounced impact of the mask topography, the optical properties of the mask materials, and the polarization of the incident light on the resulting intensity and the phase of the diffracted light, and on the imaging performance of a lithographic process. This work applies rigorous EMF simulation for the exploration of several aspects of the imaging performance of different binary and 6% attenuated mask stacks at the limits of dry, water immersion, and high index or oil immersion lithography. Several consequences with respect to typical lithographic performance parameters are discussed. The described mask diffraction phenomena have a strong impact on the sensitivity of printed linewidths and process windows with respect to the illumination intensity in the preferred state (IPS) of polarization. Advanced diffraction phenomena are also shown to be important for the lithographic performance of assist features. A new metric, the so-called assist bending efficiency (ABEF), is proposed to quantify the related effects. Modifications of the phase of the diffracted light may result in placement errors and process-window deformations.

Patent
19 Feb 2007
TL;DR: In this article, the authors proposed a method for manufacturing a four-gradation photomask with a small number of times of drawing through a photolithography stage. But, the manufacturing process includes the stages of preparing a blank which has a first translucent film and a light shield film formed of materials mutually resistive to etching thereof on a light-transmissive substrate.
Abstract: PROBLEM TO BE SOLVED: To manufacture a four-gradation photomask with a small number of times of drawing through a photolithography stage. SOLUTION: The manufacturing method includes the stages of: preparing a photomask blank which has a first translucent film and a light shield film formed of materials mutually resistive to etching thereof on a light-transmissive substrate; forming a first resist pattern on the light shield film; etching the light shield film using the first resist pattern as a mask, and then etching the translucent film and further peeling the first resist pattern; forming a second translucent film on the light-transmissive substrate and light shield film; forming a second resist pattern on the second translucent film; and etching the second translucent film and light shield film using the second resist pattern as a mask and then removing the second resist pattern. COPYRIGHT: (C)2007,JPO&INPIT

Journal ArticleDOI
TL;DR: The goal is to use the inverse imaging approach to automatically synthesize the masks required to print the desired wafer pattern employing double-exposure lithography, and the proposed approach is also capable of resolving the phase conflicts.
Abstract: Inverse lithography mask design and double-exposure lithog- raphy are two technologies that have gained a lot of attention in the recent past. Inverse lithography consists of synthesizing the input mask that leads to the desired output wafer pattern by inverting the mathemati- cal forward model from mask to wafer. Double-exposure lithography uses two pairs of mask and exposure to print a single desired wafer pattern. It usually involves splitting the latter into two parts. In this work, we present some preliminary results in our unique effort to combine the previous two powerful techniques. The goal is to use the inverse imaging approach to automatically synthesize the masks required to print the desired wafer pattern employing double-exposure lithography. We em- ploy the pixel-based mask representation, analytically calculate the gra- dient, and use a cyclic coordinate descent optimization algorithm to syn- thesize the two masks. We present results for chromeless phase-shift masks for an idealized case of a coherent imaging system =0 using the Kirchhoff approximation. The results indicate that our algorithm au- tomatically splits the target pattern into two overlapping parts, which are used separately during the individual exposures. Furthermore, the proposed approach is also capable of resolving the phase conflicts. The comparison with a single-exposure case indicates a superior contrast and no hot-spots. © 2007 Society of Photo-Optical Instrumentation Engineers.

Patent
30 Aug 2007
TL;DR: In this paper, a method of etching an extreme ultraviolet photomask is described, in order, a substrate, a multi-material layer, a capping layer, and a multilayer absorber layer.
Abstract: Embodiments of methods of etching EUV photomasks are provided herein. In one embodiment, a method of etching an extreme ultraviolet photomask includes providing a photomask comprising, in order, a substrate, a multi-material layer, a capping layer, and a multi-layer absorber layer, the multilayer absorber layer comprising a self-mask layer disposed over a bulk absorber layer, wherein the self-mask layer comprises tantalum and oxygen and the bulk absorber layer comprises tantalum and essentially no oxygen; etching the self-mask layer using a first etch process; and etching the bulk absorber layer using a second etch process different than the first, wherein the etch rate of the bulk absorber layer is greater than the etch rate of the self-mask layer during the second etch process.

Patent
Hyun Jo Yang1
27 Dec 2007
TL;DR: In this article, a method for verifying a pattern of a semiconductor device is presented, where a designed layout of target patterns is provided, and transferring the designed layout on a wafer to form wafer patterns is obtained.
Abstract: Provided is a method for verifying a pattern of a semiconductor device. In the method, a designed layout of target patterns is provided, and transferring the designed layout on a wafer to form wafer patterns. Wafer patterns image contour is obtain. The image contour for wafer patterns on the designed layout are matched, After edge differences between the designed layout and the wafer patterns image contour are extracted, a checking layout for detecting wafer pattern defects is obtain by adding the edge differences on the designed layout. Defects on the checking layout is identified to verify the patterns in view of processes before fabrication of a photomask.

Proceedings ArticleDOI
20 Jan 2007
TL;DR: In this paper, two methods were investigated for the creation of encapsulated micro-fluidic channels and bridges in negative tone SU-8 photoresist, one using two exposures at different wavelengths to create the channel sidewalls and microchannel encapsulation layer; the other method creating both using a single I-line (365 nm) exposure and a grayscale photomask.
Abstract: Two methods were investigated for the creation of encapsulated micro-fluidic channels and bridges in negative tone SU-8 photoresist. The first uses two exposures at different wavelengths to create the channel sidewalls and microchannel encapsulation layer; the other method creates both using a single I-line (365 nm) exposure and a grayscale photomask. These methods can define structures with vertical dimensions ranging to hundreds of microns and introduces very little extra processing complexity. For the dual wavelength method, an I-line light source is used to define the channel walls while a non-collimated deep-UV (254 nm) light source provides a large energy dose to the top surface of the SU-8 to produce a membrane over all the channels. Using the dual wavelength method allows SU-8 to be used as the material for the channels and the encapsulation method is self-limiting avoiding the requirement for precise control over the exposure dose. The rate of UV dose and the post-exposure baking parameters are critical to the quality and strength of the micro-channels. Properly designed channels have been successfully developed in lengths up to 1 cm. Alternatively using a grayscale Zn/Al bimetallic photomask and a single I-line exposure, 3D bridge micro-structures were successfully made on SU-8. The use of grayscale masks for both techniques also provides the possibility of shaping the channel. With the ability to create micro-bridges, further research will be performed to investigate how well the single exposure technique can be used to produce micro-channels of various sizes and dimensions.

Patent
30 Apr 2007
TL;DR: In this article, a method for correcting a photomask pattern is provided, which performs a verification of a focus-exposure matrix (FEM) and an overlay variation on a layout area having contact holes or vias in a layout pattern so as to generate a hint information.
Abstract: A method for correcting a photomask pattern is provided. The correcting method performs a verification of a focus-exposure matrix (FEM) and an overlay variation on a layout area having contact holes or vias in a layout pattern so as to generate a hint information. The layout pattern of the photomask is corrected according to the hint information to prevent the contact holes or vias from being exposed in arrangement to corresponding metal layer, poly layer, or diffusion layer.

Proceedings ArticleDOI
05 Oct 2007
TL;DR: In this paper, the authors evaluated the feasibility of inspecting the printed wafer as an alternative way for the high-sensitivity defect inspection of photomasks, and showed that wafer inspection is able to provide a full defect evaluation of advanced photomask with the specific advantage of assessing the actual printability of arbitrary defects.
Abstract: Defect inspection is one of the major challenges in the manufacturing process of photomasks. The absence of any printing defect on patterned mask is an ultimate requirement for the mask shop, and an increasing effort is spent in order to detect and subsequently eliminate these defects. Current DUV inspection tools use wavelengths five times or more larger than the critical defect size on advanced photomasks. This makes the inspectability of high-end mask patterns (including strong OPC and small SRAF's) and sufficient defect sensitivity a real challenge. The paper evaluates the feasibility of inspecting the printed wafer as an alternative way for the high-sensitivity defect inspection of photomasks. Defects originating in the mask can efficiently be filtered as repeated defects in the various dies on wafer. Using a programmed-defect mask of 65-nm technology, a reliable detection of the printing defects was achieved with an optimized inspection process. These defects could successfully be traced back to the photomask in a semi-automated process in order to enable a following repair step. This study shows that wafer inspection is able to provide a full defect qualification of advanced photomasks with the specific advantage of assessing the actual printability of arbitrary defects.

Patent
20 Jul 2007
TL;DR: In this article, a photomask dataset corresponding to a target pattern is verified by simulating a resist pattern that will be formed in a resist layer by a lithography process, and simulating an etched pattern that would be etched in a layer by the plasma process wherein said simulation comprises calculating a flux of particles impacting a feature, and determining whether the etched pattern substantially conforms to the target pattern.
Abstract: A photomask dataset corresponding to a target-pattern is verified by simulating a resist-pattern that will be formed in a resist layer by a lithography process, simulating an etched-pattern that will be etched in a layer by a plasma process wherein said simulation comprises calculating a flux of particles impacting a feature, and determining whether the etched-pattern substantially conforms to the target-pattern.

Proceedings ArticleDOI
TL;DR: In this paper, the authors explore the unique challenges IC metrology faces to enable double patterning, first in development, then in production, in order to extend water immersion lithography further.
Abstract: Double patterning has emerged as a likely lithography technology to bridge the gap between water-based ArF immersion lithography and EUV. Water immersion, single exposure lithography is limited to about 40nm half pitch with NA 1.35. Extension of immersion with high index fluids and glasses is theoretically possible, but faces severe challenges in technology, economics, and timing. In order to extend water immersion lithography further, much attention is given to reducing effective k1 to less than 0.25 using double patterning. This paper explores the unique challenges IC metrology faces to enable double patterning, first in development, then in production.

Patent
02 Feb 2007
TL;DR: In this paper, an inspection device consisting of an epi-illumination light source, a transmissive illumination light source and a transmission side sensor was proposed to accurately perform foreign material inspection.
Abstract: PROBLEM TO BE SOLVED: To provide an inspection device, capable of accurately performing foreign material inspection, based on a transmitted image and a reflected image, an inspection method, and a manufacturing method of a pattern substrate. SOLUTION: The inspection device comprises an epi-illumination light source 21; a lens 32 that concentrates the light from the epi-illumination light source 21 and outputs it to a photomask 33; a reflection side sensor 44 that detects the light reflected by the photomask 33 from the light outputted by the lens 32 via the lens 32; a transmissive illumination light source 11; a lens 16 that concentrates the light from the transmissive illumination light source 11 and outputs it to the photomask 33; and a transmission side sensor 43 that detects the light that passed through the photomask 33 out of the light outputted from the lens 16 to the photomask 33 via the lens 32. The light from the epi-illumination light source and the light from transmissive illumination light source pass through the lens 32 at the positions where a part of the viewing field is different. COPYRIGHT: (C)2006,JPO&NCIPI

Patent
25 Jul 2007
TL;DR: In this article, a mask pattern is formed on a transparent substrate, and the transmittance of the transparent substrate corresponding to each subregion is calculated on the basis of the pattern dimensional map.
Abstract: This invention discloses a photomask manufacturing method. A pattern dimensional map is generated by preparing a photomask in which a mask pattern is formed on a transparent substrate, and measuring a mask in-plane distribution of the pattern dimensions. A transmittance correction coefficient map is generated by dividing a pattern formation region into a plurality of subregions, and determining a transmittance correction coefficient for each of the plurality of subregions. The transmittance correction value of each subregion is calculated on the basis of the pattern dimensional map and the transmittance correction coefficient map. The transmittance of the transparent substrate corresponding to each subregion is changed on the basis of the transmittance correction value.

Patent
10 Sep 2007
TL;DR: In this article, a photolithographic pellicle for dustproof protection of a photomask was mounted with the aid of a pressure-sensitive adhesive layer on one end surface of the PELLicle frame.
Abstract: In a photolithographic pellicle for dustproof protection of a photomask for photolithographic patterning by mounting thereon with the aid of a pressure-sensitive adhesive layer on one end surface of the pellicle frame, the adverse influence on the flatness of the photomask caused by mounting the pellicle can be minimized when the thickness of the pressure-sensitive adhesive layer is 0.4 mm or larger or when the elastic modulus of the layer does not exceed 0.5 MPa.

Journal ArticleDOI
TL;DR: In this paper, the use of femtosecond laser as a tool for direct material removal is discussed, where experiments were performed on IC structures to reveal the different layers of fabrication: selective or total ablation can occur depending on the laser energy density.

Patent
19 Apr 2007
TL;DR: In this article, a belt-like work with a photo-sensitive layer is conveyed in a conveying direction at a work conveying speed V, and the mask patterns are transferred as a periodical pattern by exposure onto the belt.
Abstract: PROBLEM TO BE SOLVED: To provide a pattern exposure method and apparatus capable of forming periodic patterns of various shapes arranged in a work conveying direction in high throughput in simple equipment with suppressed equipment investment. SOLUTION: A belt-like work 11 provided with a photosensitive layer is conveyed in a work conveying direction F at a work conveying speed V. A first illuminating section 30 illuminates a first photomask 29 in an exposure period T1 determined by the pattern to be transferred by exposure and synchronized with the work conveying speed V. A second illuminating section 66 illuminates a second photomask 65 in an exposure period T2 determined by the pattern to be transferred by exposure and synchronized with the work conveying speed V. The first photomask 29 and the second photomask 65 are disposed leaving a proximity gap from the belt-like work 11, and the respective mask patterns are transferred as a periodical pattern by exposure onto the belt-like work. COPYRIGHT: (C)2007,JPO&INPIT

Journal ArticleDOI
TL;DR: In this article, the femtosecond laser processing of a negative photoresist using a microlens array (MLA) was used for simultaneous multipoint fabrication of polymer rods.
Abstract: We report the simultaneous multipoint fabrication of polymer rods by the femtosecond laser processing of a negative photoresist using a microlens array (MLA). The rods were periodically arranged in the form of an array corresponding to the MLA and free-standing on a glass substrate. The use of a photomask enabled us to define the contour of the rod array. Furthermore, sample translation techniques were demonstrated for the effective fabrication of large-area structures.

Proceedings ArticleDOI
08 Feb 2007
TL;DR: In this article, the traceable calibration of linewidth photomask standards, which are used as reference standards for production masks of the 65 nm node, is presented. But the results of the measured high-resolution microscopy images and the deduced profiles appropriate signal modeling was applied for every metrology tool, which allows a meaningful comparison of geometrical parameters of measured calibration structures.
Abstract: We report on the traceable calibration of linewidth (CD) photomask standards which are used as reference standards for production masks of the 65 nm node. Two different types of masks with identical layout were produced and calibrated, namely a binary mask (CoG) and a half-tone phase shifting mask (193MoSi PSM). We will in particular describe the applied calibration procedures and cross-correlate the results from different high resolution metrology tools, like SEM, UV microscopy and AFM. The layout of the CD photomask standard contains isolated as well as dense line features in both tones with nominal CD down to 100 nm. Calibration of the standards was performed at PTB by UV microscopy and LV-SEM, supported by additional AFM measurements. For analysis of the measured high resolution microscopy images and the deduced profiles appropriate signal modeling was applied for every metrology tool, which allows a meaningful comparison of geometrical parameters of the measured calibration structures. By this approach, e.g. the deduced feature widths at the top of the structures and the widths at 50% height of the structures can be related to the measured edge angles. The linearity e. g. of the measured top CD on different type of structures on the CoG CD standard was determined to be below 5 nm down to line feature dimensions well below 200 nm.

Patent
20 Jun 2007
TL;DR: In this paper, a transparent conductive layer, a first metal layer and a first insulating layer are sequentially formed on a substrate for use in TFT-LCDs and fabrication methods thereof.
Abstract: Array substrates for use in TFT-LCDs and fabrication methods thereof. A transparent conductive layer, a first metal layer, a first insulating layer, a semiconductor layer, a second insulating layer and a sacrificial layer are sequentially formed on a substrate. With a first photomask, a photoresist layer with various thicknesses is formed on part of the sacrificial layer. Using the photoresist layer as an etching mask, a gate line having a gate, a channel layer on the gate, a gate pad at the end portion of the gate line, a pixel electrode and a source pad are defined. An insulating spacer is formed on the sidewalls of the gate and gate line. With a second photomask, a source line, source and drain are formed. The source pad connects the end portion of the source line. An array substrate is thus obtained with only two photomasks.

Proceedings ArticleDOI
19 Mar 2007
TL;DR: In this paper, the authors describe the design and measurement of electrically measured test structures for the characterisation of dimensional mismatch in an advanced photomask making process, consisting of pairs of Kelvin connected bridge resistors.
Abstract: This paper describes the design and measurement of electrically measured test structures for the characterisation of dimensional mismatch in an advanced photomask making process. Test structures consisting of pairs of Kelvin connected bridge resistors have been fabricated on a chrome-on-quartz photomask plate. These have been electrically measured on-mask and the results used to obtain information about dimensional mismatch in the mask making process.