Photomask

About: Photomask is a research topic. Over the lifetime, 7917 publications have been published within this topic receiving 54524 citations. The topic is also known as: photoreticle & reticle.

Method of processing synthetic quartz glass substrate for semiconductor

Abstract: Disclosed is a method of processing a synthetic quartz glass substrate for a semiconductor, wherein a polishing part of a rotary small-sized processing tool is put in contact with a surface of the synthetic quartz glass substrate in a contact area of 1 to 500 mm2, and is scanningly moved on the substrate surface while being rotated so as to polish the substrate surface. When the method is applied to the production of a synthetic quartz glass such as one for a photomask substrate for use in photolithography which is important to the manufacture of ICs or the like, a substrate having an extremely excellent flatness and capable of being used even with the EUV lithography can be obtained comparatively easily and inexpensively.

A Novel Five-Photomask Low-Temperature Polycrystalline Silicon CMOS Structure for AMLCD Application

Abstract: A novel five-mask low-temperature polycrystalline silicon (LTPS) CMOS structure was verified by manufacturing the thin-film transistor test samples using the proposed five-mask LTPS CMOS process. In integrating the five-mask CMOS structure, a selective contact barrier metal formation process was developed, without additional photomask steps, to solve the issue of high-contact-resistance problem encountered inevitably in the contact between the indium tin oxide and doped polycrystalline silicon (poly-Si) source-drain layers. The five-mask CMOS technology was also confirmed by manufacturing a five-mask CMOS panel for the active-matrix liquid-crystal-display application.

Mask absorber development to enable next-generation EUVL

Abstract: In next-generation EUV imaging for foundry N5 dimensions and beyond, inherent pitch- and orientation-dependent effects on wafer level will consume a significant part of the lithography budget using the current Ta-based mask. Mask absorber optimization can mitigate these so-called mask 3D effects [1-3]. Last year at the SPIE Photomask and EUVL conference [4,5], EUV mask absorber change is recognized by the community as key enabler of next-generation EUV lithography. Through rigorous lithographic simulations we have identified regions, based on the material optical properties and their gain in imaging performance compared to the reference Ta-based absorber [6]. In addition, we have established a mask absorber requirement test flow to validate the candidate material to the full mask supply chain. In this paper we discuss in more detail Te- and Ru- based alloys which cover these different improvement regions. Candidate materials are evaluated on film morphology, stability during combined hydrogen and EUV loading, and thermal and chemical durability. The EUV optical constants are measured by EUV reflectometry, and preliminary results of plasma etching are shown to enable patterning.

Sub-100 nm Lithography with KrF Exposure Using Multiple Development Method

Abstract: In this paper, a novel resist process technique using a chemically amplified resist with a multiple development method for improving photolithography resolution is described. By means of this technique, resist lines are formed at the edge position between the bright and dark fields of a photomask, and the repeating frequency that is more than the cutoff frequency of optics (νc=1/Pc=2NA/λ) can be delineated using a conventional exposure system. In the experiment, a grating resist pattern with a pitch of 200 nm was obtained using a conventional 0.6 NA KrF exposure system and a 400 nm pitch photomask pattern. The pitch was less than the diffraction limit of 207 nm (=0.5λ/NA) in the optical system used, which cannot be realized by a conventional resist process even with resolution enhancement techniques such as off-axis illumination and phase-shifting mask.

Mask pattern correcting method and mask using the method, and exposure method, and semiconductor device using the mask

Abstract: PROBLEM TO BE SOLVED: To provide a means which produces a high-performance device at high yield by calculating a mask pattern with which a regist pattern close to a design pattern can be obtained. SOLUTION: This is a correcting method which deforms the mask pattern of a photomask used for a photolithography process so that a transfer image close to a desired design pattern can be obtained. Plural evaluation points are arranged along the outer circumference of the desired design pattern and the transfer image obtained when exposure is performed under specific exposure conditions is simulated by using the photomask of the design pattern given the evaluation points, and differences between the simulated transfer image and design pattern are compared for every evaluation point and the design pattern is deformed depending upon the differences compared for every evaluation point so that the differences become small. In an evaluation point arranging process, evaluation points are arranged at the corner parts of the desired design pattern and evaluation points are further arranged at the side parts of the pattern at specified intervals.