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Photomask

About: Photomask is a research topic. Over the lifetime, 7917 publications have been published within this topic receiving 54524 citations. The topic is also known as: photoreticle & reticle.


Papers
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Proceedings ArticleDOI
08 Aug 1993
TL;DR: In this article, a method for patterning sub-micrometer gates with T-shaped cross-sections was proposed, which may be applied to manufacture high performance field effect transistors (FETs).
Abstract: We have developed a method for patterning sub-micrometer gates with T-shaped cross sections, which may be applied to manufacture high performance field effect transistors (FETs). The technique employs two exposures at the KrF excimer laser wavelength (248 nm). The first exposure uses a phase-shifting mask to pattern 0.1 micrometers isolated spaces. The resist used for the second exposure absorbs the 248 nm radiation strongly enough to produce a profile suitable for lift-off patterning.

33 citations

Patent
Ajay Kumar1
28 Sep 2005
TL;DR: In this article, a method for etching chromium and forming a photomask using a carbon hard mask is described, which is useful for fabricating photomasks. But this method requires the chromium layer to be partially exposed through a patterned hard mask.
Abstract: Methods for etching chromium and forming a photomask using a carbon hard mask are provided. In one embodiment, a method of a chromium layer includes providing a substrate in a processing chamber, the substrate having a chromium layer partially exposed through a patterned carbon hard mask layer, providing a process gas containing chlorine and carbon monoxide into the etching chamber, and maintaining a plasma of the process gas and etching the chromium layer through the carbon hard mask layer. The method of etching a chromium layer through a patterned carbon hard mask layer is useful for fabricating photomasks.

33 citations

Proceedings ArticleDOI
01 Sep 1998
TL;DR: In this article, the authors showed that a combination of 240 nm dual-trench and 5 nm to 10 nm undercut produces images with equal intensity between shifted and unshifted regions without loss of image contrasts.
Abstract: One method for making the alternating phase-shift mask involves cutting a trench into the quartz of the mask using an anisotropic dry etch, followed by an isotropic etch to move the corners of the trench underneath the chrome to minimize problems caused by diffraction at the bottom corners of the phase-trench. This manufacturing method makes the addition of subresolution scattering bars and serifs problematic, because the amount of the undercut causes chrome lifting of these small features. Adding an additional anisotropically etched trench to both cut and uncut regions is helpful, but the etch does not move the trench corners under the chrome and result in a loss to intensity and image contrast. At 248 nm illumination and 4X magnification, our work shows that a combination of 240 nm dual-trench and 5 nm to 10 nm undercut produces images with equal intensity between shifted and unshifted regions without loss of image contrasts. This paper demonstrates optical proximity correction for doing 100 nm, 120 nm, 140 nm and 180 nm lines of varying pitch for a simple alternating phase-shift mask, with no dual-trench or undercut. Then the electromagnetic field simulator, TEMPEST, is used to find the best combination of dual-trench depth and amount of undercut for an alternating phase-shift mask. Phase measurement using 248 nm light and depth measurement of thirty-six unique combinations of dual-trench and phase-shift trench are shown. Based on modeling and experimental results, recommendations for making a fine tuned dual-trench 248 nm mask, as well as an extension of the dual-trench alternating phase-shift technique to 193 nm lithography, are made.

33 citations

Proceedings ArticleDOI
Wilhelm Maurer1
27 Dec 1996
TL;DR: In this paper, the authors present results of full-lithography simulations for the printability of mask linewidth variations and mask defects and propose to reevaluate carefully the sharing of the wafer Iinewidth error budget.
Abstract: It is now generally accepted, that optical lithography will be the mainstream approach to manufacture the I Gbit DRAM device generation with minimum features between I 80 nm (first working samples) and I 50 nm (projected fabrication). This development demands a considerable tightening of mask specifications. The printing of 180 nm I 150 nm features on a 193 nm-, 0.6 NA- tool is a highly non-linear pattern transfer process (ki = 0.56 I 0.47). Therefore, mask irregularities (defects, linewidth variations) will print easier than at larger dimensions. This paper presents results of full lithography simulations for the printability of mask linewidth variations and mask defects. Assuming, that the wafer linewidth error budget is shared between the lithography process and the mask as it is currently done (75% for the process, 25% for the mask), the linewidth uniformity on a mask has to be better than 12 nm for 180 nm designrules and better than 8 nm for 150 nm designrules. Masks have to have no defects larger than 100 nm resp. 70 nm (all those numbers are given at the 4x mask!). These numbers are almost a factor of 2 tighter than assumed in published mask specification roadmaps. Besides tightening the current specifications, the mask roadmap has to include other important parameters: We show, that the butting error of the mask writing tool, corner rounding, and the quality of the mask repair have substantial impact on the linewidth error on the wafer. Since mask defects print proportional to the squareroot of their area, the definition of mask repair quality has to be revised. Current mask repair processes cannot provide adequate repair quality. Since masks with these specifications are - in our point of view - not easy to make, we propose to reevaluate carefully the sharing of the wafer Iinewidth error budget. In other words, 193 nm lithography must dedicate a significantly larger portion of its (actually not so large) process window to the mask. Keywords: Optical Lithography, Mask Specifications, Mask Defect Printability, Mask Repair, Linewidth Error Budget

33 citations

Patent
31 Mar 2005
TL;DR: In this article, a blocking structure is created vertically interposed between subsequent instances of the same reference mark, preventing interference, using the methods of the present invention, which is used to prevent interference.
Abstract: In formation of monolithic three dimensional memory arrays, a photomask may be used more than once. Reuse of a photomask creates second, third or more instances of reference marks used by the stepper to achieve alignment (alignment marks) and to measure alignment achieved (overlay marks) directly above prior instances of the same reference mark. The prior instances of the same reference mark may cause interference with the present instance of the reference mark, complicating alignment and measurement. Using the methods of the present invention, blocking structure is created vertically interposed between subsequent instances of the same reference mark, preventing interference.

33 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202322
202281
202150
2020124
2019179
2018195