Showing papers on "Physical design published in 1972"

The Planar Circuit - An Approach to Microwave Integrated Circuitry

Abstract: Three principal categories have been known in electrical circuitry so far. They are the lumped-constant (0-dimensional) circuit, distributed-constant (1-dimensional) circuit, and waveguide (3-dimensional) circuit. The planar circuit to be discussed in general in this paper is a circuit category that should be positioned as a 2-dimensional circuit. It is defined as an "electrical circuit having dimensions comparable to the wavelength in two directions, but much less thickness in one direction." The main subject of this paper is the computer analysis of an arbitrarily shaped, triplate planar circuit. It is shown that a computer analysis based upon a contour-integral solution of the wave equation offers an accurate and efficient tool in the design of the planar circuit. Results of some computer calculations are described. It is also shown that the circuit parameters can be derived directly from Green's function of the wave equation when the shape of the circuit is relatively simple. Examples of this sort of analysis are also shown for comparison with the computer analysis.

Suboptimal algorithm for a wire routing problem

Abstract: The wire routing problem in the layout of integrated circuits is formulated as Steiner's problem in graphs. A suboptimal algorithm is described for the problem. The algorithm is based on the branch-and-bound method. The result of the algorithm applied to several examples is also described.

Fault simulation system for determining the testability of a non-linear integrated circuit by an electrical signal test pattern

Abstract: A system involving the use of fault simulation for determining whether a proposed non-linear integrated circuit is testable by a proposed incremental bilevel electrical signal test pattern. The system, which is particularly advantageous in determining the testability of integrated circuits having sequential logic, involves the conversion of the bilevel electrical test pattern into a corresponding three-level test pattern, and the application of said three-level pattern to a three-level "good" circuit simulation of the integrated circuit and to a number of three-level "bad" circuit simulations of said circuit, each of said "bad" circuit simulations being representative of a different stuck fault condition which is to be determined by the test pattern.

Ac performance test for large scale integrated circuit chips

Abstract: After the circuit elements are formed in a large scale integrated circuit chip, but before the chip is personalized by a final metallization step in which the circuit elements are electrically interconnected in desired final circuit configuration, all of the circuit elements are temporarily interconnected in a recirculating test loop by a preliminary metallization step. Operating power is then applied to the circuit elements, and the frequency of the resultant selfoscillation of the loop is observed as an indication of the AC performance of the chip. If the chip passes the AC performance test, the temporary recirculating loop connections are interrupted, and the circuit elements are personalized by the final metallization step.

Multiplexing connection between a key board and an integrated circuit device

Abstract: The present disclosure is directed to a multiplexing connection arrangement for use between a key board and an integrated circuit device for introducing key signals into the integrated circuit. The arrangement enables multiplexing transmission between the keyboard and the integrated circuit device with a reduction of the necessary number of connection terminals integrated circuit device for receiving the key input information. The individual key information is respectively taken out from the key board at different timing intervals not overlapping each other in time. Addition is repeatedly carried out during the period beginning at the appearance of the key signals and ending at a time boundary marker, so that the key inputs are introduced in a binary fashion into the integrated circuit through the minimum connection terminals. The arrangement is used in desk-top electronic calculators, electronic price-computing scales, electronic cash registers, etc.

The design of interactive graphics aids to mask layout

Abstract: Recently a number of interactive graphics aids to integrated circuit mask layout have been described. A review of the particular problems involved in implementing programs of this kind will be given with a description of hardware and software techniques available for their solution. Some features of these previously described programs will be compared and used to illustrate the range of solutions available. A program, IMP, will be described that uses some software techniques, not previously employed, to provide a capable and highly flexible mask layout facility on relatively inexpensive graphics terminals.

Solid state integrated circuits

Abstract: A dielectrically isolated integrated circuit containing at least one polycrystalline resistor between and dielectrically isolated from adjacent single crystal semiconductor islands.

Design of a Channel Diplexer for Millimeter Wave Applications

Abstract: The design of millimeter wave filters is in principle no different from the design of conventional microwave filters. In practice, however, several factors impose limitations to the choice of the filter structure. As a result, new filter structures must be used requiring new techniques for their design. In this paper, a new channel diplexer structure is described and a technique for its design is given. The expected electrical performance and the design procedure were verified by measuring the performance of a scaled filter model centered at 3.95 GHz. The results of these measurements are given. Practical application of the filter at millimeter wave frequencies will require further effort in the areas of physical design and manufacturing techniques.

Higher order models for computer-aided circuit design

Abstract: A method is presented for converting a multiple- lump transistor physical model into a combination of first-order electrical models. This conversion technique allows any higher order physical model to be implemented with the present CACD programs.

Applications of logic simulation in design automation at Texas Instruments

Abstract: In the sequence of events normally associated with the design cycle for a digital system, the two operations where simulation has the greatest impact are at opposite ends of the cycle. These are the Design Verification step and the Functional Test Generation step in Figure 1.Between Design Verification and Test Generation, the implementation, partitioning, packaging, placement, and routing operations are performed. These operations lead to a complete design, and all work from a common data base. Each step in the cycle augments the data base as the design progresses from concept to hardware.

D2 channel bank: Physical design and introductory program

Abstract: The D2 Channel Bank is designed to provide simplified engineering, installation, and maintenance. Integral voice-frequency alarm and access are provided in a packaged shop-wired frame with a centralized built-in test capability to facilitate initial line-up, testing, and trouble shooting. Circuits are implemented with discrete components and with thin-film and silicon-integrated circuits. Low cost, reliable assembly and wiring techniques are employed. The frame organization and circuit partitioning provide a functional arrangement of circuits with good electrical isolation between critical multiplexing and coding functions. An introductory program and an on-going reliability program have demonstrated the adequacy of both equipment and documentation. In the first 21 months of operation, approximately 3 percent of the circuit packs shipped have failed in initial line-up or in-service. This compares favorably with the performance of similar systems, and recent design modifications are expected to result in substantial improvements.

An interactive system for computer-aided design of printed circuit boards

Abstract: This paper describes an interactive system for the design of printed circuit boards. The system uses an interactive graphics terminal for solving the placement and routing problems. It can be used for designing two-layer boards with integrated circuit modules and discrete components. A substantial portion of the wire-routing is performed automatically and the remaining wires are routed manually in a single interactive session. The system provides significant savings in both design time and processing costs over batch processing and manual methods.

Computer Aided Design for Large-Scale Integrated Circuits

Abstract: The complexity of integrated circuits has increased steadily over the past several years from circuits consisting of simple gates through Medium Scale Integration (MSI) and Large Scale Integration (LSI). Fabrication techniques for LSI have evolved from well-established integrated circuit technology. Because of the large physical size and the large number of components on the individual silicon die, production techniques have been substantially improved in order to maintain reasonable yields. However, the most significant effects of LSI on the semiconductor manufacturer are in the areas of design and testing; techniques used in the past for simpler integrated circuits are inadequate for LSI.