Physical design

About: Physical design is a research topic. Over the lifetime, 7434 publications have been published within this topic receiving 117175 citations.

A thermal-driven floorplanning algorithm for 3D ICs

Abstract: As the technology progresses, interconnect delays have become bottlenecks of chip performance. 3D integrated circuits are proposed as one way to address this problem. However, thermal problem is a critical challenge for 3D IC circuit design. We propose a thermal-driven 3D floorplanning algorithm. Our contributions include: (1) a new 3D floorplan representation, CBA and new interlayer local operations to more efficiently exploit the solution space; (2) an efficient thermal-driven 3D floorplanning algorithm with an integrated compact resistive network thermal model (CBA-T); (3) two fast thermal-driven 3D floorplanning algorithms using two different thermal models with different runtime and quality (CBA-T-Fast and CBA-T-Hybrid). Our experiments show that the proposed 3D floorplan algorithm with CBA representation can reduce the wirelength by 29% compared with a recent published result from (Hsiu et al., 2004). In addition, compared to a nonthermal-driven 3D floorplanning algorithm, the thermal-driven 3D floorplanning algorithm can reduce the maximum on-chip temperature by 56%.

Reuse Methodology Manual: For System-on-a-Chip Designs

Abstract: Reuse Methodology Manual for System-on-a-Chip Designs, Third Edition outlines a set of best practices for creating reusable designs for use in an SoC design methodology. These practices are based on the authors' experience in developing reusable designs, as well as the experience of design teams in many companies around the world. Silicon and tool technologies move so quickly that many of the details of design-for-reuse will undoubtedly continue to evolve over time. But the fundamental aspects of the methodology described in this book have become widely adopted and are likely to form the foundation of chip design for some time to come. Development methodology necessarily differs between system designers and processor designers, as well as between DSP developers and chipset developers. However, there is a common set of problems facing everyone who is designing complex chips.In response to these problems, design teams have adopted a block-based design approach that emphasizes design reuse. Reusing macros (sometimes called "cores") that have already been designed and verified helps to address all of the problems above. However, in adopting reuse-based design, design teams have run into a significant problem. Reusing blocks that have not been explicitly designed for reuse has often provided little or no benefit to the team. The effort to integrate a pre-existing block into new designs can become prohibitively high, if the block does not provide the right views, the right documentation, and the right functionality. From this experience, design teams have realized that reuse-based design requires an explicit methodology for developing reusable macros that are easy to integrate into SoC designs. This manual focuses on describing these techniques. Features of the Third Edition: Up to date; State of the art; Reuse as a solution for circuit designers; A chronicle of"best practices"; All chapters updated and revised; Generic guidelines - non tool specific; Emphasis on hard IP and physical design.

IDAC: an interactive design tool for analog CMOS circuits

Abstract: A design system has been developed which is able to design transconductance amplifiers, operational amplifiers, low-noise BIMOS amplifiers, voltage and current references, quartz oscillators, comparators, and oversampled A/D converters including their digital decimation filter starting from building-block and technology specifications. This design system, called Interactive Design for Analog Circuits (IDAC), is able to size a library of analog schematics (actually more than 40) as a function of technology (p-well and n-well CMOS) and desired building-block specifications. IDAC also generates a complete data sheet, an input file for SPICE2, and an input file for the analog layout program ILAC.

DB2 design advisor: integrated automatic physical database design

Abstract: The DB2 Design Advisor in IBM® DB2® Universal DatabaseTM (DB2 UDB) Version 8.2 for Linux®, UNIX® and Windows® is a tool that, for a given workload, automatically recommends physical design features that are any subset of indexes, materialized query tables (also called materialized views), shared-nothing database partitionings, and multidimensional clustering of tables. Our work is the very first industrial-strength tool that covers the design of as many as four different features, a significant advance to existing tools, which support no more than just indexes and materialized views. Building such a tool is challenging, because of not only the large search space introduced by the interactions among features, but also the extensibility needed by the tool to support additional features in the future. We adopt a novel "hybrid" approach in the Design Advisor that allows us to take important interdependencies into account as well as to encapsulate design features as separate components to lower the reengineering cost. The Design Advisor also features a built-in module that automatically reduces the given workload, and therefore provides great scalability for the tool. Our experimental results demonstrate that our tool can quickly provide good physical design recommendations that satisfy users' requirements.

Design issues for dynamic voltage scaling

Abstract: Processors in portable electronic devices generally have a computational load which has time-varying performance requirements. Dynamic Voltage Scaling is a method to vary the processor's supply voltage so that it consumes the minimal amount of energy by operating at the minimum performance level required by the active software processes. A dynamically varying supply voltage has implications on the processor circuit design and design flow, but with some minimal constraints it is straightforward to design a processor with this capability.