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Pipeline (computing)

About: Pipeline (computing) is a research topic. Over the lifetime, 26760 publications have been published within this topic receiving 204305 citations. The topic is also known as: data pipeline & computational pipeline.


Papers
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Journal ArticleDOI
TL;DR: A hybrid floating-point scheme with tailored exponent datapath, and a co-optimized architecture between hybrid floating point and block floating point (BFP) to reduce memory requirements for 2-D signal processing are proposed.
Abstract: This paper presents architectures for supporting dynamic data scaling in pipeline fast Fourier transforms (FFTs), suitable when implementing large size FFTs in applications such as digital video broadcasting and digital holographic imaging. In a pipeline FFT, data is continuously streaming and must, hence, be scaled without stalling the dataflow. We propose a hybrid floating-point scheme with tailored exponent datapath, and a co-optimized architecture between hybrid floating point and block floating point (BFP) to reduce memory requirements for 2-D signal processing. The presented co-optimization generates a higher signal-to-quantization-noise ratio and requires less memory than for instance convergent BFP. A 2048-point pipeline FFT has been fabricated in a standard-CMOS process from AMI Semiconductor (Lenart and Owall, 2003), and a field-programmable gate array prototype integrating a 2-D FFT core in a larger design shows that the architecture is suitable for image reconstruction in digital holographic imaging

62 citations

Journal ArticleDOI
TL;DR: A mathematical proof of existence of a linear transformation to transform LFSR circuits into equivalent state space formulations achieves a full speed-up compared to the serial architecture at the cost of an increase in hardware overhead.
Abstract: Linear feedback shift register (LFSR) is an important component of the cyclic redundancy check (CRC) operations and BCH encoders. The contribution of this paper is two fold. First, this paper presents a mathematical proof of existence of a linear transformation to transform LFSR circuits into equivalent state space formulations. This transformation achieves a full speed-up compared to the serial architecture at the cost of an increase in hardware overhead. This method applies to all generator polynomials used in CRC operations and BCH encoders. Second, a new formulation is proposed to modify the LFSR into the form of an infinite impulse response (IIR) filter. We propose a novel high speed parallel LFSR architecture based on parallel IIR filter design, pipelining and retiming algorithms. The advantage of the proposed approach over the previous architectures is that it has both feedforward and feedback paths. We further propose to apply combined parallel and pipelining techniques to eliminate the fanout effect in long generator polynomials. The proposed scheme can be applied to any generator polynomial, i.e., any LFSR in general. The proposed parallel architecture achieves better area-time product compared to the previous designs.

62 citations

Patent
06 Feb 2001
TL;DR: In this paper, a multimedia execution unit is configured to perform vectored floating point and integer instructions, including an add/subtract pipeline having far and close data paths, where the far path handles effective addition operations and effective subtraction operations for operands having an absolute exponent difference greater than one.
Abstract: A multimedia execution unit configured to perform vectored floating point and integer instructions. The execution unit may include an add/subtract pipeline having far and close data paths. The far path is configured to handle effective addition operations and effective subtraction operations for operands having an absolute exponent difference greater than one. The close path is configured to handle effective subtraction operations for operands having an absolute exponent difference less than or equal to one. The close path is configured to generate two output values, wherein one output value is the first input operand plus an inverted version of the second input operand, while the second output value is equal to the first output value plus one. Selection of the first or second output value in the close path effectuates the round-to-nearest operation for the output of the adder.

62 citations

Patent
19 Jun 2001
TL;DR: In this article, a system, method and computer program product are provided for programmable pixel processing in a computer graphics pipeline, where pixel data is received from a source buffer and programmable operations are performed on the pixel data in order to generate output.
Abstract: A system, method and computer program product are provided for programmable pixel processing in a computer graphics pipeline (400). Initially, pixel data is received from a source buffer (402). Thereafter, programmable operations (404) are performed on the pixel data in order to generate output. The operations are programmable (404) in that a user may utilize instructions from a predetermined instruction set for generating the same. Such output is stored in a register (406).

62 citations

Journal ArticleDOI
TL;DR: A vision-based system for underwater object detection that is able to detect automatically a pipeline placed on the sea bottom, and some objects, e.g. trestles and anodes, placed in its neighborhoods, is presented.
Abstract: In this paper, a vision-based system for underwater object detection is presented. The system is able to detect automatically a pipeline placed on the sea bottom, and some objects, e.g. trestles and anodes, placed in its neighborhoods. A color compensation procedure has been introduced in order to reduce problems connected with the light attenuation in the water. Artificial neural networks are then applied in order to classify in real-time the pixels of the input image into different classes, corresponding e.g. to different objects present in the observed scene. Geometric reasoning is applied to reduce the detection of false objects and to improve the accuracy of true detected objects. The results on real underwater images representing a pipeline structure in different scenarios are shown. The presence of seaweed and sand, different illumination conditions and water depth, different pipeline diameter and small variations of the camera tilt angle are considered to evaluate the algorithm performances.

62 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202218
20211,066
20201,556
20191,793
20181,754
20171,548